Commit graph

506,942 commits

Author SHA1 Message Date
Nicolin Chen
1169cf1f4d ARM: dts: imx6qdl: add spdif support for sabreauto
This patch adds spdif support for imx6qdl-sabreauto by inserting the cpu dai
node with pinctrl group and its ASoC dai link node.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:20 +08:00
Troy Kisky
f17e2a31c2 ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio
On Sabre Lite usdhc4 is a micro sd slot, which has no
write protect.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:19 +08:00
Troy Kisky
da08d27fcd ARM: dts: imx6qdl-sabrelite: Add uart1 support
Uart1 is available on Sabre Lite.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:18 +08:00
Troy Kisky
1efa12657c ARM: dts: imx: sabrelite: add Dual Lite/Solo support
This makes the structure of Sabre Lite board files the same
as Sabre SD board files so that they are easier to compare.

By this, I mean that the majority of the file imx6q-sabrelite.dts
is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts
and imx6dl-sabrelite.dts can include it.

Now Sabre Lite has support for Dual Lite/Solo
processors.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:16 +08:00
Lothar Waßmann
5f8fbc2cd2 ARM: dts: imx6qdl: add aliases for can interfaces
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:15 +08:00
Marek Vasut
a41ee06491 ARM: dts: imx6q-sabrelite: Enable PCI express
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Harro Haan <hrhaan@gmail.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:14 +08:00
Fabio Estevam
9cbd220f4d ARM: dts: imx6q-sabrelite: Place 'status' as the last node
In order to follow the standard approach used on other imx dts files, place the
'status' node as the last one.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:13 +08:00
Troy Kisky
275c08b569 ARM: dts: imx: imx6qdl.dtsi: use IRQ_TYPE_LEVEL_HIGH
Make the interrupts node slightly more readable.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:12 +08:00
Troy Kisky
13088c2309 ARM: dts: imx: imx6sl.dtsi: use IRQ_TYPE_LEVEL_HIGH
Make the interrupts node slightly more readable.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:10 +08:00
Troy Kisky
f89f5b4682 ARM: dts: imx: imx6dl.dtsi: use IRQ_TYPE_LEVEL_HIGH
Make the interrupts node slightly more readable.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:09 +08:00
Troy Kisky
e6117ff3c6 ARM: dts: imx: imx6q.dtsi: use IRQ_TYPE_LEVEL_HIGH
Make the interrupts node slightly more readable.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:08 +08:00
Troy Kisky
5e0c7cd401 ARM: dts: imx: imx6qdl.dtsi: add mipi_csi tag
We will reference mipi_csi from board
dts files.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:07 +08:00
Troy Kisky
85446f9cb0 ARM: dts: imx: pinfunc: add MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT
The solo/duallite reference manual does not mention
this setting, but it works.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:06 +08:00
Nicolin Chen
77112dd58a ARM: dts: imx: specify the value of audmux pinctrl instead of 0x80000000
We must specify the value of audmux pinctrl if we want to use pinctrl_pm().
Thus change bypass value 0x80000000 to what we exactly need.

This patch also seperately unset PUE bit for TXD so that IOMUX won't pull
up/down the pin after turning into tristate. When we use SSI normal mode to
playback monaural audio via I2S signal, there'd be a pulled curve occur to
its signal at the second slot if setting PUE bit for TXD. And it will make
the second channel to play a constant noise. So by keeping the signal level
in the second slot, we can get a constant high level signal (-1) or a low
level one (0).

Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:04 +08:00
Fabio Estevam
60e90acbca ARM: dts: imx6q-sabrelite: Remove duplicate GPIO entry
MX6QDL_PAD_EIM_D23__GPIO3_IO23 appears twice in the hog pin group.

Remove one of the occurrences.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:03 +08:00
Fabio Estevam
0d5724283d ARM: dts: imx6q-udoo: Add Ethernet support
Add Ethernet support for imx6q udoo board.

Tested by booting a kernel via NFS.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:02 +08:00
Silvio F
c1f77e73a8 ARM: dts: imx6: Add support for imx6q dmo edmqmx6
Signed-off-by: Silvio F <silvio.fricke@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:01 +08:00
Silvio F
155bae4eda DT: Add Data Modul vendor prefix
Signed-off-by: Silvio F <silvio.fricke@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:29:00 +08:00
Shawn Guo
56160e3361 ARM: dts: imx6: use generic node name for fixed regulator
The device tree specification recommends that generic name should be
used for nodes.  So instead of naming those fixed regulator nodes
arbitrarily, let's use the generic name 'regulator@num' for those nodes.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:59 +08:00
Shawn Guo
fffaa65dc4 ARM: dts: imx6sl: make pinctrl nodes board specific
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts.  However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected.  This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board.  It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.

The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral.  Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:57 +08:00
Shawn Guo
817c27a128 ARM: dts: imx6qdl: make pinctrl nodes board specific
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts.  However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected.  This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board.  It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.

The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral.  Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:56 +08:00
Valentin Raevsky
682d055e6a ARM: dts: Add initial support for cm-fx6.
Add initial support for cm-fx6 module.

cm-fx6 is a module based on mx6q SoC with the following features:
- Up to 4GB of DDR3
- 1 LCD/DVI output port
- 1 HDMI output port
- 2 LVDS LCD ports
- Gigabit Ethernet
- Analog Audio
- CAN
- SATA
- NAND
- PCIE

This patch allows to boot up the module, configures the serial console,
the Ethernet adapter and the heartbeat led.

cm-fx6 is embedded inside the Utilite computer.

Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:55 +08:00
Peter Chen
67339b35e5 ARM: dts: imx6q-arm2: enable USB OTG
Enable USB OTG controller at imx6q-arm2 board

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:54 +08:00
Tim Harvey
e3946fe805 ARM: dts: add Gateworks Ventana support
The Gateworks Ventana product family consists of several baseboard designs
based on the Freescale i.MX6 family of processors.  Each baseboard has a
different set of possible features.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:53 +08:00
Tim Harvey
a113533726 ARM: dts: disable flexcan by default
Typically nodes are disabled by default and enabled when needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-02-09 21:28:51 +08:00
Paul Walmsley
c32fa99f0b bitops: Fix signedness of compile-time hweight implementations
Enabling '-Wsign-compare' compiler warnings on code that includes
include/linux/bitops.h can generate the following warning:

  In file included from include/linux/kernel.h:10:0,
                    from <random filename>:48:
  include/linux/bitops.h: In function 'hweight_long':
  include/linux/bitops.h:77:26: error: signed and unsigned type in conditional expression [-Werror=sign-compare]

(converted to an error with -Werror)

This is due to the use of the logical negation operator '!' in the
__const_hweight8 macro in include/asm-generic/bitops/const_hweight.h.
The use of that operator here results in a signed value.

Fix by explicitly casting the __const_hweight8 macro expansion to
'unsigned int'.  While here, clean up several checkpatch.pl warnings.

Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1312180459580.30198@tamien
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:39:26 +01:00
Dongsheng Yang
6b6350f155 sched: Expose some macros related to priority
Some macros in kernel/sched/sched.h about priority are
private to kernel/sched. But they are useful to other
parts of the core kernel.

This patch moves these macros from kernel/sched/sched.h to
include/linux/sched/prio.h so that they are available to
other subsystems.

Signed-off-by: Dongsheng Yang <yangds.fnst@cn.fujitsu.com>
Cc: raistlin@linux.it
Cc: juri.lelli@gmail.com
Cc: clark.williams@gmail.com
Cc: rostedt@goodmis.org
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/2b022810905b52d13238466807f4b2a691577180.1390859827.git.yangds.fnst@cn.fujitsu.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:31:51 +01:00
Dongsheng Yang
5c228079ce sched: Move the priority specific bits into a new header file
Some bits about priority are defined in linux/sched/rt.h, but
some of them are not only for rt scheduler, such as MAX_PRIO.

This patch move them all into a new header file, linux/sched/prio.h.

Signed-off-by: Dongsheng Yang <yangds.fnst@cn.fujitsu.com>
Cc: clark.williams@gmail.com
Cc: rostedt@goodmis.org
Cc: raistlin@linux.it
Cc: juri.lelli@gmail.com
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/f7549508a1588da2c613d601748ca9de30fa5dcf.1390859827.git.yangds.fnst@cn.fujitsu.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:31:49 +01:00
Kirill Tkhai
390f3258cb sched/deadline: Skip in switched_to_dl() if task is current
When p is current and it's not of dl class, then there are no other
dl taks in the rq. If we had had pushable tasks in some other rq,
they would have been pushed earlier. So, skip "p == rq->curr" case.

Signed-off-by: Kirill Tkhai <ktkhai@parallels.com>
Acked-by: Juri Lelli <juri.lelli@gmail.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140128072421.32315.25300.stgit@tkhai
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:31:48 +01:00
Don Zickus
90ed5b0fa5 perf/x86/p4: Block PMIs on init to prevent a stream of unkown NMIs
A bunch of unknown NMIs have popped up on a Pentium4 recently when booting
into a kdump kernel.  This was exposed because the watchdog timer went
from 60 seconds down to 10 seconds (increasing the ability to reproduce
this problem).

What is happening is on boot up of the second kernel (the kdump one),
the previous nmi_watchdogs were enabled on thread 0 and thread 1.  The
second kernel only initializes one cpu but the perf counter on thread 1
still counts.

Normally in a kdump scenario, the other cpus are blocking in an NMI loop,
but more importantly their local apics have the performance counters disabled
(iow LVTPC is masked).  So any counters that fire are masked and never get
through to the second kernel.

However, on a P4 the local apic is shared by both threads and thread1's PMI
(despite being configured to only interrupt thread1) will generate an NMI on
thread0.  Because thread0 knows nothing about this NMI, it is seen as an
unknown NMI.

This would be fine because it is a kdump kernel, strange things happen
what is the big deal about a single unknown NMI.

Unfortunately, the P4 comes with another quirk: clearing the overflow bit
to prevent a stream of NMIs.  This is the problem.

The kdump kernel can not execute because of the endless NMIs that happen.

To solve this, I instrumented the p4 perf init code, to walk all the counters
and zero them out (just like a normal reset would).

Now when the counters go off, they do not generate anything and no unknown
NMIs are seen.

I tested this on a P4 we have in our lab.  After two or three crashes, I could
normally reproduce the problem.  Now after 10 crashes, everything continues
to boot correctly.

Signed-off-by: Don Zickus <dzickus@redhat.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140120154115.GZ25953@redhat.com
[ Fixed a stylistic detail. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:20:35 +01:00
Don Zickus
13beacee81 perf/x86/p4: Fix counter corruption when using lots of perf groups
On a P4 box stressing perf with:

   ./perf record -o perf.data ./perf stat -v ./perf bench all

it was noticed that a slew of unknown NMIs would pop out rather quickly.

Painfully debugging this ancient platform, led me to notice cross cpu counter
corruption.

The P4 machine is special in that it has 18 counters, half are used for cpu0
and the other half is for cpu1 (or all 18 if hyperthreading is disabled).  But
the splitting of the counters has to be actively managed by the software.

In this particular bug, one of the cpu0 specific counters was being used by
cpu1 and caused all sorts of random unknown nmis.

I am not entirely sure on the corruption path, but what happens is:

 o perf schedules a group with p4_pmu_schedule_events()
 o inside p4_pmu_schedule_events(), it notices an hwc pointer is being reused
   but for a different cpu, so it 'swaps' the config bits and returns the
   updated 'assign' array with a _new_ index.
 o perf schedules another group with p4_pmu_schedule_events()
 o inside p4_pmu_schedule_events(), it notices an hwc pointer is being reused
   (the same one as above) but for the _same_ cpu [BUG!!], so it updates the
   'assign' array to use the _old_ (wrong cpu) index because the _new_ index is in
   an earlier part of the 'assign' array (and hasn't been committed yet).
 o perf commits the transaction using the wrong index and corrupts the other cpu

The [BUG!!] is because the 'hwc->config' is updated but not the 'hwc->idx'.  So
the check for 'p4_should_swap_ts()' is correct the first time around but
incorrect the second time around (because hwc->config was updated in between).

I think the spirit of perf was to not modify anything until all the
transactions had a chance to 'test' if they would succeed, and if so, commit
atomically.  However, P4 breaks this spirit by touching the hwc->config
element.

So my fix is to continue the un-perf like breakage, by assigning hwc->idx to -1
on swap to tell follow up group scheduling to find a new index.

Of course if the transaction fails rolling this back will be difficult, but
that is not different than how the current code works. :-)  And I wasn't sure
how much effort to cleanup the code I should do for a platform that is almost
10 years old by now.

Hence the lazy fix.

Signed-off-by: Don Zickus <dzickus@redhat.com>
Acked-by: Cyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1391024270-19469-1-git-send-email-dzickus@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:17:23 +01:00
Peter Zijlstra
e90c785352 x86/nmi: Push duration printk() to irq context
Calling printk() from NMI context is bad (TM), so move it to IRQ
context.

In doing so we slightly change (probably wreck) the debugfs
nmi_longest_ns thingy, in that it doesn't update to reflect the
longest, nor does writing to it reset the count.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-rdw0au56a5ymis1u8p48c12d@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:17:22 +01:00
Peter Zijlstra
6a02ad66b2 perf/x86: Push the duration-logging printk() to IRQ context
Calling printk() from NMI context is bad (TM), so move it to IRQ
context.

This also avoids the problem where the printk() time is measured by
the generic NMI duration goo and triggers a second warning.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-75dv35xf6dhhmeb7nq6fua31@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:17:21 +01:00
Ingo Molnar
3c3d7cb1db Merge branch 'linus' into perf/core
Refresh the branch to a v3.14-rc base before queueing up new devel patches.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:13:45 +01:00
Johannes Berg
980f88e414 sched/wait: Suppress Sparse 'variable shadowing' warning
This warning seems to show up a lot now, since ___wait_event()
is (indirectly) used inside wait_event_timeout(), which also
has a variable called __ret. Rename the one in ___wait_event()
to ___ret (another leading underscore) to suppress the warning.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Link: http://lkml.kernel.org/r/1391704121.12789.20.camel@jlt4.sipsolutions.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:11:49 +01:00
Steven Rostedt
569d6557ab x86: Use preempt_disable_notrace() in cycles_2_ns()
When debug preempt is enabled, preempt_disable() can be traced by
function and function graph tracing.

There's a place in the function graph tracer that calls trace_clock()
which eventually calls cycles_2_ns() outside of the recursion
protection. When cycles_2_ns() calls preempt_disable() it gets traced
and the graph tracer will go into a recursive loop causing a crash or
worse, a triple fault.

Simple fix is to use preempt_disable_notrace() in cycles_2_ns, which
makes sense because the preempt_disable() tracing may use that code
too, and it tracing it, even with recursion protection is rather
pointless.

Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/20140204141315.2a968a72@gandalf.local.home
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:09:08 +01:00
Peter Zijlstra
0e9f2204cf perf/x86: Fix Userspace RDPMC switch
The current code forgets to change the CR4 state on the current CPU.
Use on_each_cpu() instead of smp_call_function().

Reported-by: Mark Davies <junk@eslaf.co.uk>
Suggested-by: Mark Davies <junk@eslaf.co.uk>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Cc: fweisbec@gmail.com
Link: http://lkml.kernel.org/n/tip-69efsat90ibhnd577zy3z9gh@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:08:25 +01:00
Peter Zijlstra
e97df76377 perf/x86/intel/p6: Add userspace RDPMC quirk for PPro
PPro machines can die hard when PCE gets enabled due to a CPU erratum.
The safe way it so disable it by default and keep it disabled.

See erratum 26 in:

  http://download.intel.com/design/archives/processors/pro/docs/24268935.pdf

Reported-and-Tested-by: Mark Davies <junk@eslaf.co.uk>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Stephane Eranian <eranian@google.com>
Cc: Vince Weaver <vince@deater.net>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140206170815.GW2936@laptop.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-09 13:08:24 +01:00
Alex Porosanu
883619a931 crypto: caam - fix ERA retrieval function
SEC ERA has to be retrieved by reading the "fsl,sec-era" property
from the device tree. This property is updated/filled in by
u-boot.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:27 +08:00
Dan Carpenter
d167b6e1fb hwrng: cleanup in hwrng_register()
My static checker complains that:

	drivers/char/hw_random/core.c:341 hwrng_register()
	warn: we tested 'old_rng' before and it was 'false'

The problem is that sometimes we test "if (!old_rng)" and sometimes we
test "if (must_register_misc)".  The static checker knows they are
equivalent but a human being reading the code could easily be confused.

I have simplified the code by removing the "must_register_misc" variable
and I have removed the redundant check on "if (!old_rng)".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:27 +08:00
Fabio Estevam
fecfd7f7e9 crypto: mxs-dcp: Check the return value of stmp_reset_block()
stmp_reset_block() may fail, so check its return value and propagate it in the
case of error.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:26 +08:00
Fabio Estevam
e921f03075 crypto: mxs-dcp: Use devm_kzalloc()
Using devm_kzalloc() can make the code cleaner.

While at it, remove the devm_kzalloc error message as there is standard OOM
message done by the core.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:25 +08:00
Kevin Hao
f3de9cb1ca crypto: talitos: init the priv->alg_list more earlier in talitos_probe()
In function talitos_probe(), it will jump to err_out when getting an
error in talitos_probe_irq(). Then the uninitialized list head
priv->alg_list will be used in function talitos_remove(). In this case
we would get a call trace like the following. So move up the
initialization of priv->alg_list.

  Unable to handle kernel paging request for data at address 0x00000000
  Faulting instruction address: 0xc0459ff4
  Oops: Kernel access of bad area, sig: 11 [#1]
  SMP NR_CPUS=8 P1020 RDB
  Modules linked in:
  CPU: 1 PID: 1 Comm: swapper/0 Tainted: G        W    3.13.0-08789-g54c0a4b46150 #33
  task: cf050000 ti: cf04c000 task.ti: cf04c000
  NIP: c0459ff4 LR: c0459fd4 CTR: c02f2438
  REGS: cf04dcb0 TRAP: 0300   Tainted: G        W     (3.13.0-08789-g54c0a4b46150)
  MSR: 00029000 <CE,EE,ME>  CR: 82000028  XER: 20000000
  DEAR: 00000000 ESR: 00000000
  GPR00: c045ac28 cf04dd60 cf050000 cf2579c0 00021000 00000000 c02f35b0 0000014e
  GPR08: c07e702c cf104300 c07e702c 0000014e 22000024 00000000 c0002a3c 00000000
  GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c082e4e0 000000df
  GPR24: 00000000 00100100 00200200 cf257a2c cf0efe10 cf2579c0 cf0efe10 00000000
  NIP [c0459ff4] talitos_remove+0x3c/0x1c8
  LR [c0459fd4] talitos_remove+0x1c/0x1c8
  Call Trace:
  [cf04dd60] [c07485d8] __func__.13331+0x1241c8/0x1391c0 (unreliable)
  [cf04dd90] [c045ac28] talitos_probe+0x244/0x998
  [cf04dde0] [c0306a74] platform_drv_probe+0x28/0x68
  [cf04ddf0] [c0304d38] really_probe+0x78/0x250
  [cf04de10] [c030505c] __driver_attach+0xc8/0xcc
  [cf04de30] [c0302e98] bus_for_each_dev+0x6c/0xb8
  [cf04de60] [c03043cc] bus_add_driver+0x168/0x220
  [cf04de80] [c0305798] driver_register+0x88/0x130
  [cf04de90] [c0002458] do_one_initcall+0x14c/0x198
  [cf04df00] [c079f904] kernel_init_freeable+0x138/0x1d4
  [cf04df30] [c0002a50] kernel_init+0x14/0x124
  [cf04df40] [c000ec40] ret_from_kernel_thread+0x5c/0x64

Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:25 +08:00
Tom Lendacky
530abd8938 crypto: ccp - Perform completion callbacks using a tasklet
Change from scheduling work to scheduling a tasklet to perform
the callback operations.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:24 +08:00
Tom Lendacky
bc3854476f crypto: ccp - Use a single queue for proper ordering of tfm requests
Move to a single queue to serialize requests within a tfm. When
testing using IPSec with a large number of network connections
the per cpu tfm queuing logic was not working properly.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:24 +08:00
Tom Lendacky
c11baa02c5 crypto: ccp - Move HMAC calculation down to ccp ops file
Move the support to perform an HMAC calculation into
the CCP operations file.  This eliminates the need to
perform a synchronous SHA operation used to calculate
the HMAC.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:23 +08:00
Tom Lendacky
d81ed6534f crypto: ccp - Allow for selective disablement of crypto API algorithms
Introduce module parameters that allow for disabling of a
crypto algorithm by not registering the algorithm with the
crypto API.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:15 +08:00
Dave Jones
80e84c16e7 crypto: ccp - Fix ccp_run_passthru_cmd dma variable assignments
There are some suspicious looking lines of code in the new ccp driver, including
one that assigns a variable to itself, and another that overwrites a previous assignment.

This may have been a cut-and-paste error where 'src' was forgotten to be changed to 'dst'.
I have no hardware to test this, so this is untested.

Signed-off-by: Dave Jones <davej@fedoraproject.org>
Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:14 +08:00
Nitesh Lal
0a63b09dd6 crypto: caam - Fix job ring discovery in controller driver
The SEC Controller driver creates platform devices for it's child job ring nodes.
Currently the driver uses for_each_compatible routine which traverses
the whole device tree to create the job rings for the platform device.
The patch changes this to search for the compatible property of job ring
only in the child nodes i.e., the job rings are created as per the number
of children associated with the crypto node.

Signed-off-by: Nitesh Lal <NiteshNarayanLal@freescale.com>
Reviewed-by: Horia Geanta <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:13 +08:00
Marek Vasut
2021abaa00 crypto: dcp - Move the AES operation type from actx to rctx
Move the AES operation type and mode from async crypto context to
crypto request context. This allows for recycling of the async crypto
context for different kinds of operations.

I found this problem when I used dm-crypt, which uses the same async
crypto context (actx) for both encryption and decryption requests.
Since the requests are enqueued into the processing queue, immediatelly
storing the type of operation into async crypto context (actx) caused
corruption of this information when encryption and decryption operations
followed imediatelly one after the other. When the first operation was
dequeued, the second operation was already enqueued and overwritten the
type of operation in actx, thus causing incorrect result of the first
operation.

Fix this problem by storing the type of operation into the crypto request
context.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-02-09 09:59:12 +08:00