Years after the SoC support has been added, it's high time for it to
get dispcc going. Add the node to ensure that.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Xperia 5
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229100511.979972-2-konrad.dybcio@linaro.org
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
About msm8953.dtsi:
According to the Devicetree Specification v0.3,
s3.7.3 'Internal (L1) Cache Properties',
cache-unified:
If present, specifies the cache has a unified or-
ganization. If not present, specifies that the
cache has a Harvard architecture with separate
caches for instructions and data.
Plus, the 'cache-level' property seems to be reserved to higher
cache levels (cf s3.8).
To describe a l1 data/instruction cache couple, no cache
information should be described. Remove the l1 cache nodes.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
[bjorn: Moved "qcom" to $subject prefix]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107155825.1644604-17-pierre.gondois@arm.com
With enough pins set properly, the hardware buttons now also work
like a charm.
Fixes: c2721b0c23 ("arm64: dts: qcom: Add support for Xperia 1 III / 5 III")
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # On Xperia 1 III and Xperia 5 III
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229102712.983306-1-konrad.dybcio@linaro.org
Add device tree for the Motorola G7 Power (ocean) smartphone. This
device is based on Snapdragon 632 (sdm632) SoC which is a variant of
MSM8953.
Signed-off-by: Gabriela David <ultracoolguy@disroot.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-9-a64b3b0af0eb@z3ntu.xyz
Add device tree for the Xiaomi Mi A1 (tissot) smartphone. This device is
based on Snapdragon 625 (msm8953) SoC.
Co-developed-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Danila Tikhonov <JIaxyga@protonmail.com>
Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-7-a64b3b0af0eb@z3ntu.xyz
Add device tree for the Xiaomi Redmi Note 4X (mido) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-6-a64b3b0af0eb@z3ntu.xyz
Add device tree for the Xiaomi Mi A2 Lite (daisy) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.
Signed-off-by: Alejandro Tafalla <atafalla@dnyon.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-5-a64b3b0af0eb@z3ntu.xyz
Add device tree for the Motorola G5 Plus (potter) smartphone. This
device is based on Snapdragon 625 (msm8953) SoC.
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-4-a64b3b0af0eb@z3ntu.xyz
Add device tree for the Motorola Moto G6 (ali) smartphone. This device
is based on Snapdragon 450 (sdm450) SoC which is a variant of MSM8953.
Signed-off-by: Julian Braha <julianbraha@gmail.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-3-a64b3b0af0eb@z3ntu.xyz
Adjust node names so they're not just memory@ but actually show what
they're used for. Also add labels to most nodes so we can easily
reference them from devices.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-2-a64b3b0af0eb@z3ntu.xyz
resin node declaration was moved to pm8998.dtsi file (in disabled state).
MSM8998 and SDM845 boards defining resin node did not previously have
status="okay" and ended up disabled.
Re-enable it by using resin node link from pm8998.dtsi with status="okay".
Fixes: f86ae6f23a ("arm64: dts: qcom: sagit: add initial device tree for sagit")
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/linux-arm-msm/20221222115922.jlachctn4lxopp7a@SoMainline.org/
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228115243.201038-1-dsankouski@gmail.com
Currently, depth-charge Chrome OS bootloader code used in the SC7280
SoC accesses the WiFi node using node names (wifi@<addr>). Since
depth-charge Chrome OS bootloader is a common code that is used in
SoCs having different WiFi chipsets, it is better if the depth-charge
Chrome OS bootloader code accesses the WiFi node using a WiFi alias.
The advantage of this method is that the depth-charge Chrome OS
bootloader code need not be changed for every new WiFi chip.
Therefore, add wifi alias entry for SC7280-idp device tree.
Signed-off-by: Youghandhar Chintala <quic_youghand@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228094104.356-1-quic_youghand@quicinc.com
Move the new 'regulator-vph-pwr' node before the wlan regulator node to
restore the root-node sort order (alphabetically by node name).
While at it, add a couple of newlines to separate the properties for
consistency with the other regulator nodes.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228085614.15080-1-johan+linaro@kernel.org
The firmware paths were pointing to qcom/manufacturer whereas other
devices have them under qcom/chipset/manufacturer, so fix this up on the
c630, so we follow the same standard setup.
Signed-off-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226004727.204986-1-steev@kali.org
Allow the Adreno GPU to access split pagetables specifically on the
dedicated Adreno SMMU via the qcom,adreno-smmu compatible.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213002626.260267-2-konrad.dybcio@linaro.org
Add the HDMI display nodes and link it to DSI.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-6-dmitry.baryshkov@linaro.org
Add devices tree nodes describing display hardware on SM8450:
- Display Clock Controller
- MDSS
- MDP
- two DSI controllers and DSI PHYs
This does not provide support for DP controllers present on SM8450.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-3-dmitry.baryshkov@linaro.org
Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-2-dmitry.baryshkov@linaro.org
Move the 'thermal-zones' node after the regulator nodes to restore the
root-node sort order (alphabetically by node name).
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227170202.21618-1-johan+linaro@kernel.org
On eMMC devices, the UFS clocks aren't started in the bootloader (or well,
at least it should not be, as that would just leak power..), which results
in platform reboots when trying to access the unclocked UFS hardware,
which unfortunately happens on each and every boot, as interconnect calls
sync_state and goes over each and every path.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210200353.418391-6-konrad.dybcio@linaro.org
The volume-up button on both kumanos (Xperia 1 and Xperia 5) are mapped
to resin.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210142525.16974-3-konrad.dybcio@linaro.org
With the recent patch that allowed us to reset the SDHCI controller from
Linux, things started working properly. Enable SDHCI1, and by extension
eMMC. Also, remove the now-useless cmdline SDHCI quirks.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210141000.14344-1-konrad.dybcio@linaro.org
The sound and codec nodes are not a property of a soc, but rather board
as it describes the sound configuration. It also does not have unit
address:
sm8250-hdk.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-4-krzysztof.kozlowski@linaro.org
The sound node is not a property of a soc, but rather board as it
describes the sound configuration. It also does not have unit address:
sdm845-shift-axolotl.dtb: soc@0: sound: {} should not be valid under {'type': 'object'}
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-3-krzysztof.kozlowski@linaro.org
The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:
sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000':
... 'required-opps': [[55]]}} should not be valid under {'type': 'object'}
Move to top-level OPP tables:
- DSI and QUP which are shared between multiple nodes,
- QSPI which cannot be placed in its node due to address/size cells.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-2-krzysztof.kozlowski@linaro.org
The SoC node is a simple-bus and its schema expect to have nodes only
with unit addresses:
sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000':
... 'required-opps': [[47]]}} should not be valid under {'type': 'object'}
Move to top-level OPP tables:
- QUP which is shared between multiple nodes,
- QSPI which cannot be placed in its node due to address/size cells.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210115704.97614-1-krzysztof.kozlowski@linaro.org
Fix up the ramoops node to make it match bindings and style:
- remove "removed-dma-pool"
- don't pad size to 8 hex digits
- change cc-size to ecc-size so that it's used
- increase ecc-size from to 16
- remove the zeroed ftrace-size
Fixes: 5f82b9cda6 ("arm64: dts: qcom: Add SM6350 device tree")
Reported-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210102600.589028-1-konrad.dybcio@linaro.org
The gpio node in PMIC dts'es define access to multiple GPIOs. Most Qcom
PMICs were already using the plural _gpios label to point to this node,
but a few PMICs were left behind including the recently-pulled
pm(i)8950.
Rename it from *_gpio to *_gpios for pm6125, pm6150(l), pm8005,
pm(i)8950, and pm(i)8998.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209220450.1793421-1-marijn.suijten@somainline.org
