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1,412,602 commits

Author SHA1 Message Date
Krzysztof Kozlowski
43fdf9c120 HEVC decoder node for RK3288.
-----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmlmR3UQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgaLFB/9Utq7fxHVISYaQUxp10I0kHghjKM5BwtM5
 6i+qVBP3zN2dIkWAsQN4/F/MsGjxtdQ8165eEUcYBT2UeCD+xqmH4wSZ0YkbASKB
 ZG3UsH3k9EN/KbepVAVMhX3SbuQbeILzj+nV+7oz49jTiMc4WgUaMLjfMSmdFWiW
 9A0ZN4NIWxve40TOegM54HSQrIjKAmtFjUiuCn1bAgKez9H5TyO843SIak44vO6p
 PbCiCYAnSmhFPf01V+xwpy/iP3lnH566SMjDfLPTYaLgYxj/75VqHknnjpwE5CgI
 yZBqTYGdsPAbEbKtKJCcx1/N8vbYrJKEmn6ak6joawwGQWZfDzF9
 =vVXJ
 -----END PGP SIGNATURE-----

Merge tag 'v6.20-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

HEVC decoder node for RK3288.

* tag 'v6.20-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Add vdec node for RK3288

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-22 09:58:41 +01:00
Krzysztof Kozlowski
94cdfe3980 Armv8 Juno/Vexpress updates for v7.0
This contains a small set of DT updates:
 
 1. Align DTS node naming with established coding style by replacing underscores
    with hyphens in node names. This is a safe change and does not affect ABI.
 
 2. Add support for the CMN PMU on the Arm Morello platform, exposing the
    CMN-Skeena (CMN-600 r3p1–compatible) PMU via the standard CMN-600 binding.
    This enables PMU access on real Morello SDP hardware, where the registers
    are functional.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmlk2qwACgkQAEG6vDF+
 4piEVA//Tli5yzCXuD+B1G63lZrPR0GuoCcpfXrsGM0yxtD3MEOddbzhO1xdkDKm
 ZcEygj/xqW5iCCLM8gRMTjr1ZdyWOd6i8dIl+UPqKJ0UypA1b9zu0RC+LKdFLxLK
 7SYiWA8he6zWJUKC1FgAmRPh9o+cFoWTnlyF/0wv4dLTtl2G+l6/Hc0r2vy4KBZj
 YLDKorx4yc6T3/BYn6zDhy7CaCyJOIrp0tG6KRi6seCqZcwhfPgbiIWO7uZOUVZx
 Qu68ohxW/+49OpPntmgCUMC0C2dFBPtJKsh911XJIseN7Z2MY0z7VOM4ruC+DS2t
 1JAUHgHo0qFc/yS+y2ioEumShbjb2xMA9RFZ0/vdzEremC9sazQhS58Prb91nlKP
 KtnPQcNEbzG/QgK7Vzyw1Kt2MCwLIsYlb/zaAN3YnnQ5a9p1CifVJXpDei4j0a7K
 qPyDL2vPYheCio5BXWDt86yj0XXPArisdraCbwnjy5UifuHj5th1//UHjASGszxR
 C0D6JGyQqkGBXNNh4b/fpxhcp68MZbDHAWJaGcGh75Arh0v1kE1+U19q7t2/3LRi
 ZeRIT0lsgFYEccKifvJsYfLyfleKxq8O54P4ZgXe5ujq1GV+8YzP6wLDd9J8RRD+
 yEx1nNEFpmEtHjTaM52e/SMxU8WTnrhZ9/Plj85c9JpXJXB7TvI=
 =OCA/
 -----END PGP SIGNATURE-----

Merge tag 'juno-updates-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt

Armv8 Juno/Vexpress updates for v7.0

This contains a small set of DT updates:

1. Align DTS node naming with established coding style by replacing underscores
   with hyphens in node names. This is a safe change and does not affect ABI.

2. Add support for the CMN PMU on the Arm Morello platform, exposing the
   CMN-Skeena (CMN-600 r3p1–compatible) PMU via the standard CMN-600 binding.
   This enables PMU access on real Morello SDP hardware, where the registers
   are functional.

* tag 'juno-updates-7.0' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Use hyphen in node names
  arm64: dts: morello: Add CMN PMU

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-22 09:53:53 +01:00
Arnd Bergmann
aa5f91ce4f Renesas DTS updates for v6.20
- Add USB3.2 host and more RSCI serial support for the RZ/G3E SoC and
     the RZ/G3E SMARC EVK board,
   - Add display and USB3.0 host support for the RZ/V2H and RZ/V2N SoCs
     and their EVK boards,
   - Add SPI NOR Flash support for the Yuridenki-Shokai Kakip board,
   - Add PCIe support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
   - Add SPI, interrupt controller, and DMAC support for the RZ/T2H,
     RZ/N2H, and RZ/V2N SoCs,
   - Add NMI wakeup button support for the RZ/V2N EVK board,
   - Add thermal support for the RZ/V2N SoC,
   - Add system watchdog timer support for R-Car V3H, which is reserved
     for secure firmware,
   - Add window watchdog timer support for R-Car V3M, V3H, and Gen4 SoCs,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaVvEhQAKCRCKwlD9ZEnx
 cGZiAQDwTlmwHs27zAQms6Aw+wNWxB37PcnSI/f7LiPVt5gxogEAxEaSHvoXgdp8
 JH+r2ER3kooWi4fzrOpjn8w85lH6LwM=
 =mqOa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmlelBgACgkQmmx57+YA
 GNk7MxAAiUX1i+FOuQXRGt1xT/6YGtvidV2C/BTCEGScHqsH0cvwzrUGJgL5VdYo
 Wf5BhJedT2fFj96VJ2wbRF1HtzVB1HmY1oExObGFI03oEVcX6PDO1y1vHbKuFrz4
 1h/+q1GFC/iPrg9iBwI8alqa8VMYF5640KjsbXuWvpOM5DaCKMu3C9TJ1kpJhC5C
 VMPWoigBqphHF80Xb+iQ3jZOjvm5vRD0o1iVFIBaekuNrUEsEj8kS/16tcfuI3ol
 l4RyyXKFgCCkQpXkIYL/FLSYQrk80F2JzBwAss0g8UojY55B+19nbosPdybvAph+
 TIQn1T5QcHIK8mNs6PpDlpVfmaHWfYRb4tYtGQjy/G/XxCY8gHq8CqhwoJXBTjiW
 saKc1kXOEvnbcirhXMfI/ZKl6CLsgGK8wG+I/wYvsM7poahXwKKxjCc/SDDS2Zka
 AjN6dCEkGuIGBEBHWR4rb1cwFpP5JQGCE1YP0u+YLJO9bMWnANC1LzwbojKJ0fYd
 C/4imcQ2oWXvOcDetXkhm64uz2nmt1YLyGJerIAfc/dIkuAZ7PZbSxgsigoyfUfx
 2fzrn7a9+kBb9s9DyEUIcD8DmCwcZXxPo78wjx0RNEnTfAo2XB7AwgDgNkvTE1xJ
 y2X4UVhNt2ayvA0ZEOmOwZBYyUZMXNjiXzOcIbOoHh5YjcOpmlA=
 =jqCw
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.20

  - Add USB3.2 host and more RSCI serial support for the RZ/G3E SoC and
    the RZ/G3E SMARC EVK board,
  - Add display and USB3.0 host support for the RZ/V2H and RZ/V2N SoCs
    and their EVK boards,
  - Add SPI NOR Flash support for the Yuridenki-Shokai Kakip board,
  - Add PCIe support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
  - Add SPI, interrupt controller, and DMAC support for the RZ/T2H,
    RZ/N2H, and RZ/V2N SoCs,
  - Add NMI wakeup button support for the RZ/V2N EVK board,
  - Add thermal support for the RZ/V2N SoC,
  - Add system watchdog timer support for R-Car V3H, which is reserved
    for secure firmware,
  - Add window watchdog timer support for R-Car V3M, V3H, and Gen4 SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (41 commits)
  arm64: dts: renesas: r8a779h0: Add WWDT nodes
  arm64: dts: renesas: r8a779g0: Add WWDT nodes
  arm64: dts: renesas: r8a779f0: Add WWDT nodes
  arm64: dts: renesas: r8a779a0: Add WWDT nodes
  arm64: dts: renesas: r8a77980: Add WWDT nodes
  arm64: dts: renesas: r8a77970: Add WWDT nodes
  arm64: dts: renesas: condor/v3hsk: Mark SWDT as reserved
  arm64: dts: renesas: r8a77980: Add SWDT node
  arm64: dts: renesas: r9a09g056: Add TSU nodes
  arm64: dts: renesas: r9a09g087: Add DMAC support
  arm64: dts: renesas: r9a09g077: Add DMAC support
  arm64: dts: renesas: r9a09g087: Add ICU support
  arm64: dts: renesas: r9a09g077: Add ICU support
  arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodes
  arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS
  arm64: dts: renesas: r9a09g047: Add RSCI nodes
  ARM: dts: renesas: r9a06g032: Add Ethernet switch interrupts
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button support
  arm64: dts: renesas: r9a09g056: Add RSPI nodes
  arm64: dts: renesas: r9a09g056: Add DMAC nodes
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07 18:12:47 +01:00
Arnd Bergmann
bc6fe9f0a6 First batch of ASPEED Arm devicetree changes for 6.20
New platforms:
 
 - NVIDIA MSX4 BMC
 
   The NVIDIA MSX4 HPM (host platform module) is a reference board for
   managing up to 8 PCIe connected NVIDIA GPUs via ConnectX-8 (CX8)
   SuperNICs. The BMC manages all GPUs and CX8s for both telemetry and
   firmware update via MCTP over USB. The host CPUs are dual socket Intel
   Granite Rapids processors.
 
   For more detail on this architecture:
 
   https://developer.nvidia.com/blog/nvidia-connectx-8-supernics-advance-ai-platform-architecture-with-pcie-gen6-connectivity/
 
 Updated platforms:
 
 - ast2600-evb (ASPEED): Various tidy-ups to address binding warnings
 - bletchley (Meta): Watchdog fix, tidy-ups to address binding warnings
 - clemente (Meta): HDD LED fix, GPIO line names, EEPROMs
 - harma (Meta): fanboard presence GPIO
 - santabarbara (Meta): IPMB, GPIO line names, additional IO expander
 -----BEGIN PGP SIGNATURE-----
 
 iJIEABYKADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaVs/nBwcYW5kcmV3QGNv
 ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGm30YBAK1Ur/X6D5a9P5901J5c
 1FqAKC2IuXgnP9BPSBMpU4CDAP4qpwD56i2tiefFKy9LEDzrW4dyy1Zvavj0MWwp
 JqNYDA==
 =MY36
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmlekrIACgkQmmx57+YA
 GNlF8hAAj6k5jntKE4djrzY9YKSvE2csNTI25PO1/tUptFY92y5l/29m/UBSxuWo
 qcjM/O/IwIH8rJ/fr7oU4E1r3pLIGB6NKXlv01w07K+hziAjRc1WNRK5EhHflqUl
 ihF0hrKZOvplNpM0Jqav/1jXFfkW8OrA3BP5DDq4wNjFgQIB1RDMMVVf+BDvLMMa
 zVW+rGA0cwicGVElAvac7En0qe7qWbi7m6DOOSlBtytWyFgm53A5yDQVFtbmaFvF
 tjg8ZmP6bIoEKLQf7nlApEbtivzbWqpC+ICpM2A7wI7SrnJ/KzoNFLfWF8+EIYrD
 NGuch3HpHdc/XrSyRa7YW4Mw6aLVHtS4y/SVDrYOzdAbfE5FE0sGsi/5zn8pyTg3
 yvwl3M0rqWc3Uml/9yZG91/CtOvRtYUq6Zf+ICmdN/Bgt1SDMezVOOsczypDyRs1
 Avy9jaM5X1kFzmekZ5t6qGxp7MsX1kjhB2dP9zWnx7mAChxuUOZIaii3HmREB5S5
 wxG2cyORqYdsJPAWQL3R5qj6Z8pSoAw4akaoEqeOajo16VRgwHnAhlDFx4KVy/q6
 08Yds7fb5kJKhw9GXG+2/Y2z4n1sp36BjKdAQ5IpkMfxjP3qW85UqsK5x1fTlt2C
 PfvenS9LrdcxPi+44mqyR3X16h4qDNja3NkS9Djuc+lKNKMoh2o=
 =ML8C
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-6.20-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

First batch of ASPEED Arm devicetree changes for 6.20

New platforms:

- NVIDIA MSX4 BMC

  The NVIDIA MSX4 HPM (host platform module) is a reference board for
  managing up to 8 PCIe connected NVIDIA GPUs via ConnectX-8 (CX8)
  SuperNICs. The BMC manages all GPUs and CX8s for both telemetry and
  firmware update via MCTP over USB. The host CPUs are dual socket Intel
  Granite Rapids processors.

  For more detail on this architecture:

  https://developer.nvidia.com/blog/nvidia-connectx-8-supernics-advance-ai-platform-architecture-with-pcie-gen6-connectivity/

Updated platforms:

- ast2600-evb (ASPEED): Various tidy-ups to address binding warnings
- bletchley (Meta): Watchdog fix, tidy-ups to address binding warnings
- clemente (Meta): HDD LED fix, GPIO line names, EEPROMs
- harma (Meta): fanboard presence GPIO
- santabarbara (Meta): IPMB, GPIO line names, additional IO expander

* tag 'aspeed-6.20-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
  ARM: dts: aspeed: bletchley: Fix ADC vref property names
  ARM: dts: aspeed: bletchley: Remove unused i2c13 property
  ARM: dts: aspeed: bletchley: Remove unused pca9539 properties
  ARM: dts: aspeed: bletchley: Fix SPI GPIO property names
  ARM: dts: aspeed: bletchley: Use generic node names
  ARM: dts: aspeed: g6: Drop clocks property from arm,armv7-timer
  ARM: dts: aspeed: ast2600-evb: Tidy up A0 work-around for UART5
  ARM: dts: aspeed: g6: Drop unspecified aspeed,ast2600-udma node
  ARM: dts: aspeed: Drop syscon compatible from EDAC in g6 dtsi
  ARM: dts: aspeed: Use specified wp-inverted property for AST2600 EVB
  ARM: dts: aspeed: Remove sdhci-drive-type property from AST2600 EVB
  ARM: dts: aspeed: Add NVIDIA MSX4 HPM
  dt-bindings: arm: aspeed: Add NVIDIA MSX4 board
  ARM: dts: aspeed: clemente: move hdd_led to its own gpio-leds group
  ARM: dts: aspeed: clemente: add gpio line name to io expander
  ARM: dts: aspeed: santabarbara: Enable ipmb device for OCP debug card
  ARM: dts: aspeed: santabarbara: Add swb IO expander and gpio line names
  ARM: dts: aspeed: clemente: Add EEPROMs for boot and data drive FRUs
  ARM: dts: aspeed: harma: add fanboard presence sgpio
  ARM: dts: aspeed: bletchley: remove WDTRST1 assertion from wdt1

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07 18:05:52 +01:00
Arnd Bergmann
12e491d4f7 This pull request contains Broadcom ARM64-based SoCs Device Tre updates
for 6.19, please pull the following:
 
 - Peter enables the random number generator on BCM2712
 
 - Stanimir adds the watchdog Device Tree node for BCM2712
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmkLmNUACgkQh9CWnEQH
 BwTYRQ//RBuoDZpqjToA/uno7wPVQouRf0q/oqJDWiEf6njuoGR9JmDDFAyTq2bu
 bi5+MzwIBVroCF1iQHGQZp+WmE0l80m9c2NTPq+6+enPczXa4PSPhM3+SXSL6GK/
 dhDD4YjYEXwDKet6pNfxD9yny6ROVsxPa/a2IXk/g3gICwRi5x4ZqLtTcK6Eiv1M
 tE3xk49eVww1F66Kng04BJyBIBFrxNRK6avphNHqcE/CwvcESraG5xc7nyDxF6l9
 txd97weOZTDAmz7NhWym9iisL9cnuiGGLx9s0QVMNk6xE4agObWdjdNpoCy/ih/t
 DuFCWNYLiSe0Qjn1A8bGipmeJPT7T2gNBPTTAS9SinAxazg/i3zQRdjwW/EtozFr
 4R6T41N02R9chPckSZe5qk9ICduYKv8XYjJTIGhFs4jhbQ/yA2xtm7N4hC/P4mfY
 TckA+lLMYF0iKIqu72Z2mSnh5dMO5ieAc77OSQmSMI43CzzYzQWYJpYgCTYLsTTL
 nNMQnIgo8FWCGqThZJ1NQx73Pad0WYVlqRogi/dnRL5tAcJdQbYhw6OkmXVjzDf6
 bjb8UxAa41cIUx7OKnbK5mL/lyJEcQeyCS04kgABIAsA1Y5dffU3wZfIJweyFrt0
 qpSEHP/BU/++0mDPbolTaItf4EvA4nvqdXZ8GporGCqTDxqpP90=
 =1Fiq
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmlekdEACgkQmmx57+YA
 GNlqQg/+M5whtchKT1vJudPa3c8hqyt0r8yTBHi1FetMpeAm8FwZ6QY/xga5e38+
 N+ym+Sb1NwWjYDRd+fM2ea0ujKnDKRMsicwD4g0lYVQidEHI7auw0iZQI3h/OElB
 XykVok7dbM0vq+Qsavg1rB714FTBb6BchXEAux3ZIQNNP4nvil0ChaaAjDbQrcYk
 kxxV6LQoMSiFkQfp+hl9zs+fX2s2jrWAtihqmnUSyfut+I2k/IQGOo421ovLUwTi
 cJC6jG3J9CXbIUOJ5gXcphDsvGKS2AgSyn0CyETBHBkdt9HELryPYytSGM1dj7JU
 AKf9R3QcBbIkEPvd2t1kQ9inGLIuBF2A9qV10Cc8X5Um8b312squ7fYl/OO53BKe
 sbKdfwzwLKo52IGLDSL2o9Tq3AtF3obqoGmPj/8mmWxm+ekeJtFUgDhxNYSiirp0
 hjVusbQvQhB8W9F7QAi3od4X/1Iu9Q2j2mHXCvb9LkLOG0Cziias1BPZBAb4UEpA
 YzMPdLXma+GlmmPHmB1KPilcFODIGi2WneoeEYFVnouQ84urzIYXZQ4Df45Nlf3j
 qII9oF4FMG96PEYl+QkAGP+IsMPy6wm2ryjHSLGCRCeiTFsVUxbRKobTD8MRj4As
 dof0onpi73/Ml/C3sr5dDT6o8bvmSeJey5gwtGLa4UDl/YzK9jw=
 =zKhO
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-6.19/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tre updates
for 6.19, please pull the following:

- Peter enables the random number generator on BCM2712

- Stanimir adds the watchdog Device Tree node for BCM2712

* tag 'arm-soc/for-6.19/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm2712: Add watchdog DT node
  arm64: dts: broadcom: bcm2712: Enable RNG

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-07 18:03:06 +01:00
Wolfram Sang
aca3bbde0f arm64: dts: renesas: r8a779h0: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-14-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
2dc4f97074 arm64: dts: renesas: r8a779g0: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-13-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
b7c182ff32 arm64: dts: renesas: r8a779f0: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-12-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
65be6f4a46 arm64: dts: renesas: r8a779a0: Add WWDT nodes
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-11-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
84e41ebccd arm64: dts: renesas: r8a77980: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-10-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
860d9b042c arm64: dts: renesas: r8a77970: Add WWDT nodes
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-9-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
cb12cfa7f6 arm64: dts: renesas: condor/v3hsk: Mark SWDT as reserved
This watchdog can't be used with Linux because the firmware needs it on
R-Car V3H boards.  Sadly, it doesn't mark the node as reserved, so this
is added manually here.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215031318.2219-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Wolfram Sang
556a9d46fd arm64: dts: renesas: r8a77980: Add SWDT node
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215031318.2219-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Ovidiu Panait
f3d22e5f63 arm64: dts: renesas: r9a09g056: Add TSU nodes
The Renesas RZ/V2N SoC includes a Thermal Sensor Unit (TSU) block designed
to measure the junction temperature. The device provides real-time
temperature measurements for thermal management, utilizing two dedicated
channels for temperature sensing:
- TSU0, which is located near the DRP-AI block
- TSU1, which is located near the CPU and DRP-AI block

Since TSU1 is physically closer the CPU and the highest temperature
spot, it is used for CPU throttling through a passive trip and cooling
map. TSU0 is configured only with a critical trip.

Add TSU nodes along with thermal zones and keep them enabled in the SoC
DTSI.

Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251209091115.8541-4-ovidiu.panait.rb@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Cosmin Tanislav
57a0c2d36c arm64: dts: renesas: r9a09g087: Add DMAC support
The Renesas RZ/N2H (R9A09G087) SoC has three instances of the DMAC IP.

Add support for them.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251205151254.2970669-7-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Cosmin Tanislav
50f51092bf arm64: dts: renesas: r9a09g077: Add DMAC support
The Renesas RZ/T2H (R9A09G077) SoC has three instances of the DMAC IP.

Add support for them.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251205151254.2970669-6-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Cosmin Tanislav
d42c64cf16 arm64: dts: renesas: r9a09g087: Add ICU support
The Renesas RZ/N2H (R9A09G087) SoC has an Interrupt Controller (ICU)
block that routes external interrupts to the GIC's SPIs, with the
ability of level-translation, and can also produce software and
aggregate error interrupts.

Add support for it.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251201112933.488801-5-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Cosmin Tanislav
f060bbe2c3 arm64: dts: renesas: r9a09g077: Add ICU support
The Renesas RZ/T2H (R9A09G077) SoC has an Interrupt Controller (ICU)
block that routes external interrupts to the GIC's SPIs, with the
ability of level-translation, and can also produce software and
aggregate error interrupts.

Add support for it.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251201112933.488801-4-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Biju Das
835666e740 arm64: dts: renesas: r9a09g047e57-smarc: Enable rsci{2,4,9} nodes
Enable device rsci{2,4,9} nodes for the RZ/G3E SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251129185203.380002-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Biju Das
ccf2044987 arm64: dts: renesas: renesas-smarc2: Move aliases to board DTS
SMARC2 board dtsi is common for multiple SoCs. So Move aliases
to board DTS as SoC may have different IPs for a given alias.
eg: RZ/G3S does not have RSCI interface.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20251129185203.380002-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Biju Das
ef601dbb5b arm64: dts: renesas: r9a09g047: Add RSCI nodes
Add RSCI nodes to RZ/G3E ("R9A09G047") SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251129185203.380002-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Geert Uytterhoeven
f2d5d0ba4c ARM: dts: renesas: r9a06g032: Add Ethernet switch interrupts
The Ethernet switch device node still lacks interrupts.  Add them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/53d45eed3709cba589a4ef3e9ad198d7e44fd9a5.1764249063.git.geert+renesas@glider.be
2026-01-05 14:37:18 +01:00
Lad Prabhakar
41e60d92c8 arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add NMI wakeup button support
Add support for the NMI connected user pushbutton on the RZ/V2N EVK.
The button is wired to the SoC NMI input and can be used to wake the
system from low-power states.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251125224533.294235-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Lad Prabhakar
4018dfc222 arm64: dts: renesas: r9a09g056: Add RSPI nodes
Add nodes for the RSPI IPs found in the Renesas RZ/V2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251125224533.294235-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Lad Prabhakar
7d8b4a6672 arm64: dts: renesas: r9a09g056: Add DMAC nodes
Add nodes for the DMAC IPs found on the Renesas RZ/V2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251125224533.294235-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:18 +01:00
Lad Prabhakar
b449dbc0bb arm64: dts: renesas: r9a09g056: Add ICU node
Add node for the Interrupt Control Unit IP found on the Renesas
RZ/V2N SoC, and modify the pinctrl node as its interrupt parent
is the ICU node.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251125224533.294235-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Geert Uytterhoeven
44cfd102ce arm64: dts: renesas: r9a09g047e57-smarc: Remove duplicate SW_LCD_EN
SW_LCD_EN is defined twice.

Fixes: 9e95446b0c ("arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/1f93558c62f4461f50935644ec831a7d2cb52630.1764089463.git.geert+renesas@glider.be
2026-01-05 14:37:17 +01:00
Cosmin Tanislav
3c77f58d10 arm64: dts: renesas: r9a09g087: Add SPI nodes
Add support for the four SPI controllers on the Renesas RZ/N2H Soc.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119161434.595677-14-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Cosmin Tanislav
fb8f11c797 arm64: dts: renesas: r9a09g077: Add SPI nodes
Add support for the four SPI controllers on the Renesas RZ/T2H Soc.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119161434.595677-13-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Claudiu Beznea
73b73af99a arm64: dts: renesas: rzg3s-smarc: Enable PCIe
The RZ Smarc Carrier-II board has PCIe headers mounted on it. Enable PCIe
support.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Claudiu Beznea
1a66160fb2 arm64: dts: renesas: rzg3s-smarc-som: Add PCIe reference clock
Versa3 clock generator available on RZ/G3S SMARC Module provides the
reference clock for SoC PCIe interface. Update the device tree to reflect
this connection.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Claudiu Beznea
40a4c75e7f arm64: dts: renesas: r9a08g045: Add PCIe node
The RZ/G3S SoC has a variant (R9A08G045S33) which supports PCIe. Add the
PCIe node.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251119143523.977085-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
f221ce9f7c arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller
Enable the USB3.0 (CH0) host controllers on the RZ/V2N Evaluation Kit.
The CN4 connector on the EVK provides access to the USB3.0 channel.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
9dd6097c35 arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes
Add USB3 PHY/Host nodes to RZ/V2N ("R9A09G056") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
7ef7ba62ec arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers
Enable the USB3.0 (CH0) and USB3.1 (CH1) host controllers on the RZ/V2H
Evaluation Kit. The CN4 stacked connector on the EVK provides access to
both channels, with CH0 corresponding to USB3.0 and CH1 to USB3.1.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
92279daefc arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
Add USB3 PHY/Host nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
9a5a73dca9 arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable DU and DSI
Enable DU, DSI and adv7535 HDMI encoder on RZ/V2N Evaluation Kit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251103200349.62087-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
d8332e5f33 arm64: dts: renesas: r9a09g056: Add DU and DSI nodes
Add DU and DSI nodes to RZ/V2N SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251103200349.62087-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
6569dced2b arm64: dts: renesas: r9a09g056: Add FCPV and VSPD nodes
Add FCPV and VSPD nodes to RZ/V2N SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251103200349.62087-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Nobuhiro Iwamatsu
71270e792c arm64: dts: renesas: r9a09g057h48-kakip: Enable SPI NOR Flash
This enables W25Q256JWPIM NOR Flash connected to XSPI.
Additionally, this adds fixed 1.8V regulator node (`reg_1p8v`) required for
NOR Flash.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251101072951.2681630-1-iwamatsu@nigauri.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:37:17 +01:00
Lad Prabhakar
947acdadca arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable DU and DSI
Enable DU, DSI and adv7535 HDMI encoder on RZ/V2H Evaluation Kit.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251023212314.679303-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:33:04 +01:00
Lad Prabhakar
ebb6adecb9 arm64: dts: renesas: r9a09g057: Add DU and DSI nodes
Add DU and DSI nodes to RZ/V2H(P) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251023212314.679303-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:33:04 +01:00
Lad Prabhakar
0154078db6 arm64: dts: renesas: r9a09g057: Add FCPV and VSPD nodes
Add FCPV and VSPD nodes to RZ/V2H(P) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251023212314.679303-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:33:04 +01:00
Cosmin Tanislav
00d3dbc474 arm64: dts: renesas: rzt2h-n2h-evk: Add note about SD1 1.8V modes
1.8V operation of SD1 requires the jumper to be placed on the correct
pins of a connector on these Evaluation Kits. 1.8V is needed to achieve
the higher rated speeds like SDR104. Add a note about it to make sure no
one else spends too much time figuring this out.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251022073141.1989762-1-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-01-05 14:33:04 +01:00
Krzysztof Kozlowski
f0d0f08722 arm64: dts: arm: Use hyphen in node names
DTS coding style prefers hyphens instead of underscores in the node
names.  Change should be safe, because node names are not considered an
ABI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Message-Id: <20251223152457.155392-3-krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2026-01-01 17:31:07 +00:00
Linus Torvalds
f8f9c1f4d0 Linux 6.19-rc3 v6.19-rc3 2025-12-28 13:24:26 -08:00
Linus Torvalds
c875a6c324 USB fixes for 6.19-rc3
Here are some small USB fixes, and bunch of reverts for 6.19-rc3.
 Included in here are:
   - reverts of some typec ucsi driver changes that had a lot of
     regression reports after -rc1.  Let's just revert it all for now and
     it will come back in a way that is better tested.
   - other typec bugfixes
   - usb-storage quirk fixups
   - dwc3 driver fix
   - other minor USB fixes for reported problems.
 
 All of these have passed 0-day testing and individual testing.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCaVElGw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ylMeQCgzsZZNX7AtfUXlHkFENzlKFyAYZEAn0Nl01xd
 BBKmE3GqGMWsVIJ2T0AI
 =cjZ8
 -----END PGP SIGNATURE-----

Merge tag 'usb-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are some small USB fixes, and bunch of reverts for 6.19-rc3.
  Included in here are:

   - reverts of some typec ucsi driver changes that had a lot of
     regression reports after -rc1. Let's just revert it all for now and
     it will come back in a way that is better tested.

   - other typec bugfixes

   - usb-storage quirk fixups

   - dwc3 driver fix

   - other minor USB fixes for reported problems.

  All of these have passed 0-day testing and individual testing"

* tag 'usb-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (22 commits)
  Revert "usb: typec: ucsi: Update UCSI structure to have message in and message out fields"
  Revert "usb: typec: ucsi: Add support for message out data structure"
  Revert "usb: typec: ucsi: Enable debugfs for message_out data structure"
  Revert "usb: typec: ucsi: Add support for SET_PDOS command"
  Revert "usb: typec: ucsi: Fix null pointer dereference in ucsi_sync_control_common"
  Revert "usb: typec: ucsi: Get connector status after enable notifications"
  usb: ohci-nxp: clean up probe error labels
  usb: gadget: lpc32xx_udc: clean up probe error labels
  usb: ohci-nxp: fix device leak on probe failure
  usb: phy: isp1301: fix non-OF device reference imbalance
  usb: gadget: lpc32xx_udc: fix clock imbalance in error path
  usb: typec: ucsi: Get connector status after enable notifications
  usb: usb-storage: Maintain minimal modifications to the bcdDevice range.
  usb: dwc3: of-simple: fix clock resource leak in dwc3_of_simple_probe
  usb: typec: ucsi: Fix null pointer dereference in ucsi_sync_control_common
  USB: lpc32xx_udc: Fix error handling in probe
  usb: typec: altmodes/displayport: Drop the device reference in dp_altmode_probe()
  usb: phy: fsl-usb: Fix use-after-free in delayed work during device removal
  usb: renesas_usbhs: Fix a resource leak in usbhs_pipe_malloc()
  usb: typec: ucsi: huawei-gaokin: add DRM dependency
  ...
2025-12-28 10:21:47 -08:00
Linus Torvalds
15225b910c Serial driver fixes for 6.19-rc3
Here are some small serial driver fixes for some reported issues.
 Included in here are:
   - serial sysfs fwnode fix that was much reported
   - sh-sci driver fix
   - serial device init bugfix
   - 8250 bugfix
   - xilinx_uartps bugfix
 
 All of these have passed 0-day testing and individual testing
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCaVEl7A8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yn1AgCfYUqy05A3BNhwOfhzoJ2ToKn/aZkAn0iYT/06
 vLBTQBtVhoMff9CneVvu
 =eNi3
 -----END PGP SIGNATURE-----

Merge tag 'tty-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull serial driver fixes from Greg KH:
 "Here are some small serial driver fixes for some reported issues.
  Included in here are:

   - serial sysfs fwnode fix that was much reported

   - sh-sci driver fix

   - serial device init bugfix

   - 8250 bugfix

   - xilinx_uartps bugfix

  All of these have passed 0-day testing and individual testing"

* tag 'tty-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
  serial: xilinx_uartps: fix rs485 delay_rts_after_send
  serial: sh-sci: Check that the DMA cookie is valid
  serial: core: Fix serial device initialization
  serial: 8250: longson: Fix NULL vs IS_ERR() bug in probe
  serial: core: Restore sysfs fwnode information
2025-12-28 10:14:49 -08:00
Linus Torvalds
1c55bc8710 firewire fixes for 6.19-rc3
A fix for PCI driver for Texas Instruments PCILyx series. The driver had
 a bug where it allocated a DMA-coherent buffer of 16 KB but released it
 using PAGE_SIZE. This disproportion was reported in 2020, but the fix was
 never merged. It is finally resolved.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQE66IEYNDXNBPeGKSsLtaWM8LwEwUCaVEkHAAKCRCsLtaWM8Lw
 E47xAQCakWPjeQ1S64vK9lmNAcUjWRw/YhacDLVv3euEBjSzuwEAwvK3pPv95IlA
 fO6V8UVJN+Lg5dwusM+fdleZqvR4mQ4=
 =UZIn
 -----END PGP SIGNATURE-----

Merge tag 'firewire-fixes-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394

Pull firewire fix from Takashi Sakamoto:
 "A fix for PCI driver for Texas Instruments PCILyx series.

  The driver had a bug where it allocated a DMA-coherent buffer of 16 KB
  but released it using PAGE_SIZE. This disproportion was reported in
  2020, but the fix was never merged. It is finally resolved"

* tag 'firewire-fixes-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394:
  firewire: nosy: Fix dma_free_coherent() size
2025-12-28 10:11:18 -08:00
Linus Torvalds
03de3e44a7 RISC-V updates for v6.19-rc3
- Add probing and userspace reporting support for the standard RISC-V
   ISA extensions Zilsd and Zclsd, which implement load/store dual
   instructions on RV32
 
 - Abstract the register saving code in setup_sigcontext() so it can be
   used for stateful RISC-V ISA extensions beyond the vector extension
 
 - Add the SBI extension ID and some initial data structure definitions
   for the RISC-V standard SBI debug trigger extension
 
 - Clean up some code slightly: change some page table functions to
   avoid atomic operations oinn !SMP and to avoid unnecessary casts to
   atomic_long_t; and use the existing RISCV_FULL_BARRIER macro in
   place of some open-coded "fence rw,rw" instructions
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAmlQ5hUACgkQx4+xDQu9
 KkuzjQ/+LV27EOKp3ofhkN6yD+u/MZJv2L8d/L+iuZ6mC7ynerVqY7jHj1bUtSWG
 lGJPLLtB3rWITsN0tTkQZDE+LySABACvGsHsH0jDOPu25EUu8fmKL+4UOBpJ4EmH
 GrldJCgJjZiV9/NdFqUSwpsZKfuNC3IT5hQvEfFmBGexMb4O0ch2LTrqNTxsS5eu
 x1a5DJPbls8olyTYYMoIIbQMU35bHdQWSGEUBvKpisziD11E5c9P9zZcN/X7TnFZ
 9wxDCeCmdtiayJzWECRO5HFErxw16IWOBsW7JwanOLlJuE2vi/hEW3bwAAQMaYSh
 FvN6ID9d6fE9cuStNfqILuWeF8cogVkowMzEX9ud6hFp8AKE/mAlF4Rd26qIAbwE
 Migv/MjSuMKSYfPIcJ+fkrMoPgMeMCoGW34NtSV7MjSujBYozjjnN/Yc5iSu5rdN
 16b08rtusMvQI0Eowt21RO7iXRauK1+6Xcag5WZytD+sdMZkPxOepDK/mZijiida
 w8FYENlHEjhlF7A9Uiy8igVCjXJg63r3ctcnzB2wskUb+gfJF9IXdpv0O7ZO6IoJ
 6Q4OI3oNhHSWic7noXYu+dSbTT4DjlPpUBnI79X7bPo+6Ck3X9fr8YPpHzKnmHN9
 aVixfWk8zShNutROkt+3vQYzgNACcNtMT9Uz5Ce2FI3urqALp1M=
 =Pgyz
 -----END PGP SIGNATURE-----

Merge tag 'riscv-for-linus-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Paul Walmsley:
 "Nothing exotic here; these are the cleanup and new ISA extension
  probing patches (not including CFI):

   - Add probing and userspace reporting support for the standard RISC-V
     ISA extensions Zilsd and Zclsd, which implement load/store dual
     instructions on RV32

   - Abstract the register saving code in setup_sigcontext() so it can
     be used for stateful RISC-V ISA extensions beyond the vector
     extension

   - Add the SBI extension ID and some initial data structure
     definitions for the RISC-V standard SBI debug trigger extension

   - Clean up some code slightly: change some page table functions to
     avoid atomic operations oinn !SMP and to avoid unnecessary casts to
     atomic_long_t; and use the existing RISCV_FULL_BARRIER macro in
     place of some open-coded 'fence rw,rw' instructions"

* tag 'riscv-for-linus-6.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Add SBI debug trigger extension and function ids
  riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.
  riscv: hwprobe: export Zilsd and Zclsd ISA extensions
  riscv: add ISA extension parsing for Zilsd and Zclsd
  dt-bindings: riscv: add Zilsd and Zclsd extension descriptions
  riscv: mm: use xchg() on non-atomic_long_t variables, not atomic_long_xchg()
  riscv: mm: ptep_get_and_clear(): avoid atomic ops when !CONFIG_SMP
  riscv: mm: pmdp_huge_get_and_clear(): avoid atomic ops when !CONFIG_SMP
  riscv: signal: abstract header saving for setup_sigcontext
2025-12-28 09:44:26 -08:00