The flexible array member 'buffer' in 'omap_sham_reqctx' is always
allocated with BUFLEN bytes. Replace the flexible array with a
fixed-size array and remove the now-redundant 'buflen' field.
Since 'struct omap_sham_reqctx' now includes the buffer, simplify
'reqsize' and 'statesize' and use an offsetof-based memcpy() in
omap_sham_export() and omap_sham_import().
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add a MAINTAINERS entry for the atmel-sha204a driver and Thorsten Blum
as maintainer.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add Thorsten Blum as maintainer of the atmel-ecc driver.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
When adf_dev_up() partially completes and then fails, the IRQ
handlers registered during adf_isr_resource_alloc() are not detached
before the MSI-X vectors are released.
Since the device is enabled with pcim_enable_device(), calling
pci_alloc_irq_vectors() internally registers pcim_msi_release() as a
devres action. On probe failure, devres runs pcim_msi_release() which
calls pci_free_irq_vectors(), tearing down the MSI-X vectors while IRQ
handlers (for example 'qat0-bundle0') are still attached. This causes
remove_proc_entry() warnings:
[ 22.163964] remove_proc_entry: removing non-empty directory 'irq/143', leaking at least 'qat0-bundle0'
Moving the devm_add_action_or_reset() before adf_dev_up() does not solve
the problem since devres runs in LIFO order and pcim_msi_release(),
registered later inside adf_dev_up(), would still fire before
adf_device_down().
Fix by calling adf_dev_down() explicitly when adf_dev_up() fails, to
properly free IRQ handlers before devres releases the MSI-X vectors.
Fixes: 17fd7514ae ("crypto: qat - add qat_6xxx driver")
Cc: stable@vger.kernel.org
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Ahsan Atta <ahsan.atta@intel.com>
Reviewed-by: Laurent M Coquerel <laurent.m.coquerel@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Declare 'swap' as zero-initialized and use a single index variable to
simplify the byte-swapping loop in qce_xts_swapiv(). Add a comment for
clarity.
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The direction used to map the buffer skreq->iv is DMA_TO_DEVICE but it is
unmapped with direction DMA_BIDIRECTIONAL in the error path.
Change the unmap to match the mapping.
Fixes: 915e4e8413 ("crypto: hisilicon - SEC security accelerator driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com>
Reviewed-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Previous commit introduces a new last_request variable in the context
structure.
Renaming the first/last existing member variable in the context
structure to improve readability.
Cc: stable@vger.kernel.org
Signed-off-by: Paul Louvel <paul.louvel@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Since commit c662b043cd ("crypto: af_alg/hash: Support
MSG_SPLICE_PAGES"), the crypto core may pass large scatterlists spanning
multiple pages to drivers supporting ahash operations. As a result, a
driver can now receive large ahash requests.
The SEC1 engine has a limitation where a single descriptor cannot
process more than 32k of data. The current implementation attempts to
handle the entire request within a single descriptor, which leads to
failures raised by the driver:
"length exceeds h/w max limit"
Address this limitation by splitting large ahash requests into multiple
descriptors, each respecting the 32k hardware limit. This allows
processing arbitrarily large requests.
Cc: stable@vger.kernel.org
Fixes: c662b043cd ("crypto: af_alg/hash: Support MSG_SPLICE_PAGES")
Signed-off-by: Paul Louvel <paul.louvel@bootlin.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
jent_kcapi_random() serializes the shared jitterentropy state, but it
currently holds a spinlock across the jent_read_entropy() call. That
path performs expensive jitter collection and SHA3 conditioning, so
parallel readers can trigger stalls as contending waiters spin for
the same lock.
To prevent non-preemptible lock hold, replace rng->jent_lock with a
mutex so contended readers sleep instead of spinning on a shared lock
held across expensive entropy generation.
Fixes: bb5530e408 ("crypto: jitterentropy - add jitterentropy RNG")
Reported-by: Yifan Wu <yifanwucs@gmail.com>
Reported-by: Juefei Pu <tomapufckgml@gmail.com>
Reported-by: Yuan Tan <yuantan098@gmail.com>
Suggested-by: Xin Liu <bird@lzu.edu.cn>
Signed-off-by: Haixin Xu <jerryxucs@gmail.com>
Reviewed-by: Stephan Mueller <smueller@chronox.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
- sec_register_to_crypto() and sec_unregister_from_crypto()
have been removed, the function declarations have not been
removed. Remove them.
- hisi_qm_start_qp and hisi_qm_stop_qp are called internally by the
QM. Therefore, the EXPORT_SYMBOL_GPL declaration of these
non-public interfaces is deleted.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Variables are assigned before used. Initialization is not required.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Else condition is not needed after a return, remove it.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The "info_name" is never changed in struct qm_cmd_dump_item,
make it const.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
1. The return value val of sec_debugfs_atomic64_get is of the
u64 type, but %lld instead of %llu is used in DEFINE_DEBUGFS_ATTRIBUTE.
Fix it.
2. In debugfs.c, since the types of q_depth and xeq_depth are u16,
the results of q_depth - 1 and xeq_depth - 1 are int rather than
u16. Use %d for int.
Signed-off-by: Zhushuai Yin <yinzhushuai@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The SoundScape ISA driver has lacked suspend and resume callbacks since
commit 277e926c9b ("[ALSA] sscape - Use platform_device").
A plain snd_wss resume is not sufficient for SoundScape. Resume also
needs to restore the board-specific gate-array routing, and non-VIVO
boards need to reinitialize the probe-time MIDI firmware and MIDI
control state when the MPU-401 side was enabled during probe.
That firmware reload can be handled in-kernel because
commit acd4710091 ("ALSA: sscape: convert to firmware loader framework")
moved the driver to request_firmware().
Add ISA and ISA-PnP PM callbacks, reconfigure the board on resume,
reload the non-VIVO MIDI firmware, restore the MIDI state, and then
resume the WSS codec. If MIDI firmware reload fails, keep the WSS resume
path alive and leave MIDI unavailable instead of failing the whole
device resume.
Signed-off-by: Cássio Gabriel <cassiogabrielcontato@gmail.com>
Link: https://patch.msgid.link/20260411-alsa-sscape-pm-v2-2-aeb5682e14b0@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The SoundScape driver programs the gate-array directly from the global
resource arrays during probe. That is sufficient for initial bring-up,
but a PM resume path also needs the resolved per-card IRQ, DMA, MPU IRQ
and joystick settings after probe has finished.
Store the resolved resources in struct soundscape and move the board
setup into a reusable helper. Also factor the MIDI state programming so
the same sequence can be reused by a later PM resume path.
This is preparatory work for suspend/resume support and is not intended
to change runtime behaviour.
Signed-off-by: Cássio Gabriel <cassiogabrielcontato@gmail.com>
Link: https://patch.msgid.link/20260411-alsa-sscape-pm-v2-1-aeb5682e14b0@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The check for the minimum receive buffer size did not take the
tag size into account during decryption. Fix this by adding the
required extra length.
Reported-by: syzbot+aa11561819dc42ebbc7c@syzkaller.appspotmail.com
Reported-by: Daniel Pouzzner <douzzer@mega.nu>
Fixes: d887c52d6a ("crypto: algif_aead - overhaul memory management")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Leo reports an out-of-bounds access when parsing a certificate with
empty Basic Constraints or Key Usage extension because the first byte of
the extension is read before checking its length. Fix it.
The bug can be triggered by an unprivileged user by submitting a
specially crafted certificate to the kernel through the keyrings(7) API.
Leo has demonstrated this with a proof-of-concept program responsibly
disclosed off-list.
Fixes: 30eae2b037 ("KEYS: X.509: Parse Basic Constraints for CA")
Fixes: 567671281a ("KEYS: X.509: Parse Key Usage")
Reported-by: Leo Lin <leo@depthfirst.com> # off-list
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ignat Korchagin <ignat@linux.win>
Cc: stable@vger.kernel.org # v6.4+
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
When page reassignment was added to af_alg_pull_tsgl the original
loop wasn't updated so it may try to reassign one more page than
necessary.
Add the check to the reassignment so that this does not happen.
Also update the comment which still refers to the obsolete offset
argument.
Reported-by: syzbot+d23888375c2737c17ba5@syzkaller.appspotmail.com
Fixes: e870456d8e ("crypto: algif_skcipher - overhaul memory management")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Sashiko reported the following:
> The struct clk_init_data init is declared on the stack without being
> fully zero-initialized. While fields like name, flags, parent_names,
> num_parents, and ops are explicitly assigned, the parent_data and
> parent_hws fields are left containing stack garbage.
clk_core_populate_parent_map() currently prefers the parent names over
the parent data and hws, so this isn't a problem at the moment. If that
ordering ever changed in the future, then this could lead to some
unexpected crashes. Let's just go ahead and make sure that the struct
clk_init_data is initialized to zero as a good practice.
Fixes: b4cbe606dc ("clk: visconti: Add support common clock driver and reset driver")
Link: https://sashiko.dev/#/patchset/20260326042317.122536-1-rosenp%40gmail.com
Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Benoît Monin <benoit.monin@bootlin.com>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The driver currently supports generating BCLK. There are systems which
require generation of MCLK instead. Register new MCLK clock and handle
clock-cells = <1> to differentiate between BCLK and MCLK. In case of a
legacy system with clock-cells = <0>, the driver behaves as before, i.e.
always returns BCLK.
Note that it is not possible re-use the current SAI audio driver to
generate MCLK and correctly enable and disable the MCLK.
If SAI (audio driver) is used to control the MCLK enablement, then MCLK
clock is not always enabled, and it is not necessarily enabled when the
codec may need the clock to be enabled. There is also no way for the
codec node to specify phandle to clock provider in DT, because the SAI
(audio driver) is not clock provider.
If SAI (clock driver) is used to control the MCLK enablement, then MCLK
clock is enabled when the codec needs the clock enabled, because the
codec is the clock consumer and the SAI (clock driver) is the clock
provider, and the codec driver can request the clock to be enabled when
needed. There is also the usual phandle to clock provider in DT, because
the SAI (clock driver) is clock provider.
Acked-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Create helper function fsl_sai_clk_register() to set up and register
SAI clock. Rename BCLK specific struct fsl_sai_clk members with bclk_
prefix. Use of_node_full_name(dev->of_node) and clock name to register
uniquely named clock. This is done in preparation for the follow up
patch, which adds MCLK support.
Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The driver now supports generation of both BCLK and MCLK, document
support for #clock-cells = <0> for legacy case and #clock-cells = <1>
for the new case which can differentiate between BCLK and MCLK.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
shifted by +8 bytes and requires additional bus clock. Add support for
the i.MX8M variant of the IP with this register shift and additional
clock.
Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Sort the headers. No functional change.
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
shifted by +8 bytes and requires additional bus clock. Document support
for the i.MX8M variant of the IP with this register shift and additional
clock. Update the description slightly.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
imx: set dma_slave_config to 0 and avoid uninitialized fields
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmnaumsACgkQFA3kzBSg
KbZ4rw/9GS9rHHX2P+8xtiHVYLZwhua2aCFC/PCDGrxj20ijr5VGjifGzP6pKqtJ
rBUxlz8V264UcOxaLKlZsQSxd/kQEYcMJzCfspsUaKhxvgch5PGDI6WIeIjBrc/4
HXQxNy9LadNXS1KdcfQd1BLv44T3A5VANUdNBWxEy+E4WHRSpoN2kCSdW1xIC4mO
iopoF0MC9w52BfI7wJLjkX3PPOykd4GWGxKwPqbZeaK/JivyOEaLXr3D5h2tKG3Q
pawJzDDbpYwIzYUwECVR+VKrJVAnRT/lmVvust4HdNLmGU5Lz2BnsRsL8S4tu6Nn
xJP7rqXR59E+T3cyqPttLZ8B2/kYBTS9XG6wQlAIh/Wyn3RBXkEGQmV5WpeTvJgU
zF4D4nmY/zXC0sRAu1in9AgyVHkvVLsZu8785UjuVn4L6vP81oCs1eJCjXtYue5V
mQvJU7N/nrm3Bd38ZMlrRHG1cIEnyGgfPh0z+ff+HCBZLEJGLGSDp6D0gNNdmdSX
FYCSVMU+yOL5i8wXny09FyIQUeGrOZcuJ9PkS1RD54Rw+OFflqY+rBinQ2avCOaF
Dg4FgIWhAKF5iYy1SDDTJc6N97OGDJjpLMp+e2KG9nuhEEIue3PqwtqbqXH3Mc9O
sYk1eqyXqBn3qh3W8pxcW+5G1TFrviN6d10/o8zVWZR4YTQu/0E=
=sqdX
-----END PGP SIGNATURE-----
Merge tag 'i2c-for-7.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fix from Wolfram Sang:
- imx: set dma_slave_config to 0 and avoid uninitialized fields
* tag 'i2c-for-7.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: imx: zero-initialize dma_slave_config for eDMA
Now that all of the dependencies across the tree have been merged into
Linus's tree, here's a small series with the following changes:
- Converts clk-composite from round_rate() to determine_rate().
- Removes the round_rate() clk op.
- Removes the deprecated functions divider_round_rate(),
divider_round_rate_parent(), and divider_ro_round_rate_parent() since
these are just wrappers for the corresponding determine_rate variant.
Signed-off-by: Brian Masney <bmasney@redhat.com>
-----BEGIN PGP SIGNATURE-----
iIwEABYKADQWIQSkbTJwWGWqPd7cKQS30t0nXX7AhwUCaZuF2RYcbWFzbmV5YkBv
bnN0YXRpb24ub3JnAAoJELfS3SddfsCHB80A/0zWU0Sn8uQ8Wx3PDdXp1OsMoHeX
T+A5SEbvOUkmhNEJAP9FN94mKKzRt8pZnF5bOyqEUXVpVXLd3iXw75IRbRuZCw==
=0e61
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna21wUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSXAeBAAnp25miWz8/wyLe3vRdXerKrbP6/S
2hMuADaJmZ9RM/eFcLMShuHtPXdGJQ3ny0NNf5caK2R48ACEOepMEGI0H90ayL0X
dkn2pHzjmmPfkQrAMCl0Ul9miqZlYOuFU6Wa2JyNSjnNeHASaLA7be7uEV9HuuXc
1pQKx0ZUfny90rxTRbJbIV0nS+xrvvY+PRNavDTYREejMDbTk7fdWCBpuVIffjs+
5FPuwcTQ2X4l5DBWBBTkAXTyRFl7+QbIIYWCsDqCFyqw4DxMo6JmnvmmQcpgaaIt
wzNdETQpvYt2n7msAXo/Gg9bcd2o4AiK4XB+1/q/Iv+A+GKpeD8raHoN19TOEztf
aVcavTUliH+ro0RByRCs+9jAbEMwz2rzrk1VV7PQUZjFgJxp2EWNf2vxovbUEjup
bgUE5KHKVSCu6awjVTqBJMFL4hmC26m3zqq6oOwCr3//YzIiO0qKahRHNj4dfrGl
I3AG7f6PdtezlPkyfqawA6KQWyaUZdEDIpod3osPOKehnEmNiaDvNtXCc1z0y8ec
5uuMJ8cKprsz2Qc4t9kyCIi7wbPAXfUFiz5BogwTPWx8zLtSlvur7G7YaftrhnIy
JGuKEDrDxEzVbkTxnDOAHFc9zATZ14bw3ZBOW60iHh6U1bSDGWzY451gCP9qTRY0
SgAgKnAZ1Rc/tkE=
=6csm
-----END PGP SIGNATURE-----
Merge tag 'clk-remove-deprecated-apis-v7.1' of ssh://github.com/masneyb/linux into clk-round
Pull round_rate refactoring from Brian Masney:
Now that all of the dependencies across the tree have been merged into
Linus's tree, here's a small series with the following changes:
- Converts clk-composite from round_rate() to determine_rate()
- Removes the round_rate() clk op
- Removes the deprecated functions divider_round_rate(),
divider_round_rate_parent(), and divider_ro_round_rate_parent() since
these are just wrappers for the corresponding determine_rate variant
* tag 'clk-remove-deprecated-apis-v7.1' of ssh://github.com/masneyb/linux:
clk: divider: remove divider_round_rate() and divider_round_rate_parent()
clk: divider: remove divider_ro_round_rate_parent()
clk: remove round_rate() clk ops
clk: composite: convert from round_rate() to determine_rate()
clk: test: remove references to clk_ops.round_rate
Add global TCSR, RPMh, and display clock controller support for the
Eliza platform.
Add TCSR, the multiple global, and the RPMh clock controller support
for the Nord platform.
Add GPU clock controller support for SM8750.
Introduce video and GPU clock controller support for Glymur.
Add global clock controller for IPQ5210.
Introduce various smaller display-related fixes across Kaanapali, Milos,
SC8280XP, SM4450, SM8250, and SA8775P.
Add missing GDSCs and fix retention flags for PCIe and USB power domains
on SC8180X. Also enable runtime PM support to ensure performance votes
are propagated to CX.
Mark the USB QTB clock as always-on on Hamoa, in order to ensure the
SMMU can work even when USB controller device is sleeping.
Add IPQ6018 and IPQ8074 support to the IPQ CMN PLL driver.
Add MDSS resets for SC7180, SM6115, and SM6125, to allow display
subsystem driver to reset the hardware from the state left by the
bootloader.
Introduce various cleanups across drivers.
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmnZe9YOHGJqb3JuQGty
eW8uc2UACgkQCx85Pw2ZrcUjWw/+MmT8kXJIpJXyqEdmfzotpK1sS/6iMKUbx9K+
ZBqpYkdxzIVx5jyLsdEKk5VJEE4vFa6UqMM0z1l9Yi8/N1LH1DZPm62YGi+VUa0p
sPPMnVATF/MEz/Srb99I9CHxH/4ZT0D4HrDlq7RVb9TzcNNFro2RJ7O/g8dO9Oso
hO7GAXDeHzTFHD+jf1QpqzQkh2QI9T4we610FIe8wI5G8oIrkOMJrPL7Gq5h4afJ
dphY8dznOP0GTBTlWd+EkNxdyhpBj/gTz9S1ACVkWS8XUJZ/tb+SJFN8SVWkYZ6h
nL3ba3NSX874YfVbuPTCbJO2Zkf+Yh5KrnvOXtTobnrq1TsKrX1mRu1Z6V2Hqswd
eAItZVimUSzpQ9rc/L2YraIlKdvY6FjCWaxij0oWcWNNee7oU0zhiBShejsE5D+0
86XYNz6GL8p2SsS1Ac18BOe6tgTt9lVkP8K9lY070Y/AUE4KTHSZbIFwMitqtjsY
K+50R5F6BJr/pCGvb5e/mLXyyKfkCviAjCDoR/Ewwiy4yIjJbHusXpyhw4wDULRx
VKdZVW3qtBKT6UtpraVyWv9kh8yNJXxWz92ZmD6Gdr90gg68I/ebc1IUHzg50WDR
pxfZiIsZxzsUdCuN3RhU4nLCl4ALCE/tqtlFhlxXvDrzKmxzhdUWvBy1KFuDdQ1T
tNFq1eU=
=iZQx
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna2c8UHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSV3FxAAu55HnavxZJ9qAhGxWrCLzUsx6Z1p
XVA12ju9qqUf4ZSU30J4h/IhcAcdQ6NZPBzjFHcPdP8xddZKPaN0SBlD1HQ0pqHE
vrLPsDATfLdgEar0KLPzHoieOCQ0WnEGZrCW3DpmGQWqBPZp8eAFmfvDDRZnl1Tq
O+exafMskxxo1EGI9ae4jmQ5a0/F+2Pje6xbDof/MOAFSuIJIHYgoTGxMwx7Chvd
GuqiEGVyXujesJ6oaR/GKC+bEJfiRZ/xJoVFQHfWYNcvkwchKGuMLVSPXcBdDFcU
gw0EhNSeOkXMlqywP+nzj4ARa+9XC5/nHap0LqKNQb3EjQKlbTYcEl3Vd5Sdrukj
t0iiaAqNAvODbXbswYgpr3HwLrDAzDBBgQfStFvXIQY5iOJbJ7URCm6jUyLP77zO
JzQDZz5piCA8dHqtLkKvKjs4+S86u9jtOEIwbjaxZTGHQIIE/RXmq/JmpIHiCX6m
D5zwXs/wRIEdfVknj/Yvmx2Cq5E3rYlEwcqetNEdgiYZLsh/F8gQ9bWj/N0M3VHW
T9S1k3/cF7Qm3ioIODzSNcVgbyNcFOahy6KctyOTsp6ZzLalsrTqTF3J7wZNati6
muwVsKi20EHnweQxzAFvXSFcNgH9OXqNXa9eESZjGu4LvCNj0Ieo4sd7EdX3VdKW
ym7e2vM2R8pRhqI=
=knF/
-----END PGP SIGNATURE-----
Merge tag 'qcom-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clock driver updates from Bjorn Andersson:
- Global TCSR, RPMh, and display clock controller support for
the Qualcomm Eliza platform
- TCSR, the multiple global, and the RPMh clock controller
support for the Qualcomm Nord platform
- GPU clock controller support for Qualcomm SM8750
- Video and GPU clock controller support for Qualcomm Glymur
- Global clock controller support for Qualcomm IPQ5210
- Introduce various smaller display-related fixes across
Qualcomm Kaanapali, Milos, SC8280XP, SM4450, SM8250, and
SA8775P.
- Add missing GDSCs and fix retention flags for PCIe and USB
power domains on SC8180X.
- Enable runtime PM support to ensure performance votes are
propagated to CX on Qualcomm platforms.
- Mark the USB QTB clock as always-on on Qualcomm Hamoa, in
order to ensure the SMMU can work even when USB controller
device is sleeping.
- Qualcomm IPQ6018 and IPQ8074 support in the IPQ CMN PLL
driver
- MDSS resets for Qualcomm SC7180, SM6115, and SM6125, to allow
display subsystem driver to reset the hardware from the state
left by the bootloader.
* tag 'qcom-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (67 commits)
clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC
clk: qcom: rpmh: Add support for Nord rpmh clocks
clk: qcom: Add TCSR clock driver for Nord SoC
dt-bindings: clock: qcom: Add Nord Global Clock Controller
dt-bindings: clock: qcom-rpmhcc: Add support for Nord SoCs
dt-bindings: clock: qcom: Document the Nord SoC TCSR Clock Controller
clk: qcom: gcc-x1e80100: Keep GCC USB QTB clock always ON
clk: qcom: Constify list of critical CBCR registers
clk: qcom: Constify qcom_cc_driver_data
clk: qcom: videocc-glymur: Constify qcom_cc_desc
clk: qcom: Add a driver for SM8750 GPU clocks
dt-bindings: clock: qcom: Add SM8750 GPU clocks
clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support
dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support
dt-bindings: clock: qcom: Add CMN PLL support for IPQ6018
clk: qcom: gdsc: Fix error path on registration of multiple pm subdomains
dt-bindings: clock: qcom: Add missing power-domains property
clk: qcom: gcc-eliza: Enable FORCE_MEM_CORE_ON for UFS AXI PHY clock
clk: qcom: dispcc-sc7180: Add missing MDSS resets
...
Just one change for this cycle, implementing support for the r-spi
module clock in the A523 PRCM block, which was somehow missing during
the initial bring-up.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmnSbpkQHHdlbnNAa2Vy
bmVsLm9yZwAKCRA4mlQhnA8kMPw7D/9hSQ6ivVksNFqWpEQtLdUR6Ynx85Lo+DYW
cW1txhkOpUx3m4LB9H2b3ymCw3urlNMy7Noo7xjm8mrA6pFIL4vcjs17jauz0GLe
meRKFYNn/v4QpUkSIijMW+42nWEq3/eFZYbBTN/VPE46ueC5xDWbHSiHlRly7POd
eW1jawFHgoAaSmiUkGu0qPuhw7m9FMBAATMuJC0RSl4vh2sDimS9Y7gVYrA2P4Qc
M71PFj0s/ATttL5qlXABxpl3idXp7HACkWpnmoZGfNvh74lHTfrHDl5p6v053RGQ
xP8sTFUiZvKSEjfjl8WKvn7c7U732AEQEZlS/Vr0QQfIuJTknRqjWQkzcrqJPfHc
ZrfCingqq6zPHazDDS2GEb3AnFvnh/xy1uULookGilCuLh84OygJlOnzqFxz2B0P
BB0NAa+A6tUxVcgTvmX3Ma6P8QWCSZAvSrPngcRk8uysDsaA026QInfvWpSCVP0W
2xYrTiKq+jF+CxEaMCE/yntKMnIZHIJ2QiB2OAguSkLrDt3LX2JIeniNeKRhb64y
zyy1woky4ecWlGt6lKZH6ceiErEY9X+ckwajvvhKRR7j4kzMQ97d9QE39LsvNWFb
sn2LnA3SIQGQrCOShRlibbk9xSnCRSJJ90GvtaMQOkSPthnDSZosT13M5TWNixYi
zLtmzvCt9w==
=mWuN
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna2BUUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSWzcA/+IiMJM0RK/nsW9GiqeF/cZkvkppDz
LkJF/mIXj7BewpSLKg6jei2WsKur+bwPTjYm34LRbTwv+NAbJKpH+7/yAMzfHcxZ
ushDhxX2in0k1j2W1tAZhD+6PHZgqfM4M/qFPR1Iy/lDafxdI0Fmn7bvg2ODW+TH
FujIvsK734wlIqEM7CPp2eIysiq5tB0l3PPep57lm/LO4t7caarQ+nAw5x04iGs9
wf3FCq6g1zNENFba2t34R9ElCoceizE0fXjpVWMsZ4V9eEKnucUzgNLdGY5KPHjJ
RW8w0jGKZCUSx0j8rEGFCVVlH+d6RgLeXmDKMp3smFmOu6cbIgvYjt5hP2uNAj7E
dINx72hlKEp2Zk9ZYEySNqb3/0r4A3K1PRTMJL5GRFOiwiLsGzSmwqr7jDEBF6X+
uireVfkcGWegcaD5X7f6TrAST+QSO1xSw/LkOU1YInaxgijOb7IMVO13jAHitftJ
CQMvwpmFpqdvngWINEosspvmg5oRRqZJhsg0YIMXibV4juQLVHo/ckcTnuV1ps2R
6jdjgtHQ6r6kQ9laQNvpFG723Wf6UxWxTDP6hZRrPCZGpcHKxjthflhbjhL6gfRp
O2fML2k97JeeonIaz4qClB/UwJpjujLTxRyLoBnqskcwIZeP++IRcE8ghYKm0tMg
B6I0p+dgjgdoYPU=
=uZmN
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Chen-Yu Tsai:
Just one change for this cycle, implementing support for the r-spi
module clock in the A523 PRCM block, which was somehow missing during
the initial bring-up.
* tag 'sunxi-clk-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: sun55i-a523-r: Add missing r-spi module clock
a B addition to the name, but major changes internally - likely it is
pin compatible with the non-b-variant. Other change is actually
exporting PCIe pipe-clocks that were already in the binding.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmnKfKQQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgR5HB/9UT3UM4Zrmubr7ZRhbFiMLkzHpP5icwV9F
AQIdcPfpuH6/2ELckwcka8CElsBBd7uK/QCxd4DSBmwRhC/aYTNa2JknqO9W10Os
h9aeiwLODM6SHePwFrWcL+jLKe0VxuFsVEsy/r3S8L+zMVY2PtnXUib1aAPTpOkN
Ou42CLOZ1BPmpy5zAMl36IM+9SAfi6AtrCAqh3mGxYiL5dLZwHIX9njD2sT9GRXD
IuF8UoKOZx/QEO9ZzjaovcqWe0n0mnDU89GvxCGT6O8yyMOldRHPHmEdBg1KZWge
2q141NagpsRjjX4v7ojOCm7nyohwdLwdmkkV00tMHzeUHDFSbpgD
=/ri0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna1f0UHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSXYKA//U6St12L/7NfTM7Pf/SR/5dZez6OE
qhMATt0JoOMAJ6g7GYsXHj4QoLIJ99UxsKWziqzBpG8IyRJgK1LKOprZQ5rToN43
3YPOG5hXR/tEgMn8ici1sX/NPe37ma6oavQsaiMhYOujRGQIOhEpk/GNFMyvh7g5
YsHMEtvfn6+Uba1LcPY53wk9gSQ/hb413h9QwSJUpYufAySWwlsI8ikKmNnsk1LH
NJQRgX6V4ooafBxcH1iI4nfQf6c3Q/9Ii2Xayu1vyqN1O3bNqsrZRu4/uXaVzNiq
o+8ujowyDCPwpkx/BBIYjfz1F/IGvND6ESQy+m85GyEqw1gyWQALITK7HpGbcQyl
qKFscJBH/IrPygurymhZmeD9oH1wvvoAf3aHlYGQ+kHv5LJegeJq5U2nLsDBvkmX
KXQb8elsfMi7WR8CUaLO2dlnleQkywRZMy1eykBgVCbf5aYwzr0Fhre0E59nGPix
6IacOhuoEjWzXO6D8+1qsH7a8c94sxMoptT4dsLNnAkeetR3K04mfDWC66T7h4hq
kentNCRs/ao59euiFmf0HOXYKFW2XJKXiyli7D2/ts56T0KcgwGrIyd+rOs/uleD
FPOHLBsUT9h7s7lFsVIzbYEUSey7n7fs94f72BoF3WvECLnVK3Ur2CRIMNmADqs8
grmj4ijBxntKY5E=
=3bVg
-----END PGP SIGNATURE-----
Merge tag 'v7.1-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
- Clock driver for the Rockchip RV1103B SoC
For whatever reason that SoC only got a B addition to the name,
but major changes internally - likely it is pin compatible with
the non-b-variant. Other change is actually exporting PCIe
pipe-clocks that were already in the binding.
* tag 'v7.1-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3568: Add PCIe pipe clock gates
clk: rockchip: Add clock controller for the RV1103B
dt-bindings: clock: rockchip: Add RV1103B CRU support
- Add SPI clocks and resets on RZ/G3E,
- Add PCIe clocks and resets on RZ/V2N, RZ/V2H(P), and RZ/G3E,
- Enable watchdog reset on RZ/N1D,
- Remove clocks for watchdogs meant for other CPU cores on RZ/V2N,
- Handle critical clock during system resume on RZ/G2L, RZ/G2UL, and
RZ/G3S,
- Add initial support for the RZ/G3L (R9A08G046) SoC,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCacZUzwAKCRCKwlD9ZEnx
cEmHAP9nppu4sDYIhN4MxkdBJpBYxh4tL/GLYoseA3wePKTtPwD8C39U/H2N7saH
DErFFbszYDK7CcU9O5xSROC3qIYCTAY=
=Z7DK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna04QUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSWIbxAAjYS6YtP9/oFmnb36OJhX6U/w9f6K
wS16Jm3DzcULjF0hjNlcaJDO3gTdPSnObGOwycLFMvWcQbwv3pt3c6wKKh1/7VW+
A0dMiqTpvr7bo/YJzuoEtItsQ008fvQLdMpZLONGXYW2EQWPiJiRP3tTZ9VoD5YP
t7PVV3lo+IOV4zfgxwaku3SkRzafD11zyrVnF6ZmxPr1quwq8YFOkRZavmgJJcDu
foqZ2dnkpL09QHf5zKBRjBL0CbJjRGLyjwll7Pbj9VWCNyDcOwa9JNYP9ZMKJs09
Jm0oHaShNt8OB4EmKnCsLU8qu6TcmM6HoBta6q9iCxvKl5x1fBQ1TuMcpwQgUNKX
kSYgMl6+XM8Y7cjf2DK37tTtajorSbGrB6f1T034/8LDWd+gbGSkYqxxDYrIz8KY
04J+b1YWRes+5SBRF7F0g0U9hSA5ACtZN+FVlUMOwNz18V/xgfHALwvDjialL2/D
6i/YMyrKyfJd+SGliEH6ZJKNL3+IvZbVHqXm2Cu6fX/m2WdTIXSWezBosFc2PGpn
oAhbLcTutOjJ6V28EoQF3lkd8X87lUeNGRNvYp0qGCwzX81rkKSLuET4Qp7fXBqG
SIRfLknwe1Xp/MzL30VMhnyvT3GHNdnfENR2JkLTjKx+qGPvahneQGXoNUWm+aQA
z4fCBT/qgVZib7E=
=1ab0
-----END PGP SIGNATURE-----
Merge tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull more Renesas clk driver updates from Geert Uytterhoeven:
- Add SPI clocks and resets on Renesas RZ/G3E
- Add PCIe clocks and resets on Renesas RZ/V2N, RZ/V2H(P), and RZ/G3E
- Enable watchdog reset on Renesas RZ/N1D
- Remove clocks for watchdogs meant for other CPU cores on Renesas RZ/V2N
- Handle critical clock during system resume on Renesas RZ/G2L, RZ/G2UL, and
RZ/G3S
- Add initial support for the Renesas RZ/G3L (R9A08G046) SoC
* tag 'renesas-clk-for-v7.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: Add support for RZ/G3L SoC
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC
clk: renesas: rzg2l: Re-enable critical module clocks during resume
clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper()
clk: renesas: rzg2l: Add helper for mod clock enable/disable
clk: renesas: r9a0{7g04[34],8g045}: Add critical reset entries
clk: renesas: rzg2l: Add support for critical resets
clk: renesas: r9a09g056: Remove entries for WDT{0,2,3}
clk: renesas: r9a06g032: Enable watchdog reset sources
clk: renesas: cpg-mssr: Use struct_size() helper
clk: renesas: r9a09g047: Add PCIe clocks and reset
clk: renesas: r9a09g057: Add PCIe clocks and reset
clk: renesas: r9a09g056: Add PCIe clocks and reset
clk: renesas: r9a09g047: Add entries for the RSPIs
Introduce support for the clock and reset controllers (e.g. PRCM) in the
Tenstorrent Atlantis SoC. 5 types of clocks are generated by the PRCM:
PLLs, shared gates and standard muxes. The reset controller is setup as
an auxiliary device of the clock controller.
Signed-off-by: Drew Fustini <fustini@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCabgcRAAKCRDb7CzD2Six
DLeWAQDz7ry9bXavkEFqRuoLgC4+VXqCDHDq1eJ7RJivqhl5QwD+Khd9hCdCFLfs
BVObT4dkLX5LbsMUEqFAEJSf4ISoyA4=
=WZuS
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmna0YUUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSVWmxAAk6KQVPihCh8NxXolnXuxwsuGq63z
iU8oGrvIVZ51NBsTVz1s6kT+m5Kta4YL2BNHGhaN3ck6J7twU8gpj23Mo1n/ffn1
XOK7/JeTuXY6jHyWbqNtFaTG+gm2KRxHmFZY27qxqaBItpwXM0v3dZ9kxxDXgvrg
2KPbimyJzoFGrwvywn1Ic5isaW8NyIRVRonrYfN3Lq0dBuX08JLV6p93dy9F1yMe
Z9jVBwszol2KBeDwgOKzf8aoWCkqcH41DBl5bP3fCc8sx4CxUIvyzjD7QLdFOmSp
xlNnEkRJlVX9LVDBlDb+Eel3H2yR/I2jgHzoVYRWdKBRmxQjBabbRccWmyd4vE9o
uJACbOTYhy5eiRpUxV6wuXB+3AP0hDDSSD1k4lgYqxjlz4qsSc7VsAvXGjJ1SyFw
NQNIBZCoImEEMfsutFwE6W8X8G5TIBwbSEDEg4NWwZ4ehxw0nW8d1LEtXwFXBd77
mB948LxJ9pjMCzai5QhFd9qUCz8JER2tGJVxHII8jfmsW407/dcUMH1y2Vp905pW
P99waWf1t90oA2yqyB6k6YcOneo6ItpJliXjqpnKBT8WHfUKytDb4V90LNCq3XiX
Q8OAz1OkAVoLToSxrpAzG/aPqj/sreoDDBePGAEoZikHBQcdFsI0UjiX15eV7XIs
+y+IOBEeMTJMJgo=
=PZOt
-----END PGP SIGNATURE-----
Merge tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux into clk-tenstorrent
Pull Tenstorrent clk driver updates from Drew Fustini:
- Clock and reset controllers (e.g. PRCM) in the Tenstorrent Atlantis SoC
* tag 'tenstorrent-clk-for-v7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/tenstorrent/linux:
clk: tenstorrent: Add Atlantis clock controller driver
reset: tenstorrent: Add reset controller for Atlantis
dt-bindings: clk: tenstorrent: Add tenstorrent,atlantis-prcm-rcpu
A couple of changes here, one update to MAINTAINERS for the AMD
controller and a chnage from Pei Xiao which in spite of the changelog is
actually a fix - previously the zynq-qspi driver leaked a clock enable
for every flash operation it did which isn't good, these extra enables
were removed when doing the enable cleanup which are probably a good
idea anyway.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmnan/YACgkQJNaLcl1U
h9BQLQf9FyBF84+tdZmpjbpo4AUFPkoViQYJH5u8cjkyek+Nsloy3uPtrsJVU0br
94+ImyTmJwaQyLQXmsm05K0GJ1ieo36JlGQNCoLYjlSSSgOU3CUkaIz5Y7QwpCF5
CGnuMErhl4EqhEV/T47Y4ehcrd8NOgoDMXMuThXcIYTN02W7C+rqOELDJ+bUOiWB
c1SDyWYDv+xsK2eqxFHi8u/P3/z+Jth5poX7qeKHeNM1GF40+2/zGTTsqlHC/g9A
GSaSnoPNCgproko5pLQqabvLA444FbaMjUJskv1qvpXJt1cex8e/RbBOe4JGHaWI
z27Bu0jaiGW+B9OT9JTkPfbeTWTQRA==
=PqQH
-----END PGP SIGNATURE-----
Merge tag 'spi-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A couple of changes here, one update to MAINTAINERS for the AMD
controller and a chnage from Pei Xiao which in spite of the changelog
is actually a fix - previously the zynq-qspi driver leaked a clock
enable for every flash operation it did which isn't good, these extra
enables were removed when doing the enable cleanup which are probably
a good idea anyway"
* tag 'spi-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
MAINTAINERS: Update AMD SPI driver maintainers
spi: zynq-qspi: Simplify clock handling with devm_clk_get_enabled()
One last fix for v7.0, the BD72720 incorrectly described which DCDC is
tied to the LDO for it's LDON-HEAD mode which automates using the DCDC
to more efficiently drop a supply for delivery via the LDO.
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmnanvQACgkQJNaLcl1U
h9AWWgf9HlWXVqG7M/tFqKoa1Xyza2EkUiyQWNW1dkiXGipxOg+MOa/yeFtyE6gD
RClIkujt4Tt9dwI91FJ+HfWJ8O+Ux1XKRzCxsAe01gyhf68I4hQ2tl35yVzkuuyl
VXdLHlek1dVGNl94IZQDPHYeICrvGCnk/OC7nf+V8bZU1YgfJTMYvNHrArPy2+zH
SY4iZcJcR+vJwgWnZHeBTwzWPCWurYYz+XAEj7RseAJKqE8G3Idlqd/yIupM5mbo
MhWnl1fP8xjv0tq6xhrwXPowxUt08OU9kARg+Siqy1kKN81tb0uocofUHAVGtBel
y14mFWeRbYwh19yAG72guXSfUfyudw==
=e5bj
-----END PGP SIGNATURE-----
Merge tag 'regulator-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator fix from Mark Brown:
"One last fix for v7.0, the BD72720 incorrectly described which DCDC is
tied to the LDO for its LDON-HEAD mode which automates using the DCDC
to more efficiently drop a supply for delivery via the LDO"
* tag 'regulator-fix-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: bd71828-regulator.c: Fix LDON-HEAD mode
* KVM: s390: vsie: Fix races with partial gmap invalidations
x86:
* KVM: x86: Use __DECLARE_FLEX_ARRAY() for UAPI structures with VLAs
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmnaOrgUHHBib256aW5p
QHJlZGhhdC5jb20ACgkQv/vSX3jHroPTOwf8DW6BXYgHdDOWiiQQETD+D/JWbceG
9fKMdNjt48It3hKWc9oJ2eZU2avRHf7d8hAIUIhOeiUbeVf4QrLUfQXzP9j/9P+T
vRpMlDf5Ampv3m8LxTBGESgwrlRHtWDGUFsE+CcVAIWEQfCsXnbwkeo3L9aCLTgA
ekrnHqsx+Oh/n2+siEp0Nz0n8gT0hCtbqAqJlVcuHpJvzRzeDvcnukvHxjIydR65
uIFY5dahzheGqbPhplGKKAdPCHD+/S6QB+ShqKrT92zeZvhPZrt1XHV4Bt/sKSkP
9uAeuJ+JtbZvMG7n8fCg5ebwqJrw15uddZcV8l3qIuxHzyZ/XzKYhQm4oA==
=7zjP
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"s390:
- vsie: Fix races with partial gmap invalidations
x86:
- Use __DECLARE_FLEX_ARRAY() for UAPI structures with VLAs"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: s390: vsie: Fix races with partial gmap invalidations
KVM: x86: Use __DECLARE_FLEX_ARRAY() for UAPI structures with VLAs
- tracing/probe: reject non-closed empty immediate strings
Fixed a buffer index underflow bug that occurred when passing an
non-closed empty immediate string to the probe event.
-----BEGIN PGP SIGNATURE-----
iQFPBAABCgA5FiEEh7BulGwFlgAOi5DV2/sHvwUrPxsFAmnaJr8bHG1hc2FtaS5o
aXJhbWF0c3VAZ21haWwuY29tAAoJENv7B78FKz8b4PcH/29I02lnjYf4IJ6oiANa
K5+RU+Xq0z+Tn079GapHI9vmF8d9M89bI76fqKAVBGHosk+QTdYPLwupbowY72Fq
5uZPpkMXD+cvNJz0qGEq2WOPeB+VGxq8zR/lnZjhZLupJP0DfBp6SpXS0lFx4d0Q
x+bw6keG7Guq0ocq2mFNWPo2U8bxlh78UrX+pYoIHyjeO+LVNC7X7Ld3aRDebMck
uDnS5oLNMojd4Vi5WYuP1GzGzIUJ0cXDDXnSVqHP5zdt7VV83eZNlfWOKe1YyHEq
FoVTrb3dRFFWn2EdXOJB+DjQXWZeZtUsfJTxWm4UgPgV1DmLmBFurfB8Kk0JmX7S
0XU=
=vHwk
-----END PGP SIGNATURE-----
Merge tag 'probes-fixes-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace
Pull tracing probe fix from Masami Hiramatsu:
"Reject non-closed empty immediate strings
Fix a buffer index underflow bug that occurred when passing an
non-closed empty immediate string to the probe event"
* tag 'probes-fixes-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
tracing/probe: reject non-closed empty immediate strings
Here is a single USB fix for a reported regression in a recent USB typec
patch for 7.0-final. Sorry for the late submission, but it does fix a
problem that people have been seeing with 7.0-rc7 and the stable kernels
(due to a backported fix from there.)
This has been in linux-next this week with no reported issues, and the
reporter (Takashi), has said it resolves the problem they were seeing.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCadofdQ8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ynZ2QCfURKY6dXrKRPZT5L5GXa+wMNKdlMAnRz+9K0L
NEuwv8+EEEDmXKYmngTM
=ZiC/
-----END PGP SIGNATURE-----
Merge tag 'usb-7.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB fix from Greg KH:
"Here is a single USB fix for a reported regression in a recent USB
typec patch for 7.0-final. Sorry for the late submission, but it does
fix a problem that people have been seeing with 7.0-rc7 and the stable
kernels (due to a backported fix from there.)
This has been in linux-next this week with no reported issues, and the
reporter (Takashi), has said it resolves the problem they were seeing"
* tag 'usb-7.0-final' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
usb: typec: ucsi: skip connector validation before init
- a fix for circular locking dependency in uinput
- a fix for potential corruption of uinput event queue
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQST2eWILY88ieB2DOtAj56VGEWXnAUCadnMIgAKCRBAj56VGEWX
nIq2AP9KokKsXT2JwF6E/V9/eQiCXUija5lVu0eUUmjc5CpbvwEA8OTkbCgkHt62
Vux7F+drj4w5p13Fxj0+pgztZW1pfQc=
=KHyc
-----END PGP SIGNATURE-----
Merge tag 'input-for-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input fixes from Dmitry Torokhov:
"Two fixes for force feedback handling in uinput driver:
- fix circular locking dependency in uinput
- fix potential corruption of uinput event queue"
* tag 'input-for-v7.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: uinput - take event lock when submitting FF request "event"
Input: uinput - fix circular locking dependency with ff-core
Eduard Zingerman says:
====================
selftests/bpf: impose global ordering for test decl_tags
Impose global ordering for all decl tags used by test_loader.c based
tests: __success, __failure, __msg, etc. The tags are now sorted by
testing framework to be processed in the same order they appear in the
C source code of the test.
The ordering is necessary for gcc-bpf. Neither GCC nor the C standard
defines the order in which function attributes are consumed.
While Clang tends to preserve tags definition order in the output BTF,
GCC does not. This inconsistency causes BPF tests with multiple __msg
entries to fail when compiled with GCC.
This is based on a patch [1] from Cupertino Miranda (see patch #3) and
includes some additional cleanups for test_loader.c decl tags
declaration and processing (see patches #1, #2, #4).
[1] https://lore.kernel.org/bpf/20260305130035.192080-1-cupertino.miranda@oracle.com/
Changelog:
v2: https://lore.kernel.org/bpf/20260330-selftests-global-tags-ordering-v2-0-c0ac61e81098@gmail.com/
v2 -> v3:
- fixed free(tmp) call in collect_decl_tags() (Puranjay, bot)
- naming nit in compile_regex() (Mykyta)
v1 -> v2:
- refactoring str_has_pfx() usages missing from v1 (Puranjay)
- removed realloc_or_free() (Andrii)
- fixed qsort(NULL, ...) usage (Puranjay)
- skip_decl_tag_pfx() returns NULL if tag does not start from
"comment:" (Puranjay)
v1: https://lore.kernel.org/bpf/20260326-selftests-global-tags-ordering-v1-0-5dd2ced5d9ad@gmail.com/
====================
Link: https://patch.msgid.link/20260410-selftests-global-tags-ordering-v2-0-c566ec9781bf@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
