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1,447,411 commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Arnd Bergmann
|
72216ba360 |
- Add OrangePi 6 Plus board
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Arnd Bergmann
|
2af1017ca6 |
Microchip AT91 device tree updates for v6.20
This update includes: - update the SAMA7D65 flexcom nodes to add the missing i2c, spi, and usart child nodes; the flexcom child nodes were also updated with DMA properties - add basic support for the PCB8385 board, based on LAN966X SoC - drop usb_a9g20-dab-mmx.dtsi as it is not used anywhere in the tree -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaXSQjgAKCRCejrg/N2X7 /ZHxAQDwi48o/wR6r7CGhFiXd/Kp7M4UyLLFRSCnRVF5fM2u0gEApSSxCRrlKkPZ ZNa4bNbNHYnojFjRUQhZ8ByW/07BIgU= =tUBH -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6TiEACgkQmmx57+YA GNnTzA/5Abj1y4boeRfY5OOj/j/rl1xfYKRkBv87fz9QU6XDob4oUx/1MM039md3 vp9oEr9kYfTuzJbiYggZ1aLSU8E1zQ2+lzW2TEUKfQwxn+QimhIZjAibi4ydbkzI 5r25WkBMz379qVp7jdoPEq7/yltAeHxB7Hyiva5RmWZy2QfjIPIV2HWpLK5TU2E1 HC2Si9H7kxLivbAPQn/ZRW0zdRyZxqX8C3NgztfEm97DxicYnf1mTtGhnsVn1VBC Vmeb1LKdd/fiwX2WeJSoahE0x0sLOtkHKHIrmTiURqNNIKCCFg6QTESXR6DKTzOr C2yfnnb/U7633tXK4k1VXWakqDVAd1qNBD70pHkxdu9u1YDVL350geWdGKQWkW5i dGE/5zInuQjthE0TTIYERCDYgJne1ViQUrTVuIEb+h4b6YgIqHrLuw+vMwflxM6B ncbPsPJrJuWF7kwFZ7NA2GFVOyf7J2GAlQILBY3lGeu/uhSoVQ9FUMIdEXWmMMCP myAefEO3laMJEwphCF7UZ8yZPYTfyUtxZX+MbnBKTlrZCO8kai2bIGiCWLC46OIA VMvUQeXW8Ojem0SIq8Mid1AtBV1Y6ad7AULfz8+TBgQEr+ba1pOVGv7vlCK+s1om mZosRj5+2B5r39wgMW8Xhaa2g+xN/DNjTjrkeW3UHIGpKF1Lwyc= =Yszk -----END PGP SIGNATURE----- Merge tag 'at91-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt Microchip AT91 device tree updates for v6.20 This update includes: - update the SAMA7D65 flexcom nodes to add the missing i2c, spi, and usart child nodes; the flexcom child nodes were also updated with DMA properties - add basic support for the PCB8385 board, based on LAN966X SoC - drop usb_a9g20-dab-mmx.dtsi as it is not used anywhere in the tree * tag 'at91-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi ARM: dts: Add support for pcb8385 dt-bindings: arm: at91: add lan966 pcb8385 board ARM: dts: microchip: sama7d65: add missing flexcom nodes ARM: dts: microchip: sama7d65: add fifo-size to usart ARM: dts: microchip: sama7d65: add dma properties to usart6 Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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52c1a896a9 |
- add OrangePi 6 Plus board
- one small improvement -----BEGIN PGP SIGNATURE----- iQHLBAABCgA1FiEEE9MyVaemtW1m4wM6rfNrQFP6hVAFAml0DtYXHHBldGVyLmNo ZW5AY2l4dGVjaC5jb20ACgkQrfNrQFP6hVCODAv+MKZbcHSIc5nGMl6AqIBEeg8t /yM/U2rXXkU9V+XvS9qCxFuX2CAU4Z+IZIghiwsn83a9tB0n8xVPEsuDeB27FEkC d2G9Nsb9mPUzBXEbrUo6/a3d2sD13jlhwMUwjV+SsPLHpA0rX2QkkfUnbIaZbHPp ++0FtG9YGISwEFHjU9VHTJuSg5+ok6ozgT2GpqbapglmBjc+O4Mb/ZfanCiL2ep3 QoUHPAXDCLrdViSlxlwu62LVosvYI5pB7MNclibo2L+VvUp7i4cPnhZjxZ8NwICP 0wHEIWOB2FF6sqjXrNkueunqPMf8EyO19EOwr3MMr+ZzSpRk8tpDKImj6cUVVOHj XC8ue/sy292kDfclR9bLAG/Db8aE+PqqpFPnGdhpDOTrb1WovVA8rdDcaH7OHVj9 6R6yET2Imb2ws4A8I9o4zLGH4/jtZkIDd7FX+D5hVWHo5N/OYZOaETOrfefwWVmJ mbGS2PFkJw6N70FgS0C0FWSyIP8PFXQGos9+W/1t =bCpG -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6TJUACgkQmmx57+YA GNmfJhAAre8gIj6FS6gr0Prw3R8qootQnuEX5o0jw4a+1CoGUIF8/Hie8qJLHpKk IdDN4eYtI/OeHcjf0JlSlx8SzAFdBAaS//IqURrRCWfB8uS9MNw9hJHnaaQJWtf7 c/9nahikw/dC+1oAMulSx166w361UWdQdAOGtwq2kwmLvqI9tOUvl/uXfQA3tqTL vQh0eVNWCQlSoGNYsiTBDYIRipXOlvycEggIFlbTu6lwFfH/HlmEY9A+qJ63nBFJ jKV/BgYe91OSnmsALZwpwLFQJ980yS1O+VN47PkcjoNbjDYBqZKR60eMShC+EoRj GqVrtwdrDVtyBNta0wUCWqESGQ4sggu05fQVt0qcgXglh26LPn89dWRaaBkWRhdx bRK/kKhksQyDIoaxY6m/5ehFBQ0OzWZALDDjaFS6SlhJlsg81xaPBJjp5AWfrt7C JosKP5nNABWWxQPXm8BOHw3l+PQUM8FTQdvEh1Ij5mxT6BMcv/Rz5u9nY3Gcf3IQ 4WweFC7VDzrC/yrsGdSz6fovIhue5AiNN1cRJEXMUYG5FXbbSCeKD1fKg6BlCK5Y XfTxFhrSmQ5GZ+Rx7Fv1yxeTY2HySUd3b0I1GP3UV/3d+2Z8/XG0ZK76eybsfT/X VnZ+ljUbWJJRgvMsOAoQb1kQZRPzfYrCG85jof8KNp1T58l0BHE= =BpW0 -----END PGP SIGNATURE----- Merge tag 'cix-dt-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt - add OrangePi 6 Plus board - one small improvement * tag 'cix-dt-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix: arm64: dts: cix: Add OrangePi 6 Plus board support arm64: dts: cix: Use lowercase hex Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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d5f4e01e4c |
mvebu dt64 for 6.20 (part 1)
Add support for Armada 7020 Express Type 7 CPU module board by Marvell, including: - COM Express CPU module and carrier board (Marvell DB-98CX85x0) - DDR4 memory, 1Gbit OOB Ethernet, 10G KR Ethernet, NAND/SPI flash, PCIe, SATA, USB, and UART interfaces Add SoC-specific compatibles for SafeXcel crypto engine on Armada 37xx and CP11x Fix regulator type from "regulator-gpio" to "regulator-fixed" where no GPIO control is present Add missing GPIO properties for "nxp,pca9536" on cn9131-cf-solidwan Fix and clean up pinctrl-names properties and typos Add missing "#phy-cells" to "usb-nop-xceiv" nodes MAINTAINERS: Add Falcon DB to the list of maintained Marvell Armada dts files -----BEGIN PGP SIGNATURE----- iFwEABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCaXOswQAKCRALBhiOFHI7 1ZdPAJjEC4oWjLAQekArPbkR3Fn3YBsdAJ9BgyoliBixul0zmxAK2WuByY/5uA== =uYej -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6S+IACgkQmmx57+YA GNkaSBAAseR5ujMcJleqDE0x+MNvYA4AYHlr/JP7+fyFkNwG3lKaSegZp9HqUSK2 Bo+t6OyWF+pRVe2h1oeQK1L8NdgZ02m5dVX+qzIvKuggCqTkcuCoTokLhGU/ONr4 EalTVvhkBr+Locv37MIyYZOl+rX6NpeQYG9SjA71mzjR4mo6y3FP+YhQBJmKo7dz WChk+I4otKrLSqjMC0LXNNNykzuUvuAvNMwz8EcBVOHHbkcHQSZsm3Y6Ay4UB4Il M0sx+Gy4NurhekjKu30DN+W75sGBhC0fz/cbbxZ5soylsHvF4Zzq2GF9knQAYv8Q 2KzBZtEOQ9MoXS0RQXBaXU0A0Meqpxn69OJT84hV0kv2yv1yjmtA1IqT6oBcdeQT NXB5LYRGOfYfwO3rus4dNYt3y9kZoICZbRIVDX8Iy1XjHWkCWAGsIHhDrizVhVg/ izr+ex0p/M+Jw3CoPUn3en18lkijhh5jbjpLN7+mredGrLtqi4dx/JQ1IdFdwyhR dvL8S0SV+FdkwUTa1s/TR1HbG1CrUcGv/OVAj9sOidB/mfyDOZ8z0qL460pCY/EZ XfeTvO/SOrzW4buZcsWDarHkobZ73It8kBLMKnFcjyiluLUVlyiKv+uZ/2wPAD9Z pjy1dCqfXCTz4n/MBH5jtKnnRLD3+jvJ1JA5Ox/del33tHmJ7vk= =CecN -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.20 (part 1) Add support for Armada 7020 Express Type 7 CPU module board by Marvell, including: - COM Express CPU module and carrier board (Marvell DB-98CX85x0) - DDR4 memory, 1Gbit OOB Ethernet, 10G KR Ethernet, NAND/SPI flash, PCIe, SATA, USB, and UART interfaces Add SoC-specific compatibles for SafeXcel crypto engine on Armada 37xx and CP11x Fix regulator type from "regulator-gpio" to "regulator-fixed" where no GPIO control is present Add missing GPIO properties for "nxp,pca9536" on cn9131-cf-solidwan Fix and clean up pinctrl-names properties and typos Add missing "#phy-cells" to "usb-nop-xceiv" nodes MAINTAINERS: Add Falcon DB to the list of maintained Marvell Armada dts files * tag 'mvebu-dt64-6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: MAINTAINERS: Add Falcon DB arm64: dts: a7k: add COM Express boards arm64: dts: marvell: Add SoC specific compatibles to SafeXcel crypto arm64: dts: marvell: change regulator-gpio to regulator-fixed arm64: dts: marvell: cn9131-cf-solidwan: Add missing GPIO properties on "nxp,pca9536" arm64: dts: marvell: Fix stray and typo "pinctrl-names" properties arm64: dts: marvell: Add missing "#phy-cells" to "usb-nop-xceiv" Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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17102e756d |
MediaTek ARM64 Device Tree updates
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- Ezurio Tungsten 510 (MediaTek Genio 510 SoC)
- Ezurio Tungsten 700 (MediaTek Genio 700 SoC)
...improvements for already supported SoCs and machines:
- MT7981b gains support for PCI-Express, USB, Ethernet and for
the "GED" WiFi HW offload
- OpenWRT One board gains support for the same
- MT8188/8195/8390/8395 gains support for the DPI1 interface
and HDMI output from the SoC's HDMI Tx controller along with
its HDMI PHY and DDC IPs, usable on a selection of boards
that expose a HDMI connector, namely:
- All MT8390 Genio EVK based boards
- All MT8395 Genio EVK based boards
- Radxa NIO-12L (MT8395)
...and dtbs_check warning fixes for many of the MTK devicetrees,
including MT6795, MT7981, MT7986, MT7988, MT8173, MT8183, MT8186,
MT8188, MT8192, and a dts coding style fix for Airoha EN7581-EVB.
This also includes a fix for the new devicetree overlay warnings,
adding dtbs with applied overlays for all of the devices having
at least one overlay.
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Merge tag 'mtk-dts64-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 Device Tree updates
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- Ezurio Tungsten 510 (MediaTek Genio 510 SoC)
- Ezurio Tungsten 700 (MediaTek Genio 700 SoC)
...improvements for already supported SoCs and machines:
- MT7981b gains support for PCI-Express, USB, Ethernet and for
the "GED" WiFi HW offload
- OpenWRT One board gains support for the same
- MT8188/8195/8390/8395 gains support for the DPI1 interface
and HDMI output from the SoC's HDMI Tx controller along with
its HDMI PHY and DDC IPs, usable on a selection of boards
that expose a HDMI connector, namely:
- All MT8390 Genio EVK based boards
- All MT8395 Genio EVK based boards
- Radxa NIO-12L (MT8395)
...and dtbs_check warning fixes for many of the MTK devicetrees,
including MT6795, MT7981, MT7986, MT7988, MT8173, MT8183, MT8186,
MT8188, MT8192, and a dts coding style fix for Airoha EN7581-EVB.
This also includes a fix for the new devicetree overlay warnings,
adding dtbs with applied overlays for all of the devices having
at least one overlay.
* tag 'mtk-dts64-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (47 commits)
arm64: dts: mediatek: mt8192: Rename mt8192-afe-pcm to audio-controller
dt-bindings: arm: mediatek: audsys: Support mt8192-audsys variant
arm64: dts: mediatek: mt7988a: Fix PCI-Express T-PHY node address
arm64: dts: mediatek: mt8186-evb: Add vproc fixed regulator
arm64: dts: mediatek: mt7981b-openwrt-one: Add address/size cells to eth
arm64: dts: mediatek: mt8183-kukui: Clean up IT6505 regulator supply
arm64: dts: mediatek: mt7986a: Change compatible for SafeXcel crypto
arm64: dts: mediatek: mt8173-evb: Add interrupts to DA9211 regulator
arm64: dts: mediatek: mt6795-xperia-m5: Rename PMIC leds node
arm64: dts: mediatek: mt6795: Fix issues in SCPSYS node
arm64: dts: mediatek: mt6331: Fix VCAM IO regulator name
arm64: dts: mediatek: mt6795-xperia-m5: Add UHS pins for MMC1 and 2
arm64: dts: mediatek: mt8192-asurada: Remove unused clock-stretch-ns
arm64: dts: mediatek: mt8173-elm: Remove regulators from thermal node
arm64: dts: mediatek: mt8173-elm: Fix dsi0 ports warning
arm64: dts: mediatek: mt8173-elm: Fix bluetooth node name and reorder
arm64: dts: mediatek: mt8183-pumpkin: Fix pinmux node names
arm64: dts: mediatek: mt8183-jacuzzi-pico6: Fix typo in pinmux node
arm64: dts: mediatek: mt7981b-openwrt-one: Remove useless cells from flash@0
arm64: dts: mediatek: mt8183-evb: Fix dtbs_check warnings
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann
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16ea3c964e |
ARM: dts: OMAP updates for v6.20
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAmlybigACgkQWTcYmtP7 xmX9ZhAAm7ELMSru+gLcwmy7NfrIvIwMzF0YL/Bt6X9HqZicHTmLhFgJ0j5aLM5l 3Ca5AN/Q2Ouj/Y/pKS4cA4I4I3l12Xs0ZIbPJ6rrYHURzv07VWCZI7hc/N4WBHLe r8uUPFZAXsXLCUtnUMKDwE/e4MGI/ZU3/bULUrpfRNo4IhkPx/d/S76wF40IRDw2 tL5EgY8pMSWdd6GjteTA1vBvkQ9Qey7sOMEqfXp5y0Jt8oK7pIu68T7cR1qo2QWa b/NpY15fnj7Ax2JuoZlqgp47GFqIQHb5a2lwz2YhOl+h3UQvrCJ0fZhItFl+pu3g I5MrjMOQFSBSDOwFAELmgcSlCRa636Cetk18QRJJOtXKaG2sq9bi02clwPFjMQGy 8DOzqNGrdAoP6GGxJ5VVrJfoTHwht/7E/Fu4lGKfjDQmhp3KPTEVIJDecxm7dwrH gIgGcKgKVjlReddZZnpmie6xLJDKA08156jk23USl1vzuLqEKr2eFciOWGBHF639 Ff0FS+0+B0SDWGKA47OwY2rKelJpGCGJuAB2uGabr6RAlJqVqD4aRPxdZpElvYg2 CT4KypRKSgPLKc4mHNHAg2d3r08h15WkrgJoIlSXrKKDEAi/ZzVt0fvPcdnpR2MT 6rfCvxPF+D8qcUbRRPnVMAZkcqxRkA0cGTE/ZkmjPvwZnICOVBU= =Ir0O -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SusACgkQmmx57+YA GNlPSw/9ECVaUmhgOyMC9sWYiyVuT84JRwBOrypzE3xQPaz/FqgEkgyfhpfYszzz SOrx7hVSZjzLL00dC28k7h9wxbIV8IduDIzxjMh9zn09726vHFrG0m8hR9WllK5o gZwWCzU+IpziUhL1ZdDkcDwCkchfzlmJNwPCaa2nzSd+OBD/thG0bAAslILXWr4M jyEcA1nRM2LW4Mmq+JJiwcDINPHu+4CLVV5PE0x0M355bHTi872ZEAFQQuc2maY4 gnvodGX2njtHyvzwxqaFsQOCxoY5yuqCqPYkOAVA4HDOdrF6V+TzLUi6Z6EVOOQD QkvXO0pHR4w7VfDXxxzuP8tOvOobUu8Rq7nLcQ+r/9ZJIKknCTLtJ+yj51fjtmB1 mWx9kATHfLMNXh3SU5LfydexUVyK2ZQfuNxcdViP2NuHwz37Y5AzifRqrTnBzVZ8 LT7l2qp1v6ig5CwE3ZQ0CQs7HP1/SBZlV+xyPq/T41H8HizznL6GT/14VXhOq0dz RvkroFylzOtAxHddH3uTxEsbjhmkIaHv4chyZpcOpYN2G4a+CukitWCaimxoC43C 7WWCw259Tpt/ul44sA4DLlijwCbXZhfS5r4mopf7z+LlnIrmIEFNcE6zNDuQ04P4 D9jms4TRuT7Jywhjz1vfbtoG/WLcolOU3rmoEa1UWdMb2qwmrls= =3czD -----END PGP SIGNATURE----- Merge tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt ARM: dts: OMAP updates for v6.20 * tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap: ARM: dts: omap: dra7: Remove bogus #syscon-cells property ARM: dts: ti/omap: omap*: fix watchdog node names ARM: dts: ti: Drop unused .dtsi ARM: dts: Drop am335x-base0033 devicetree ARM: dts: tps65910: Add gpio & interrupt properties ARM: dts: omap: enable panic-indicator option ARM: dts: ti/omap: omap4-epson-embt2ws: add powerbutton Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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d69af478d2 |
Allwinner device tree changes for 6.20
Not many changes this cycle. - The A523 family of SoCs gained support for SPI controllers. - Some cleanup of old ARM device tree files to fix DT binding validation errors. - D1 and A100 SoCs gained support for their LED controller. This was from a couple years ago. The driver made it in, but the DT patches were missed. - D1 and T113 SoCs gained support for the internal thermal sensor. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmlyYQwQHHdlbnNAa2Vy bmVsLm9yZwAKCRA4mlQhnA8kMFqoD/kBtqBUjxCfaFQRfAwn7COEaAaSzA+aITsH V4x8YKgnuO2UohU/hc2H4K1VjWbOWTSmmolcpx/X4zg2ZrlpLOSsKlrPHOefrkEv VwtDDCkg6V/uaKzvAD23CoEwmCBCidu1giErSXsdPx8eh4LNcX+7iTgGdkQWV1dg w8YfOs8b6RLuajg2SRgsMIBMTrcIEwE9gwoRZZLTDbXWtT7QlfkxQcXvu22dhJHp m7zSowBLqNvA7sT0bq1ue1q58EEMWRTF7Tx55ssNp6j5O1peYQLc3if/5j5371RQ M0MCLZidzmGd/WXHwstWr8WpYuVjrjApRPmE5xE6vMFVTPwWb7192FJE2zHahLu4 gsdSp8D80Ktma3PM2w6iKFMNHsDtUb2ec1ZuXEMVEadoqwFKDw+4611PW8vZZaPm BpFut9ZyKq9mx+5of471MQlc3eUZMgKKZqrX29k8Ycm3hoKl2iix9h46/082x5s+ APuFgfztNDNe6B4Zb18UgM+q7oo1Aa8tOBdguVoK4wlN0HLDCX9WCMdm6zqTLgAz CmThLzhILlaxrdEIg2HkuoviYH3sDgqljIZl0t4PwcYCJgjlg4fidVuak6Lqul9x hXcc2sOR+Yh3hfPinjlR1Nq3bLElHvaGOLySC1vWFahZSuqspkjyZBLlmubTpvUA IMwo4kdZrQ== =cdhO -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SpYACgkQmmx57+YA GNkBKQ//fWsWf/YMInaMA1vMorES5pEsYrZ8Tyagfbeziekqrr+XZOMHWhwc5HjS OOSSvJsxCpL2ox1WwvCUAOwPXGAaSCmnfQyGPn90vmj9G+McyqIiAOwO8EXZnOUw 6pFZztTEJrShQOBYROdNtxnRvimOslWQZCnCGODCa7iRkovKLDPO8dOt6BXCnVNt LHu3sXp50BFw2qIEUdnpVo7cGPaWC/yOUuoRqJrF2YBzn0sddye7I8ZF2TamVREx EpVoRgnxvkvDe7w4WPEqaz0qujbZWsSvaQfcd2/D+pSIiI/wjhqdkV3u+QBiP5qZ UmfrzliXn8Rb+1UG2Ftx/jQ+0hZ6I4i/vEUnQTulgKv6nakId5w5gL8Vhyh+TY57 ZardyEuoQgAdhW0uoUJyQkV+Q9VZ0vurAxlDPDkcCIrpaWQeDuWl1p6EOAmtK8+N ADPzYAuoE4uNfnYIHbYodfXbILR5wFk8XZ5sL95Kku6YbpYkzRsSHDSdRYTzm8ox ST74jNrl2TyrJ5iRIDPhxw+IeYFAXP9PVsvPVICTOi+ssQApM1yjBysPNZJpnC/1 om9Cf7DPFMhSDu+S1EyKgaym2uUB92ooMz7qS7wYOpJdoCk+b5KRIgxLUeU9JGAV K50/oNs3BfGLS3B1yxCPraeUR086jJU4BVuk/OwXN9N60IRG8S4= =X0CG -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 6.20 Not many changes this cycle. - The A523 family of SoCs gained support for SPI controllers. - Some cleanup of old ARM device tree files to fix DT binding validation errors. - D1 and A100 SoCs gained support for their LED controller. This was from a couple years ago. The driver made it in, but the DT patches were missed. - D1 and T113 SoCs gained support for the internal thermal sensor. * tag 'sunxi-dt-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: Add CPU thermal sensor and zone ARM: dts: allwinner: Replace status "failed" with "fail" riscv: dts: allwinner: d1: Add RGB LEDs to boards riscv: dts: allwinner: d1: Add LED controller node arm64: dts: allwinner: a100: Add LED controller node ARM: dts: allwinner: sun5i-a13-utoo-p66: delete "power-gpios" property arm64: dts: allwinner: t527: orangepi-4a: Enable SPI-NOR flash arm64: dts: allwinner: sun55i: Add SPI controllers Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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91e93edc63 |
Amlogic ARM DT for v6.20:
- drop iio-hwmon in favour of generic-adc-thermal -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmlyOPYACgkQd9zb2sjI SdEHrw/+IXwVP3ixYhz/obnXqfOLHhP3A08DUyT04JUnUAyYKnpqC3XySTGrJ96F ZRdXWbAfNuVoS9AmHFGpmImxy7DaYW7EBpmfS/CfvuJU6cyc1MHtYQGtLxfMdf3r BMwQ3SN9geG4ITJPSsU19wtenfaDIUWROyGiuNkTl/0VTyfTFTCD9db9dWj5VEwh qae5yWQ3mcCj8LTGMKwxLZKcUWNelfnH9VL72KtOmlkq8ivLgYR3QiItz5pkXVK9 kMrHsvIPnv3RDBOjh9CrON/ustJINm8MG2d30Y/i3ruJI+9AmW3FGCW9qXLMi4v/ AnuqnzVF9JCsnRs2o5dWepYCpScFqhWx9QDwuJ7J0a/Mok+cQyF4XQZ9IuGQfC7i FB3ieqFId4LK6MgdXIYfbHDu/9XIpenZNMkCto4DWsx065ApbiCBaJchpwCE3X5b XdBeF/w1RCQ840HZqJwdiy4jValqulzd2VT/9fcB9hXHE6gJ6e/mc5+i+YHjPppB m461Jthzupb3GwhOEk1WLjmd9YEWjPnvNqUGJvkbko0gPgutWlSNhKaFyhZbYNgy wykwFTkB2VCG/H3vwaMfIY/36ahTQIIh2XjyqMLHXGm0vTqiIfZzxsuD1fzLu/1A fkgMjuErVEjCPoeonlUbf1QNX27372TFh+e4/UPclsuLtVVVLpk= =d2tq -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SnQACgkQmmx57+YA GNlizxAAkN7/OuaqmyL1sn02YKSXJFjtrQGukVoH/YRfVWx9+HLNCJCevkGzv97e MSFvWMkZlf7rQ2teLAouUzxxJmvt6mH8QesB0RzZkuhi+iL1W0uqZOJa/w15+xRk jT2tbjHusF+pPP5hSsPcyIrvyAvJaQWuZ++M4EUXZ+VZaV6GjCL0ILb/fUcPfpHQ 3Co5b3uzHfQxCpf+LsXA32IMnY3tc64EkHsg8mjUj0P/rtBdM0ueMRn2HM7zon20 XYvVDTA7hmZLQlT7pacrgxnmabQ1xcX+29kKwK7OGBsq0j7wHDpWGc38blA8lKB3 p9Jr0A53mgFFNos/cdyv4y9TcPFkZZbM6ZklFXGMreHaZRP5Dmy7PGZSiJzl5QPj fDY+1x6lxLbkb6kdcdF+RJ0J34flWkmEhGRlpJPnQTUytC/B0zhIPlk6J2GoU/x2 cX+Cq0I8DgtTl0ifyEiQwd+pHp97Mn16E5qyKBuuJZf8jneGpuhIN3gKXVwBPeu2 uf4u8oy5KMaEj1DdRGYcrSPbWbG66fnrVqw7xE74iJoDGpsOi2dPfsqHk3vOfAjg Yw+DwbOONeMawirF5Ymt2cMQA24MNNTWA9bGIogUfJsnOyB4vsCOJiNSy//ADkZ2 6bNNsbtu6+0xU5NPh8Fe335qA8DniPi9ja4O4lQ70FrA+KgCiLg= =gwvh -----END PGP SIGNATURE----- Merge tag 'amlogic-arm-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT for v6.20: - drop iio-hwmon in favour of generic-adc-thermal * tag 'amlogic-arm-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson: drop iio-hwmon in favour of generic-adc-thermal Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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3b2db85f48 |
Amlogic ARM64 DT for v6.20:
- Cleanups: - Use lowercase hex - Use hyphen in node names - move CPU OPP table and clock assignment to SoC.dtsi - drop useless assigned-clock-parents - MMC clock fixup across multiple families - Add type-c controller on Radxa Zero 2 and enable NPU - New board: - Khadas VIM1s based on Amlogic S4 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmlyOOYACgkQd9zb2sjI SdFkUg/+KwyUOrtbAMmiGTjH389KkPMfl9xxlUEG1SMzK1Kwo5jSuEsxW2aBGACm k2cW4grqr8tQGBnjGky+Q/r/43jJwatxmM0267y7HumLsCBr/K7fJwTnDNgHNZom agXk7zeQ66daZx0AsqmCrEkU0q4QT1QrtWcqDFXiC7l3Ks39nOZF1J/fAeDIJ5Ee 1vW6aPw61KOjt5EPW5hniI4hwHeWn6BEbzFiHypC/ui4rE+MHwHOGzoajmubXisr ZwShcYrarcHc68L9rG6wKFRcjR7/F43lrn4aubKgmLELBsNEw0Yh28BRML5eFaXO zQuwsx1gqrtfqoZ/25ekSH2kJEHsExsvrJtoYz+ge7+E+LfkJEkA2X1/Dpxt1o8+ fWjtpP74Dq+eY6SXLjOhsau1D6KmSSrogy/jkWGeTyIDbF89rd1DeXTHWk6LrbZh Thf9rfmzg8TViOSqdV/2nrWoUzPWarL6nDPYYmxwlSaLF6VLB7x3QoBsztVpZIul fANxgEk3UealrLFdX7OMZ2fYAUNZVtczYi5UBKTpnH/nfi5qRU83/vzHvBR1cO1e aVJKEqTQjaYFDOGMycVtSMRixmZVai5X6T+rybmaTyunKLVl/GK8llEepIN2Tnyq othg568pfQxkb2LMaXDse1f9YMDplwBX4NJi1eiBIYskyy/zHuM= =8p3n -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SicACgkQmmx57+YA GNlXRA/+M25gHJO3F5fjWCjKmU99RkIAXKvzI/UCplhPFuPMl2ew1eRLgGY5sDXa K1AHf8F3OL4za5TmSItbrsmDXDEtzPU8uy+1PNFJocxC2OxDkz/00ehLCg1vjoSM BwfClRk6XrynGSALWxcM/CBj7QBXpfYKwh1/bY6huHjiOGls1lCzY4LkAhv2qYrF UBv8sS2jpcybR+2ocYIfVTXYnQqlrk2IECyig9Y8+xducb3LbIQSBT3M04iwp9YE bHKS/Jt38cUxM1EoUvpURe6YIwfzaBTri0lAg2RjI4p91D4H/Dap9dmwgQkIfJ5F rCEVATrlZyf2LmEyCouCtVZ5gw8um1naBGjxXHqwbsljDD3Jv0Hh8NPn5Hbaynu1 0ee+97WPTsSjalszTx9DfDWw0u54QZGdmuUnK9wkISzklIOMkwtYkG8j/vM5hYjt tNjxtgiapwKp2BcuoiEz2OuvrDrYajp+/Eavh5OhVTtYy7BSiostiksQbtz4LDdg 2Z9pQu7kiutC10FYODDOWGaRaP2CpXDHFBYapFktl8XUu6u+lMtldrDqNyMRVITE S2YU9+RL4/oaV8fRKj8YDfSOeLQjrZcCSQisPVp6OTP4hhKtFNUKgeD263j6VSch gFzvizdwDRbzR+AM/EXgT//U1J40qZarwDj+LuqKXX4t3lMdCb4= =NTMJ -----END PGP SIGNATURE----- Merge tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT for v6.20: - Cleanups: - Use lowercase hex - Use hyphen in node names - move CPU OPP table and clock assignment to SoC.dtsi - drop useless assigned-clock-parents - MMC clock fixup across multiple families - Add type-c controller on Radxa Zero 2 and enable NPU - New board: - Khadas VIM1s based on Amlogic S4 * tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable SDIO interface arm64: dts: amlogic: add the type-c controller on Radxa Zero 2 arm64: dts: amlogic: meson-sm1-odroid: Eliminate Odroid HC4 power glitches during boot. arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable eMMC storage arm64: dts: meson-s4-s905y4-khadas-vim1s: add initial device tree arm64: dts: meson-s4-aq222: update compatible string with s805x2 dt-bindings: arm: amlogic: introduce specific compatibles for S4 family arm64: dts: amlogic: Enable the npu node on Radxa Zero 2 arm64: dts: amlogic: g12: assign the MMC A signal clock arm64: dts: amlogic: g12: assign the MMC B and C signal clocks arm64: dts: amlogic: gx: assign the MMC signal clocks arm64: dts: amlogic: axg: assign the MMC signal clocks arm64: dts: amlogic: a1: align the mmc clock setup arm64: dts: amlogic: c3: assign the MMC signal clocks arm64: dts: amlogic: s4: fix mmc clock assignment arm64: dts: amlogic: s4: assign mmc b clock to 24MHz arm64: dts: amlogic: drop useless assigned-clock-parents arm64: dts: amlogic: move CPU OPP table and clock assignment to SoC.dtsi arm64: dts: amlogic: Use lowercase hex arm64: dts: amlogic: Use hyphen in node names Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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332a1ff488 |
RISC-V SpacemiT DT changes for 6.20
- Disable Ethernet PHY auto sleep mode - Add pinctrl IO power support - Add K3 Pico-ITX board - Add support for K3 SoC - Add DWC USB support - Add reset for eMMC(sdhci)/I2C - Add PCIe support - Support PMIC for Jupiter board -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKvBAABCgCZFiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmlyLBMbFIAAAAAABAAO bWFudTIsMi41KzEuMTEsMiwyXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25z Lm9wZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXRCNUJBQjhDOUMzMUI3MTE1NjcwMjIz REMzMUFBRUE0NzU5NERCQkVEAAoJEDGq6kdZTbvtjlkQAJeh1kIb3QBscszEhgbK t92qwSMaG2sEXVuX0XIHjVRH1v0wgDxZLb21juqtln9X1yvhWE2dtNHRKToY+t4L +IjfIRULrqkzD9XrzTLlmU+OLfv9s8+j4DzXfaloCjSesBaJL3DLO5c4b89cYN2V Ze+9JmHUrG7o1PtD1YT9pyWp09uYi0+JvPJTG2t1xvLjBMhRpUp2A0Slo9yTIqEW fFz+irms+O1Ee70l/QNIPp6IBwDfOGXYNZr7uheQcqwTYkY7HQW3MhtWzqGdU4rI UJ2MJj01kfwHON3lHX5RSYk+Mh+HfjN8lRc7oiCrp4AOlHULOKHsKVbNKMBWmphz m/EopGThH4dxQYOJEFommTPYfDJ+hRadfAQZ1MDKKJM21biN1xgJ3kpw4R4oEHhn u7FgSGp+yLmSNSu7Y64f3Irq3Oq1lmaAuZKFQjTV4KZsnVPmajkBBcZ35KmpXsi/ A0rip/cTGSattKNKWXuCHJPk5TO6tSmDL961osQj3N7QrpNSFVH/15Dt6fkSH7yu 3qF3JZvCZZQljyeAMO3dvTFQhPf7oR9IZipOtF9XjDMzTmIXGCnr09dSEiFjzifQ Yr9KNJLf0HnyHpaGRBD8+W1PQnWZ8vFbLTy5TD9j7I5WenCu3IOr0c9pheavuwtx LROP3e5r2pZEjtayH1qfFiqZ =Uyut -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6Sd0ACgkQmmx57+YA GNnayw/+Ioh+CJ1VKDjVXpMHEl+Siw0Fmk6n61DaNLxkhwD+tfx24ppJDsaI5I70 GmTRa7TH66iTE94KSbu5JJCWcIbBdVSQsoPUCqw62psie7SQB90BlLf+l7oKPUYi E46pUPr1dGSuuxRSsxFS9WFW9ura8MYYYlaUStOI66aYJoc0mVbwsekaZr3PCKr7 5QQUtFDCkssr7iR9T77mVd/EAfk7NIwGkLTYlqfekV4FDElkD0n841Vhl5Dhwqop 1kwMjYLzHTQwvzErB4bx51vFEj4GwHd4ukewa/Jht8OWsS2/lVA2UjVgH2at6asu VU6cC8RUFT7oZX4ytYJFa8wsNwzU23Ckj2xtjOg0ctpYTCuMmVvqA47r6vCIIzwS gnt6Smy9JWHDS6jvB4Xf5j0TV7w4luOPkng9QcH0O2NmZU50I111ryrsqGxS8vjv qpGOcZGJGalwGSyHt/lyZJmNG5K9xGU58Ws0tWihaTNSLLqDCOVDg1w6AmbCCT/3 wldnbzofvreogKCgqWyOU5neN67MYjGdcRge0jt/gmMEKF5eCFmRaU1NtapNeFFD yQfaXYEKPUIQx7GvQGH/5Lp0DgTz7Y+jhFnN/H5JfC6zdYF6OAe6HT/cTeJGFknQ qMJyh81sqlEQ+iJK+k/Y3y9KPAE3Km8DbB7kfJjDsdu8KO+61Ao= =dXF9 -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-6.20-1' of https://github.com/spacemit-com/linux into soc/dt RISC-V SpacemiT DT changes for 6.20 - Disable Ethernet PHY auto sleep mode - Add pinctrl IO power support - Add K3 Pico-ITX board - Add support for K3 SoC - Add DWC USB support - Add reset for eMMC(sdhci)/I2C - Add PCIe support - Support PMIC for Jupiter board * tag 'spacemit-dt-for-6.20-1' of https://github.com/spacemit-com/linux: riscv: dts: spacemit: Disable ETH PHY sleep mode for OrangePi riscv: dts: spacemit: pinctrl: update register and IO power riscv: dts: spacemit: add K3 Pico-ITX board support riscv: dts: spacemit: add initial support for K3 SoC dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC dt-bindings: interrupt-controller: add SpacemiT K3 APLIC dt-bindings: timer: add SpacemiT K3 CLINT dt-bindings: riscv: add SpacemiT X100 CPU compatible riscv: dts: spacemit: k1: Add "b" ISA extension riscv: dts: spacemit: Enable USB3.0 on BananaPi-F3 riscv: dts: spacemit: Add DWC3 USB 3.0 controller node for K1 riscv: dts: spacemit: Add USB2 PHY node for K1 riscv: dts: spacemit: sdhci: add reset support riscv: dts: spacemit: add reset property riscv: dts: spacemit: PCIe and PHY-related updates riscv: dts: spacemit: Add a PCIe regulator riscv: dts: spacemit: Define the P1 PMIC regulators for Milk-V Jupiter riscv: dts: spacemit: Define fixed regulators for Milk-V Jupiter riscv: dts: spacemit: Enable i2c8 adapter for Milk-V Jupiter Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|
Arnd Bergmann
|
c8f7de01d9 |
Samsung DTS ARM64 changes for v6.20, part two
Add DPU clock management unit nodes to Google GS101. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmlx4t4QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1556EACSVx9fbk3LlULtLAtOk355gsQCLteY6cTz 9sCOCErGe7szk0jtV3bk4vrKg/ONwM6g5hUOfrZlMcHuQZdjd6PHNKdQLX5+RKWc 2mA1AKy2p1LfrVUyka7fiaEU4xYEHdb8IUamM7aHjBhIp+5+t6YMvrCuOcd1/QYK sOwCP8sT+mVQJnpu+k26XoBMulZfB1HGWL43fk80y94GhQX6nLMdHrSdlO+SShaa jTBD3YHfllmlUQdmAVeSJiMy02goivnjoanPFG32j+4Cn+KD/8w+yz/aMtrBynvS Pwdo2jX6F8J3GsaoqFkutps7zGEPEFDeoaFQgcoD/mWng3iHfluHIKOoFLGTe59W AkSngskkHhUPQGUSYpRap5N3CYmBjtBliks5FlSChqaz1baP+YXmIFz2uquEm0R+ yNo8Jpx4hSH7+YzRNPshLRIkkkhJKPDCMj8umPC+Of+aA6KTeijHV+uhWygsLjqG LmpWWwLMIWzX0yTtW7aKZ7oxzekB+sUVb5A87QtnM18zbINDX1q+zxdKF4iMvfqn DndeJOpfDu8b13aZ8MEPUuXmGk6aYQwP4dhfv0dc76yToms2VKNLywic+qQsnB95 td83D2KXY2WYmU7jTJtw+4ivkhD4KgEAg/5n1fIhv0IT7VrZmumBZdfhr5lDLLYV DLoyuh6qzQ== =LRtY -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SUAACgkQmmx57+YA GNkLgBAAqj9l8kZW222GMkdwO0GxoPRPG+IQdQMLD/Z7y7d2NLajpzMhxQnMkkN/ HdNFRlEercKQ3OWuilnHbw7hrx61LSbmiVOWiDZRrmI9Wxh7YBSjRFx1WKzk/EZa P9LjLd9A2NXRxcCnA/QT54BKJHtgHnaI7uzYTHwFEUcGu9hHgh9dm6LXuQCweGeL 0RirrXJ1cylnLgIM09NwwTcFRobpElWbMGMy45+hw6HSlpWNDCaob0KvfkE+J84c Pj8OHb9+NILaZhuMEEtnWzymxu9Al8s9TPIFUsv/rx4r5S7kS9klZJqISrwWRc5G e+7rHo8QgTM6j4S4tal99XeNAEm/I+l/2D2GoB8xxB2vpiyhdXbRkqzGxNBw9Ras jRtC+ykQGG5i9d1DLzA6SGpglrYU0MYZKvTDDSOLGmHtDpP0ttgnhNpaWA5jHD6t zLmnHbwpFrTLIF43BHeSlMf7s3wtY1jlCQqtKj/egxyAgooBj12Krc0IDug3cebV nJv9eG9dkrO1KQn4Eeds85gsGaZs2Is0e03C2nyU9isoNqKyFLWeSPgZHGii1FSC S6msWCPfo9Yhiypq5/Dpnd29FN7dekpOp1qVSHuPyhNDbPHcIB8ROPO+Wv1Zsuur hlljRvYKQzDj7NzysR9xyRnvkIOI3FJRxy+m0BdtN0zOe7LxkwM= =2Af+ -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.20, part two Add DPU clock management unit nodes to Google GS101. * tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: gs101: add cmu_dpu and sysreg_dpu dt nodes dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
9587fe4928 |
This pull request contains Broadcom ARM64-based SoCs DT changes for
6.20, please pull the following: - Peter enables the RNG on 2712 (Raspberry Pi 5) - Stanimir adds the watchdog DT node on 2712 - Rob removes undocumneted nodes, reworks clock nodes, fixes the "simple-bus" node names, and cleans up additional properties and nodes for all Broadcom ARM64-based SoCs -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmlxS/AACgkQh9CWnEQH BwRNrA/+I+5GNj06qVBpUFY5W7xbsyhfLJnCfWzTl70Z8zSxIlb7oshSEMDXcgS9 eFkOSAfbLCR+qD+A/jQYLmGs4Aq8PL/7CcFAYGHAHAKXf9eTLsY4aRvXsVvxdG1O ACRo/B2NxQ5GpUae0kN+I3oRWkJNsSMp6yIa3MGViFwQ8uR8SZMEzEMOJQ180vrq aqcoRpzrkn/pzxVSEReofdaodg0f1NCA6zkig35uMZB1wMWd7F1EgERx6dUYLnjX AwqTM08uwcVE8L538FgMaQFHUnmJVZQaxBwm2CdWI9VpEuBbODPLDV4n5wmhxV+i +7bRovIwriEd5fLlhnqBRgQYDeUxFhaoDEMH4AROx89xCsgvvYAtPyazODFVXTYq 3zETqE352IAAdofeEqvQKb1KIP9YvzFTBJxIC1DuyiZVZ2pGxFrrpHV2GHxAyAjc jCGNs3QQYPL24HJkkuqtch7yMjA18WLTiKT+6NmdNmnlrFELt2at8QAnWR5EzYiK V6i6ac38kKiOlgKuuEkJtMvmYILefRQXH3p5w1D7HGQ6Hz6JrgP+Vrfxi5B/pMH9 eyJyr/c0GEJH0pvHcKkaeWKv9swCXALk6GIrcC88D0Tefxgd1yFBBhOu6tRMu/87 8mbWEfJIRzgqOzdkv/jENmRveGNY3fVZaxScQfvP+GWi5p/47eA= =Hjv8 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6SMAACgkQmmx57+YA GNn9/g/+KXB0vvCklipVb9uwmYGeZfqR4ndmsN3/gu8HW/sryFXwSiCosm64gnd5 RIGDu+iYWwI51N4J7cZo1MsYG5Bjw+xjwZVazY5kavU5tgyYipr3YH1ypgi7fVuF J3vV231R5Hp+LPgsTFMlaMxqgYplCNccNVN3Cb+mxghaxGJQfeetagOUmcIwpOqz 3qKK60ecHxbEtNUtXlyPx9MoQftcWEZ5GgKgycicoskxHjzRpx1DHead6+rDcQ6Q 4fBcZR1Ldyw8kMTctRh4dO1Ce1z0qTs1HA3bLDlW0ppO2yMf3KDfNv3CwpVvErLk FrpmtnFyRn0waBgksjxFe2nP3mUG8y1BS7g3Id60Jfi95GcHZU0D3qvizJxK0yzv PXxoUS7wGERFvOkw8+ibgoPPFODsQkE0tWWm1cnvjFO4BLauZ2SccSdE9rN6MmSu qtP7Wl3crhB9X+sfNndmHwNrJ29TQS5ddB2TKmgnvNhmdsEhr9fKvNGYBCWY54jE xqqb55qlfRW3IB0fg78ugaw6X2ZVZMCsm58KwC0oKGiwCJdKTmHJxx8zrNh7Bvc1 qrS0dyysRVjvvUHLUhWZUvGvbs6q9c/votb5MbyMoDk1h1yDGw3TpAQf4CJWnXrQ gm3SXM3YNIPn1GDeFxCdAKC3qniLeACKCHOZYKR272jiWRBmdEo= =n3rD -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM64-based SoCs DT changes for 6.20, please pull the following: - Peter enables the RNG on 2712 (Raspberry Pi 5) - Stanimir adds the watchdog DT node on 2712 - Rob removes undocumneted nodes, reworks clock nodes, fixes the "simple-bus" node names, and cleans up additional properties and nodes for all Broadcom ARM64-based SoCs * tag 'arm-soc/for-6.20/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4906-netgear-r8000p: Drop unnecessary "ranges" in partition node arm64: dts: broadcom: northstar2: Drop "arm,cci-400-pmu" fallback compatible arm64: dts: broadcom: northstar2: Drop QSPI "clock-names" arm64: dts: broadcom: northstar2: Drop unused and undocumented "brcm,pcie-ob-oarr-size" properties arm64: dts: broadcom: northstar2: Rework clock nodes arm64: dts: broadcom: ns2-svk: Use non-deprecated at25 properties arm64: dts: broadcom: Use preferred node names arm64: dts: broadcom: stingray: Move raid nodes out of bus arm64: dts: broadcom: stingray: Fix 'simple-bus' node names arm64: dts: broadcom: stingray: Rework clock nodes arm64: dts: broadcom: Remove unused and undocumented nodes arm64: dts: broadcom: bcm2712: Add watchdog DT node arm64: dts: broadcom: bcm2712: Enable RNG Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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b2a29633f4 |
This pull request contains Broadcom ARM-based SoCs DT changes for 6.20,
please pull the following: - Rob fixes the simple-bus node names in the BCM2711 .dtsi file -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmlxS1kACgkQh9CWnEQH BwQowBAAhQVEA2CbnYw41rScol49Yaj5c3yKfLU1Y3MxGzF8LzR2AQu+cwk0HHXR yMAoOEVD8n+KwuhWa1/cp2A1obey8TxtjHZAiKsYnG5ycgMg5JTS5lORJTg/CT9M Hlh89WLCWDXCEZHDIGDNn1iSq+6RXYfMT4t09tpbqlZ2aKOi4SBeZ7D9xwn0IqQ9 LjtjgymN2rNSqO7EeXQPxnjpEJQj0RfxM6/mtsWSobaKaf1JdZ7M9Rt/YI3tKEN9 /Y0nZazkBfi5lCWygL9kPjjnlX6wGPRyhiuGwNiytP70Gy+Cka7cffG2ao+lQgly ftRFlHVgEjdSf4DKWsYXlEQ2oTvtRmx7L5FEjg3uCYXUW/GN2ctYsiaVMHBPx0JQ 6z+TuOC/FGBMiEDoZI90sEfz/q7Hahqx+SIDiZwjlpWlxNJBteffzHp0kuVMp5es 88vuKHnbkwCcxLw9fRY77WATEvvYRu4v3JTD3qEcrSW71UkqjBEiKT5wibGOx5UJ GQlL8KpPJX4J16+0KDUcmoVWnlQRo19Hxj6b/T+j8CIRbvXkFRd7e2iybRenYSt3 bP7pw3V4vETVvLgdab37i8CV4j4wAnCxkLwQfWcfDdJPxn10jwQNS6isU+/VgxCz GuJCs0CdICK1yGqwSmyBIBhNVWJWFSMRehmnfRk2RkiX1sWmscA= =bvtT -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6RvUACgkQmmx57+YA GNn1/xAAglqMyhkgqA4vS51fadq0/34+/1S+YXZSEP+pOwlNNgmMj0hnd9tQ3Ms5 UnKJ3tWtgQNc08Mqzfy3ijfjbTVBvqgCXsO92uP2NlJKWdFV7u9YWG2oX7u/4bQr 6k0nlh1sGZlQogMgPKqMd/jwJvgwzfxAR1xua+gLiBNnYO4gh85f+Gflj3MQj/1/ X7TjZutzEEU2fA1kzU0IzW2bwZgN6bI2dMn0FfNWv1Xmicz91Ud4BvorwgXVwDYS 6+wzN17Un3+J2Za0LT5xRVs6bd+taD/Ymns/JcA82hw9gC8y/Y2HuStczHcX/DQ1 WeEYR21GB/f/zL9d39P1HFMrlgWWoPBuIIFMs2HqwgS9UzVxiX3OePCif0UIVtSi /Sdzd/7yFTsh0yBeJ3OXurUfJkfCtJL1LFHarD901QCrhxXhdAd3pQM8MGX4/FSe ymUNUko+haEsWdlviT2hVilJHu+hWtfM8xE05rPDTYfJdzw7oghLzMnATtd/OLfS uBRTjv2RT0xEL7/l4sod6jHtxlFJpVpe/UEN9YlKRpJoHBILsPHanRjTLir5vrvQ zSqI7Dp0bi+jcRzfpMm4AX6eswsOCk6m3FJ+Eeb+1hEfQ8dNPMG6xr15PBzOfWQJ hNUCI+L7hwgSTWjxavDCK2gAaqLDy8j5ZWvkD2gCi6of6wlIPZw= =Vak/ -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.20/devicetree' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM-based SoCs DT changes for 6.20, please pull the following: - Rob fixes the simple-bus node names in the BCM2711 .dtsi file * tag 'arm-soc/for-6.20/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: bcm2711: Fix 'simple-bus' node names Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Deepanshu Kartikey
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2724138b2f |
iommufd: Initialize batch->kind in batch_clear()
KMSAN reported an uninitialized value when batch_add_pfn_num() reads
batch->kind. This occurs because batch_clear() does not initialize the
kind field.
When batch_add_pfn_num() checks "if (batch->kind != kind)", it reads this
uninitialized value, triggering KMSAN warnings. However the algorithm is
fine with any value in kind at this point as the batch is always empty and
it always corrects kind if wrong.
Initialize batch->kind to zero in batch_clear() to silence the KMSAN
warning.
Link: https://patch.msgid.link/r/20260124132214.624041-1-kartikey406@gmail.com
Reported-by: syzbot+df28076a30d726933015@syzkaller.appspotmail.com
Closes: https://syzkaller.appspot.com/bug?extid=df28076a30d726933015
Fixes:
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Joey Gouly
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1f3b950492 |
arm64: poe: fix stale POR_EL0 values for ptrace
If a process wrote to POR_EL0 and then crashed before a context switch
happened, the coredump would contain an incorrect value for POR_EL0.
The value read in poe_get() would be a stale value left in thread.por_el0. Fix
this by reading the value from the system register, if the target thread is the
current thread.
This matches what gcs/fpsimd do.
Fixes:
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Manivannan Sadhasivam
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9cb64f61ec |
PCI/pwrctrl: Add PCIe M.2 connector support
Add support for handling PCIe M.2 connectors as Power Sequencing devices. These connectors are exposed as Power Sequencing devices as they often support multiple interfaces like PCIe/SATA, USB/UART to the host machine, and the interfaces may be driven by different client drivers at the same time. This driver handles the PCIe interface of these connectors. It first checks for the presence of the graph port in the Root Port node with the help of of_graph_is_present() API. If present, it acquires/powers ON the corresponding pwrseq device. Once the pwrseq device is powered ON, the driver will skip parsing the Root Port/Slot resources and register with the pwrctrl framework. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/20260128-pci-m2-v7-1-9b3a5fe3d244@oss.qualcomm.com |
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Arnd Bergmann
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8f8f7bccda |
RISC-V Devicetrees for v6.20
Sophgo: For CV18xx serials: Update RX/TX FIFO size to fix the USB transfer issue. For SG2042: Optimize the DTS file format, including moving PLIC/CLINT nodes into cpu dtsi and sorting peripheral nodes by address. In addition, we also enable RTC for Pioneerbox. For SG2044: Add "b" ISA extension to fix dtbs_check warnings. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTYPcWJ6By3aFu8IuKHG95Quc97dgUCaXAfgQAKCRCHG95Quc97 do8uAQDip0m8C75LTXTmDqas5jc3DjbRu9ud5Ty7+I1vjsr/NAD/bEMV7+pWNdlo JhwKc+MSxLGAehxEzFTEHNPGs9xRVAA= =Vexy -----END PGP SIGNATURE----- Merge tag 'riscv-sophgo-dt-for-v6.20' of https://github.com/sophgo/linux into soc/dt RISC-V/Sophgo Devicetrees for v6.20 Sophgo: For CV18xx serials: Update RX/TX FIFO size to fix the USB transfer issue. For SG2042: Optimize the DTS file format, including moving PLIC/CLINT nodes into cpu dtsi and sorting peripheral nodes by address. In addition, we also enable RTC for Pioneerbox. For SG2044: Add "b" ISA extension to fix dtbs_check warnings. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'riscv-sophgo-dt-for-v6.20' of https://github.com/sophgo/linux: riscv: dts: sophgo: sg2044: Add "b" ISA extension riscv: dts: sophgo: fix the node order of SG2042 peripheral riscv: dts: sophgo: Move PLIC and CLINT node into CPU dtsi riscv: dts: sophgo: enable hardware clock (RTC) on the Milk-V Pioneer riscv: dts: sophgo: cv180x: fix USB dwc2 FIFO sizes Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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1092e5c0d1 |
STM32 DT for v6.20, round 1
Highlights:
----------
- MCU:
- Update/add Led support on ST boards.
- MPU:
- STM32MP13:
- Add boot led and red led on ST DK board.
- STMP32MP15:
- Add boot led and red led on ST DK boards.
- Add SPI1 sleep pinctrl group.
- STM32MP23:
- Add green ,orange and boot leds on ST boards.
- Add SPI, I2C, DCMIPP and CSI instances to CLUSTER_PD
power domain.
- Enable analog-filter to all I2C instances.
- STM32MP25:
- Add green ,orange and boot leds on ST boards.
- Add SPI, I2C, DCMIPP and CSI instances to CLUSTER_PD
power domain.
- Enable analog-filter to all I2C instances.
- Add LPDDR/DDR channels to ST boards.
-----BEGIN PGP SIGNATURE-----
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Merge tag 'stm32-dt-for-v6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.20, round 1
Highlights:
----------
- MCU:
- Update/add Led support on ST boards.
- MPU:
- STM32MP13:
- Add boot led and red led on ST DK board.
- STMP32MP15:
- Add boot led and red led on ST DK boards.
- Add SPI1 sleep pinctrl group.
- STM32MP23:
- Add green ,orange and boot leds on ST boards.
- Add SPI, I2C, DCMIPP and CSI instances to CLUSTER_PD
power domain.
- Enable analog-filter to all I2C instances.
- STM32MP25:
- Add green ,orange and boot leds on ST boards.
- Add SPI, I2C, DCMIPP and CSI instances to CLUSTER_PD
power domain.
- Enable analog-filter to all I2C instances.
- Add LPDDR/DDR channels to ST boards.
* tag 'stm32-dt-for-v6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (31 commits)
arm/arm64: dts: st: Drop unused .dtsi
arm64: STM32: drop an undefined Kconfig symbol
arm64: dts: st: Minor whitespace cleanup
arm64: dts: st: Use hyphen in node names
arm64: dts: st: add power-domain of dcmipp in stm32mp231.dtsi
arm64: dts: st: add power-domain of dcmipp in stm32mp251.dtsi
dt-bindings: media: st: dcmipp: add 'power-domains' property
arm64: dts: st: add power-domain of csi in stm32mp231.dtsi
arm64: dts: st: add power-domain of csi in stm32mp251.dtsi
dt-bindings: media: st: csi: add 'power-domains' property
ARM: dts: stm32: add spi1 sleep state pinctrl on stm32mp157c-ev1
arm64: dts: st: add DDR channel to stm32mp257f-ev1 board
arm64: dts: st: add LPDDR channel to stm32mp257f-dk board
arm64: dts: st: enable i2c analog-filter in stm32mp231.dtsi
arm64: dts: st: enable i2c analog-filter in stm32mp251.dtsi
arm64: dts: st: add power-domains in all i2c of stm32mp231.dtsi
arm64: dts: st: add power-domains in all i2c of stm32mp251.dtsi
dt-bindings: i2c: st,stm32-i2c: add 'power-domains' property
arm64: dts: st: add power-domains in all spi of stm32mp231.dtsi
arm64: dts: st: add power-domains in all spi of stm32mp251.dtsi
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
Linus Torvalds
|
8dfce8991b |
Pin control fixes for the v6.19 series:
- Mark the Meson GPIO controller as sleeping to avoid a context splat. - Fix up the I2S2 and SWR TX group settings in the Qualcomm SM8350 LPASS pin controller, and implement the proper .get_direction() callback. - Fix a pin typo in the TG1520 pin controller. - Fix a group name in the Marvell armada 3710 XB pin controller that got mangled in a DT schema rewrite. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAml5wogACgkQQRCzN7AZ XXOiBg//RL9rLkA1THGTHbFGyIWtK5YO/xb2wnQ1xTbjimutC3Ud5ttLFxaW3uRM 21NFHNVYwM81Uj+OWdtWUyZQoVwaOyiZ570I0f2p2duFc7uVo0Q2a3HVXwr/8yJ7 j4MpXCBW069CprEZJd1FqSqMS9N+SawPXu3frxTcGrLlW8TXc3BeC9bSic83cBMW WrHdaXddDFMR3ETU2FDA4bV33tupXCmdOsXFDuyxKtDO0HjFiepKzH93/UIRfwpi YcPtHY6/EZlYe0B3Fjs2XqkMNzmoIse0+anmvQtgOR32cJJVku944xyaF96eKp1E Nwg+htWLjksk1a5IKQqm381dmFX/xuSPGk1xctoXxcdtb4N2JLQLpLuxbs1qODJI 4asjHre+KGDiKbG7cbiLA9KQ5GKBOrIea49hIDoabYBqoQnPo+o8eHXJz2mcFewO kdGFszdQztvFJLzs4Z60HZzzA1gw83E3pFys2V2pJRtZdiM5tMQKrbCxE8DT4+Ii HxPGEmm1CvGuAQ4Wz+rwMoy+ats5PWgigJ2zuUPmhcgLmOFGkyVz0anKV55OalJ/ RZhbaqqSVvA/tCfisQr7g4LTJ+s2VNeoUE6e8rZIDqQcScdCAQCrJ8psFL1yuTZp pFo1sOumjfAqiy7jP5NJMyKjiqMckywEv5T813P9UBKkEVqUEUg= =P63k -----END PGP SIGNATURE----- Merge tag 'pinctrl-v6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Mark the Meson GPIO controller as sleeping to avoid a context splat - Fix up the I2S2 and SWR TX group settings in the Qualcomm SM8350 LPASS pin controller, and implement the proper .get_direction() callback - Fix a pin typo in the TG1520 pin controller - Fix a group name in the Marvell armada 3710 XB pin controller that got mangled in a DT schema rewrite * tag 'pinctrl-v6.19-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: dt-bindings: pinctrl: marvell,armada3710-xb-pinctrl: fix 'usb32_drvvbus0' group name pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver pinctrl: th1520: Fix typo pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins pinctrl: meson: mark the GPIO controller as sleeping |
||
|
Arnd Bergmann
|
2ba042ca39 |
i.MX arm64 device tree changes for 6.20:
- New board support: i.MX8MP/i.MX91/i.MX93/i.MX95 FRDM, ifm VHIP4 EvalBoard, Apalis iMX8QP, TQ-Systems MBLS1028A/MBLS1028A-IND - A number of series from Alexander Stein improving lpcg indices description for tqma8xxs board, moving BMAN/QMAN buffers for tqmls1046a, refreshing tqma8mpql-mba8mpxl support a bit, adding HDMI audio support for tqma8mpql-mba8mp-ras314 etc. - A series from Chancel Liu adding various audio features for imx93-14x14-evk board - A series from Francesco Dolcini enabling hdmi_pai device for imx8mp-verdin and imx8mp-toradex-smarc - A couple of changes from Francesco Valla enabling more devices and correcting CAN transceiver gpio for imx93-11x11-frdm - A few changes from Frank Li adding DDR perf support for imx8qm, adding camera support for imx8mp-evk, enabling thermal support for i.MX91, etc. - A series from Haibo Chen adding flexcan support for imx943-evk and imx952-evk boards - A series from Krzysztof Kozlowski fixing up coding style issues - A couple of changes from Marek Vasut updating Data Modul i.MX8M Plus eDM SBC DT to rev.903, using GPU_CGC as core clock for GPU on i.MX95 - A series from Markus Niebel to clean up imx8mm-tqma8mqml board regulators - A couple of series from Peng Fan replacing xceiver-supply with phys for NXP EVK boards, improving imx952-evk board support - A series from Sebastian Krzyszkowiak to refresh imx8mq-librem5 support - A couple of series from Stefano Radaelli to improve imx93-var-som-symphony and imx8mp-var-som support - Other random changes for various boards -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmlu04oACgkQUFdYWoew fM5CiAf9FaVOYU09HQb8TVSzep2ZTC5oY8jnCRB9q+VqZVOgsJ7i2Fb7rUHfhz0W FPVNWVSvmy+PnzxRVph8qi+O4JLSmdtmOlR73Lmwj8a49l+KZDwCYkcR/XG+90Qf QIbxFd7720zMCwBt1wgmrTBTYgXG4pvG3cNIML80M+zy1oNsIxD0C2oQm52AquNr DvV4ruP8A+2qAdFK4odw8RWWEs/H56ynnqybyadATr0UUgzuGfxZwZF6V5u+/61R fX/SEHVsSebarBTHVKFpsgXBaSObEPTTvIJinK0zYhXyXX8hYAdDJkU1f1d2KQXv C8znX+g5Kj+ZcqY+qVj6jiCo8ckgww== =JbyR -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6MrwACgkQmmx57+YA GNnv6hAAstlYP2RKvGMOiLEEom6DQ+9VqhPQRBJjvcibZH087kITjmRu/tDn7AxJ 50WqDRIb8ajS5YAe0pJm0AjVE54UN9VYgUr0rk5GQo/PGOv/rhghVm1qMp5kNJSs Ty94JfQAabTN/9qlnN7n+VxQRwUAUihT6hf1JYwIKsdbHMzIgoNv4EH5ybcfIiO7 W03AsrTe0zSvL3Y79sp6JMQfGT2PSAFrL4tTa5WROoMrjnytnooUCdiYq6e2lcw2 QQuYZyZIIdcpX7QSV9AA9VHRTo7aJNQGjqczlbJNqpni/ZaPlH73pR+ZIHpiyezo 2fqLDpiWcm5gn6Vv8ysuiYBVNMHcYivgoM8ojfLud81C/3vLBG+47y6bGZWE5ral ttKMVZ+lmctW9oemKiBuj3Vu8RoWwkxRqo4MUNwv342ZS/IGJfUzCAs86NvQzXbF BRZ5oYc4kImtqYwJtHu2uZ5niJ9if0RXlwghGK8YoZfTeRI6EcaALcakKi+uTXs7 pEpfV1taduStv3YVireJdDpeQF4P/BrAtKlCKGSAvWElmWINSgN6OjI++nd7qsk4 HWSDdFVl/3r6P70AkDZnCIGo70AkKgY4qjD9srRIbiQyAqrYN8N9PA7K8CsdhzuM zNoroQ6v0aIxIEc1KMMSjRieGrYUIizLrX9A1AsNP29zV5UwO8E= =bybp -----END PGP SIGNATURE----- Merge tag 'imx-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX arm64 device tree changes for 6.20: - New board support: i.MX8MP/i.MX91/i.MX93/i.MX95 FRDM, ifm VHIP4 EvalBoard, Apalis iMX8QP, TQ-Systems MBLS1028A/MBLS1028A-IND - A number of series from Alexander Stein improving lpcg indices description for tqma8xxs board, moving BMAN/QMAN buffers for tqmls1046a, refreshing tqma8mpql-mba8mpxl support a bit, adding HDMI audio support for tqma8mpql-mba8mp-ras314 etc. - A series from Chancel Liu adding various audio features for imx93-14x14-evk board - A series from Francesco Dolcini enabling hdmi_pai device for imx8mp-verdin and imx8mp-toradex-smarc - A couple of changes from Francesco Valla enabling more devices and correcting CAN transceiver gpio for imx93-11x11-frdm - A few changes from Frank Li adding DDR perf support for imx8qm, adding camera support for imx8mp-evk, enabling thermal support for i.MX91, etc. - A series from Haibo Chen adding flexcan support for imx943-evk and imx952-evk boards - A series from Krzysztof Kozlowski fixing up coding style issues - A couple of changes from Marek Vasut updating Data Modul i.MX8M Plus eDM SBC DT to rev.903, using GPU_CGC as core clock for GPU on i.MX95 - A series from Markus Niebel to clean up imx8mm-tqma8mqml board regulators - A couple of series from Peng Fan replacing xceiver-supply with phys for NXP EVK boards, improving imx952-evk board support - A series from Sebastian Krzyszkowiak to refresh imx8mq-librem5 support - A couple of series from Stefano Radaelli to improve imx93-var-som-symphony and imx8mp-var-som support - Other random changes for various boards * tag 'imx-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (104 commits) arm64: dts: freescale: imx95: Add support for i.MX95 15x15 FRDM board arm64: dts: imx91-11x11-frdm: fix CAN transceiver gpio arm64: dts: imx93-11x11-frdm: enable additional devices arm64: dts: imx93-11x11-frdm: Add MQS audio support arm64: dts: imx952-evk: Add nxp,ctrl-ids for scmi misc arm64: dts: imx952-evk: Add flexcan support arm64: dts: imx952-evk: Enable TPM[3,6] arm64: dts: imx952-evk: Enable wdog3 arm64: dts: imx952-evk: Enable USB[1,2] arm64: dts: imx952-evk: Enable SPI7 arm64: dts: imx952-evk: Enable UART5 arm64: dts: imx952-evk: Enable I2C[2,3,4,6,7] bus arm64: dts: imx952-evk: Change the usdhc1_200mhz drive strength to DSE4 arm64: dts: imx952: Add idle-states node arm64: dts: imx8mn: Add ifm VHIP4 EvalBoard v1 and v2 arm64: dts: imx8mn: Add SNVS LPGPR arm64: dts: imx8mq-librem5: Don't set mic-cfg for wm8962 arm64: dts: imx8mq-librem5: Set cap-power-off-card for usdhc2 arm64: dts: imx8mq-librem5: Limit uSDHC2 frequency to 50MHz arm64: dts: imx8mq-librem5: Enable SNVS RTC ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
33dc81740d |
i.MX dt-bindgings changes for 6.20:
- New board compatibles for i.MX93 11x11 FRDM, Apalis iMX8QP, i.MX91 FRDM, ifm VHIP4 EvalBoard v1 and v2, TQ-Systems MBLS1028A/MBLS1028A-IND, i.MX952 EVK, i.MX8MP FRDM - Add vendor prefix for ifm electronic gmbh - A couple of small changes for fsl,imx-gpc.yaml and tcg,tpm-tis-i2c.yaml -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmluycoACgkQUFdYWoew fM6w8Qf8DkNuvSbBUzk9Be7Bvc5YOzawQlDjJUtbVxARGuzAK4lvKscuuTXiZ1Yv 0cQeIdSGThvLc7xTB23iGgznfFLylyX2w3aHnjOJRYVDv9Vqrr7RT0KDd/UhhiZO NDk7aR4zqVbG6eUrcMCPTpRrp+tzH+Ki/JnvosVdyvIrCPhvaCJXWL2yEn2bk8FS sY+SrI3DCTnxOeSzvKyflgabn6pJxKv89ZCnS7Etjo4CYe8iELNnEQQMWEVclyCk zEozz6vFW3Ak8bwGwiStQ/Z23FTSQHB4LziFKE5S499pNpi3ogtfv8Yeko579DE2 /l/ZkE8vjXV/6NNtQJJpM+a18U9Q5w== =A4HI -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6MpcACgkQmmx57+YA GNnpGBAAmlO+IHGz78KB6/RlG+IxbvpdLwonZD8fRY1EferSffCg41S3JZiNW+1P dcYnmpk3yZRl7tzCAhhU5sJfP71Y7fcKF1TKbFPd3dmVICGvk2gpwCs+ZAX5zhgR o4di+n/q9b9ztMJSFFMg2BhBrjLkitRt9JZB6D+UyGCtx8TqrwFIyyE9ntB/BFtA SKxAxOaeBKeEDWLFpJRoUb52XcxJzRMq8D0zN7qQ5w9yywLVWPZVjGdgIw8YtIwB GcPMN9tgvuhF+/WfyVyn9bpI4dDGyErDRLIXIYGD+iaupkPfvKIjLUPYEq8Xf6F0 nzCA6K+D9ghNLHZXDrhIdor5BZLcEr6B+EcWxjVyAPI9Vw3sdCSOY6ODKadpcuHE OgO1RSrkqZ/w6Wq/3lc+vlVat7PT9J5dMR82RQ+o52zOIiTI89FY47OPsJU3FNIO v3n9aKqVuZ1uqghgXYDLKMFXATRKOJUTLw6MHk30rI0vpPXQjWHd2cjvY+YdLNwH KoECpaQUsIwyah4bDCnre3U+TkyZZYpTeCNOyd2JsKSP9c5r4ZHSdRwuIyhTSVdL Mjt53EH9kJ5o2AMRbHmJHIZItBzzmosWmx7q2n8o0XgD3s/3OXGYj8mkc5Etjiow Qqj0k+QkM/AvXzRQAXgwvCkY3QwpnyDHm/fj6P1fWCj2vkmq2xU= =Ii8i -----END PGP SIGNATURE----- Merge tag 'imx-bindings-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX dt-bindgings changes for 6.20: - New board compatibles for i.MX93 11x11 FRDM, Apalis iMX8QP, i.MX91 FRDM, ifm VHIP4 EvalBoard v1 and v2, TQ-Systems MBLS1028A/MBLS1028A-IND, i.MX952 EVK, i.MX8MP FRDM - Add vendor prefix for ifm electronic gmbh - A couple of small changes for fsl,imx-gpc.yaml and tcg,tpm-tis-i2c.yaml * tag 'imx-bindings-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add compatible for i.MX95 15x15 FRDM board dt-bindings: arm: fsl: Document ifm VHIP4 EvalBoard v1 and v2 dt-bindings: vendor-prefixes: Document ifm electronic gmbh dt-bindings: arm: fsl: Add FRDM-IMX91 board dt-bindings: tpm: Add st,st33tphf2ei2c dt-bindings: arm: fsl: Add Apalis iMX8QP dt-bindings: arm: fsl: add i.MX952 EVK board dt-bindings: arm: fsl: add i.MX93 11x11 FRDM board dt-bindings: power: fsl,imx-gpc: Document address-cells dt-bindings: arm: fsl: Add i.MX8MP FRDM board dt-bindings: arm: fsl: add TQ-Systems boards MBLS1028A and MBLS1028A-IND Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
1daa947cb2 |
dt-bindings: Changes for v6.20-rc1
This series updates various DT bindings for Tegra architecture, primarily focusing on schema validation fixes and new feature documentation for Tegra234 and Tegra264 SoCs. Key changes include converting Tegra20 NAND bindings to YAML, and updating memory, DMA, and IOMMU definitions for Tegra264 (introducing CMDQV and DBB clock support). Additionally, it resolves legacy warnings for Tegra30/132 display and VI interfaces. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAml4j/gACgkQ3SOs138+ s6FE+g/+KBy7GVuhVBQtGU5TWTV0NpDTonSHQBZXnslvFx91I0zDXqKOGEEKPFwH RykvftVjbZ1LkwnP5Ow7BeQqF602CACPa9UJY3mavnvdDIWdTCwnUH2VbE+3JjO+ JS5pfR5WB01jAUCydKFYwCZ7+3eeArHO5DUO2h2f/SHqJCpUfggxmuBlGn2FfLwo aAQwpjiLPWmlFz2Rg8sbl+ENqEA0yKZO9uSSO3N6gdNM7vggeFSizPKahc+jV6eE +WL5Z6dZGB67288SUHHOEU60zzoDs1s50EjF2/kLmXWAowNO8HDmK191y1zHnmoJ USzl8fdHmJ0bktUKDJE6Dlu+O0xaJmdz4s/bumgW3qi/e1aDtUrT9yOOgPvhAnjm ZIppsjm/AUx/abECIVSxr3xlSkyyVjNX1Wswjjf4t62K/QxITjGhDsvNQrzwRrcY LpJ/RL7n/07bM3RJ/iONkeBLyCjHjpWkIG5/vjbnGbTrqv8R8eXR4bKe0vqOry1P /HxAE3sURx8wSFAdYFx8vtCOby904BeiWoMrORPnc3GXCAJlHRgoSTfUogE4soiR l08hHyGoW1NDHsyXu2I+mHhoRKUhwYgIT0a+sBX++cbetTNhkkPKvN+QVIV317R5 XcYKqQcGgtwZDDQ+4L4cM2HG7CP6v5pRelp0lzX8AFuo/zvchB4= =KbrZ -----END PGP SIGNATURE----- Merge tag 'tegra-for-6.20-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt dt-bindings: Changes for v6.20-rc1 This series updates various DT bindings for Tegra architecture, primarily focusing on schema validation fixes and new feature documentation for Tegra234 and Tegra264 SoCs. Key changes include converting Tegra20 NAND bindings to YAML, and updating memory, DMA, and IOMMU definitions for Tegra264 (introducing CMDQV and DBB clock support). Additionally, it resolves legacy warnings for Tegra30/132 display and VI interfaces. * tag 'tegra-for-6.20-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: display: tegra: document Tegra30 VI and VIP dt-bindings: display: tegra: document Tegra132 MIPI calibration device dt-bindings: mtd: nvidia,tegra20-nand: convert to DT schema dt-bindings: dma: Update ADMA bindings for tegra264 dt-bindings: iommu: Add NVIDIA Tegra CMDQV support dt-bindings: memory: tegra: Document DBB clock for Tegra264 dt-bindings: tegra: pmc: Update aotag as an optional aperture |
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Beata Michalska
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c71257394b |
rust: dma: allow drivers to tune max segment size
Make dma_set_max_seg_size() available to Rust so drivers can perform standard DMA setup steps. Signed-off-by: Beata Michalska <beata.michalska@arm.com> Acked-by: Robin Murphy <robvin.murphy@arm.com> Reviewed-by: Alice Ryhl <aliceryhl@google.com> Link: https://patch.msgid.link/20260128135320.689046-1-beata.michalska@arm.com Signed-off-by: Danilo Krummrich <dakr@kernel.org> |
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Marek Vasut
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7ae4d097b7 |
spi: spi-fsl-lpspi: Handle clock polarity and phase
The LPSPI driver currently does not support setting SPI bus clock polarity and phase, add support for it. It is important to configure correct initial clock polarity and phase before the GPIO chipselect toggles, otherwise a chip attached to the bus might recognize the first change of clock signal as the first clock cycle and get confused. In order to set up the correct polarity and phase on the clock signal before the GPIO chipselects get configured by the SPI core, the controller has to be briefly brought up in fsl_lpspi_prepare_message(). The fsl_lpspi_prepare_message() behaves like a zero-length transfer which always uses PIO and never DMA, and which leaves the clock signal in the correct state at the end of such transfer, which happens before the GPIO chipselect toggles. Signed-off-by: Marek Vasut <marex@nabladev.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260127222353.1452003-1-marex@nabladev.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Chuck Lever
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3daab3112f |
nfsd: cancel async COPY operations when admin revokes filesystem state
Async COPY operations hold copy stateids that represent NFSv4 state. Thus, when the NFS server administrator revokes all NFSv4 state for a filesystem via the unlock_fs interface, ongoing async COPY operations referencing that filesystem must also be canceled. Each cancelled copy triggers a CB_OFFLOAD callback carrying the NFS4ERR_ADMIN_REVOKED status to notify the client that the server terminated the operation. The static drop_client() function is renamed to nfsd4_put_client() and exported. The function must be exported because both the new nfsd4_cancel_copy_by_sb() and the CB_OFFLOAD release callback in nfs4proc.c need to release client references. Reviewed-by: NeilBrown <neil@brown.name> Reviewed-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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d8316b837c |
nfsd: add controls to set the minimum number of threads per pool
Add a new "min_threads" variable to the nfsd_net, along with the corresponding netlink interface, to set that value from userland. Pass that value to svc_set_pool_threads() and svc_set_num_threads(). Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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1c87a0c39a |
nfsd: adjust number of running nfsd threads based on activity
nfsd() is changed to pass a timeout to svc_recv() when there is a min number of threads set, and to handle error returns from it: In the case of -ETIMEDOUT, if the service mutex can be taken (via trylock), the thread becomes an RQ_VICTIM so that it will exit, providing that the actual number of threads is above pool->sp_nrthrmin. In the case of -EBUSY, if the actual number of threads is below pool->sp_nrthrmax, it will attempt to start a new thread. This attempt is gated on a new SP_TASK_STARTING pool flag that serializes thread creation attempts within a pool, and further by mutex_trylock(). Neil says: "I think we want memory pressure to be able to push a thread into returning -ETIMEDOUT. That can come later." Signed-off-by: NeilBrown <neil@brown.name> Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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a0022a38be |
sunrpc: allow svc_recv() to return -ETIMEDOUT and -EBUSY
To dynamically adjust the thread count, nfsd requires some information about how busy things are. Change svc_recv() to take a timeout value, and then allow the wait for work to time out if it's set. If a timeout is not defined, then the schedule will be set to MAX_SCHEDULE_TIMEOUT. If the task waits for the full timeout, then have it return -ETIMEDOUT to the caller. If it wakes up, finds that there is more work and that no threads are available, then attempt to set SP_TASK_STARTING. If wasn't already set, have the task return -EBUSY to cue to the caller that the service could use more threads. Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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7f221b340d |
sunrpc: split new thread creation into a separate function
Break out the part of svc_start_kthreads() that creates a thread into svc_new_thread(), as a new exported helper function. Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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7ffc7ade2c |
sunrpc: introduce the concept of a minimum number of threads per pool
Add a new pool->sp_nrthrmin field to track the minimum number of threads in a pool. Add min_threads parameters to both svc_set_num_threads() and svc_set_pool_threads(). If min_threads is non-zero and less than the max, svc_set_num_threads() will ensure that the number of running threads is between the min and the max. If the min is 0 or greater than the max, then it is ignored, and the maximum number of threads will be started, and never spun down. For now, the min_threads is always 0, but a later patch will pass the proper value through from nfsd. Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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6cd60f4274 |
sunrpc: track the max number of requested threads in a pool
The kernel currently tracks the number of threads running in a pool in the "sp_nrthreads" field. In the future, where threads are dynamically spun up and down, it'll be necessary to keep track of the maximum number of requested threads separately from the actual number running. Add a pool->sp_nrthrmax parameter to track this. When userland changes the number of threads in a pool, update that value accordingly. Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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2c01f0cf32 |
sunrpc: remove special handling of NULL pool from svc_start/stop_kthreads()
Now that svc_set_num_threads() handles distributing the threads among the available pools, remove the special handling of a NULL pool pointer from svc_start_kthreads() and svc_stop_kthreads(). Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Jeff Layton
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e344f87262 |
sunrpc: split svc_set_num_threads() into two functions
svc_set_num_threads() will set the number of running threads for a given pool. If the pool argument is set to NULL however, it will distribute the threads among all of the pools evenly. These divergent codepaths complicate the move to dynamic threading. Simplify the API by splitting these two cases into different helpers: Add a new svc_set_pool_threads() function that sets the number of threads in a single, given pool. Modify svc_set_num_threads() to distribute the threads evenly between all of the pools and then call svc_set_pool_threads() for each. Signed-off-by: Jeff Layton <jlayton@kernel.org> Signed-off-by: Chuck Lever <chuck.lever@oracle.com> |
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Christian Marangi
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f2090ebdb5 |
soc: qcom: smem: fix qcom_smem_is_available and check if __smem is valid
Commit |
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John Garry
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ac30cd3043 |
nvme: stop using AWUPF
As described at [0], much of the atomic write parts of the specification are lacking. For now, there is nothing which we can do in software about the lack of a dedicated NVMe write atomic command. As for reading the atomic write limits, it is felt that the per-namespace values are mostly properly specified and it is assumed that they are properly implemented. The specification of NAWUPF is quite clear. However the specification of NABSPF is less clear. The lack of clarity in NABSPF comes from deciding whether NABSPF applies when NSABP is 0 - it is assumed that NSABPF does not apply when NSABP is 0. As for the per-controller AWUPF, how this value applies to shared namespaces is missing in the specification. Furthermore, the value is in terms of logical blocks, which is an NS entity. Since AWUPF is so poorly defined, stop using it already together. Hopefully this will force vendors to implement NAWUPF support always. Note that AWUPF not only effects atomic write support, but also the physical block size reported for the device. To help users know this restriction, log an info message per NS. [0] https://lore.kernel.org/linux-nvme/20250707141834.GA30198@lst.de/ Tested-by: Nilay Shroff <nilay@linux.ibm.com> Reviewed-by: Nilay Shroff <nilay@linux.ibm.com> Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: John Garry <john.g.garry@oracle.com> Signed-off-by: Keith Busch <kbusch@kernel.org> |
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Roger Pau Monne
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a54afbc8a2 |
nvme-pci: DMA unmap the correct regions in nvme_free_sgls
The call to nvme_free_sgls() in nvme_unmap_data() has the sg_list and sge
parameters swapped. This wasn't noticed by the compiler because both share
the same type. On a Xen PV hardware domain, and possibly any other
architectures that takes that path, this leads to corruption of the NVMe
contents.
Fixes:
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Benjamin Marzinski
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218b16992a |
dm mpath: make pg_init_delay_msecs settable
"pg_init_delay_msecs X" can be passed as a feature in the multipath table and is used to set m->pg_init_delay_msecs in parse_features(). However, alloc_multipath_stage2(), which is called after parse_features(), resets m->pg_init_delay_msecs to its default value. Instead, set m->pg_init_delay_msecs in alloc_multipath(), which is called before parse_features(), to avoid overwriting a value passed in by the table. Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com> Cc: stable@vger.kernel.org |
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Benjamin Marzinski
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4550a71b17 |
Revert "dm: fix a race condition in retrieve_deps"
This reverts commit |
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Benjamin Marzinski
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787bd63ee6 |
dm mpath: Add missing dm_put_device when failing to get scsi dh name
When commit |
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Andy Shevchenko
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e64d1cb21a |
gpiolib: acpi: Fix potential out-of-boundary left shift
GPIO Address Space handler gets a pointer to the in or out value.
This value is supposed to be at least 64-bit, but it's not limited
to be exactly 64-bit. When ACPI tables are being parsed, for
the bigger Connection():s ACPICA creates a Buffer instead of regular
Integer object. The Buffer exists as long as Namespace holds
the certain Connection(). Hence we can access the necessary bits
without worrying. On the other hand, the left shift, used in
the code, is limited by 31 (on 32-bit platforms) and otherwise
considered to be Undefined Behaviour. Also the code uses only
the first 64-bit word for the value, and anything bigger than 63
will be also subject to UB. Fix all this by modifying the code
to correctly set or clear the respective bit in the bitmap constructed
of 64-bit words.
Fixes: 59084c564c41 ("gpiolib: acpi: use BIT_ULL() for u64 mask in address space handler")
Fixes:
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Jason Gunthorpe
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5815d9303c |
iommupt: Only cache flush memory changed by unmap
The cache flush was happening on every level across the whole range of
iteration, even if no leafs or tables were cleared. Instead flush only the
sub range that was actually written.
Overflushing isn't a correctness problem but it does impact the
performance of unmap.
After this series the performance compared to the original VT-d
implementation with cache flushing turned on is:
map_pages
pgsz ,avg new,old ns, min new,old ns , min % (+ve is better)
2^12, 253,266 , 213,227 , 6.06
2^21, 246,244 , 221,219 , 0.00
2^30, 231,240 , 209,217 , 3.03
256*2^12, 2604,2668 , 2415,2540 , 4.04
256*2^21, 2495,2824 , 2390,2734 , 12.12
256*2^30, 2542,2845 , 2380,2718 , 12.12
unmap_pages
pgsz ,avg new,old ns, min new,old ns , min % (+ve is better)
2^12, 259,292 , 222,251 , 11.11
2^21, 255,259 , 227,236 , 3.03
2^30, 238,254 , 217,230 , 5.05
256*2^12, 2751,2620 , 2417,2437 , 0.00
256*2^21, 2461,2526 , 2377,2423 , 1.01
256*2^30, 2498,2543 , 2370,2404 , 1.01
Fixes:
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Nathan Chancellor
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5b0530bb16 |
iommu/amd: Fix type of type parameter to amd_iommufd_hw_info()
When building with -Wincompatible-function-pointer-types-strict, a
warning designed to catch kernel control flow integrity (kCFI) issues at
build time, there is an instance around amd_iommufd_hw_info():
drivers/iommu/amd/iommu.c:3141:13: error: incompatible function pointer types initializing 'void *(*)(struct device *, u32 *, enum iommu_hw_info_type *)' (aka 'void *(*)(struct device *, unsigned int *, enum iommu_hw_info_type *)') with an expression of type 'void *(struct device *, u32 *, u32 *)' (aka 'void *(struct device *, unsigned int *, unsigned int *)') [-Werror,-Wincompatible-function-pointer-types-strict]
3141 | .hw_info = amd_iommufd_hw_info,
| ^~~~~~~~~~~~~~~~~~~
While 'u32 *' and 'enum iommu_hw_info_type *' are ABI compatible, hence
no regular warning from -Wincompatible-function-pointer-types, the
mismatch will trigger a kCFI violation when amd_iommufd_hw_info() is
called indirectly.
Update the type parameter of amd_iommufd_hw_info() to be
'enum iommu_hw_info_type *' to match the prototype in
'struct iommu_ops', clearing up the warning and kCFI violation.
Fixes:
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Koichiro Den
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c0f1506f63 |
PCI: dwc: Advertise dynamic inbound mapping support
The DesignWare EP core has supported updating the inbound iATU mapping
for an already configured BAR (i.e. allowing pci_epc_set_bar() to be
called again without a prior pci_epc_clear_bar()) since
commit
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Koichiro Den
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31fb954004 |
PCI: endpoint: Add BAR subrange mapping support
Some endpoint platforms have only a small number of usable BARs. At the same time, EPF drivers (e.g. vNTB) may need multiple independent inbound regions (control/scratchpad, one or more memory windows, and optionally MSI or other feature-related regions). Subrange mapping allows these to share a single BAR without consuming additional BARs that may not be available, or forcing a fragile layout by aggressively packing into a single contiguous memory range. Extend the PCI endpoint core to support mapping subranges within a BAR. Add an optional 'submap' field in struct pci_epf_bar so an endpoint function driver can request inbound mappings that fully cover the BAR. Introduce a new EPC feature bit, subrange_mapping, and reject submap requests from pci_epc_set_bar() unless the controller advertises both subrange_mapping and dynamic_inbound_mapping features. The submap array describes the complete BAR layout (no overlaps and no gaps are allowed to avoid exposing untranslated address ranges). This provides the generic infrastructure needed to map multiple logical regions into a single BAR at different offsets, without assuming a controller-specific inbound address translation mechanism. Signed-off-by: Koichiro Den <den@valinux.co.jp> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Niklas Cassel <cassel@kernel.org> Link: https://patch.msgid.link/20260124145012.2794108-3-den@valinux.co.jp |
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Koichiro Den
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06a81c5940 |
PCI: endpoint: Add dynamic_inbound_mapping EPC feature
Introduce a new EPC feature bit (dynamic_inbound_mapping) that indicates whether an Endpoint Controller can update the inbound address translation for a BAR without requiring the EPF driver to clear/reset the BAR first. Endpoint Function drivers (e.g. vNTB) can use this information to decide whether it really is safe to call pci_epc_set_bar() multiple times to update inbound mappings for the BAR. Suggested-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Koichiro Den <den@valinux.co.jp> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Niklas Cassel <cassel@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260124145012.2794108-2-den@valinux.co.jp |
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Andy Shevchenko
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8e03e6ecc2 |
pinctrl: tangier: Join tng_pinctrl_probe() into its wrapper
There is no clear sign why we have tng_pinctrl_probe() in the first place when it has already been using managed calls. Join the function into its devm_tng_pinctrl_probe() wrapper. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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Andy Shevchenko
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ae15231c49 |
pinctrl: tangier: Remove duplicate error messages
The pin control core is covered to report any error via message. Since that it's not needed in the callers. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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Andy Shevchenko
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8a924c6bd0 |
pinctrl: lynxpoint: Remove duplicate error messages
The pin control core is covered to report any error via message. Since that it's not needed in the callers. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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Andy Shevchenko
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04c15be548 |
pinctrl: cherryview: Remove duplicate error messages
The pin control core is covered to report any error via message. Since that it's not needed in the callers. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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Andy Shevchenko
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bcdcd19e25 |
pinctrl: baytrail: Remove duplicate error messages
The pin control core is covered to report any error via message. Since that it's not needed in the callers. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |