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1,403,262 commits

Author SHA1 Message Date
Jani Nikula
5f54b2196c drm/{i915,xe}/panic: split out intel_panic.[ch]
intel_bo.[ch] is not the appropriate location for the panic
functionality. Split out intel_panic.[ch] and xe_panic.c in i915 and
xe. Keep the function names for now.

Cc: Jocelyn Falempe <jfalempe@redhat.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://lore.kernel.org/r/d98b831a011a028ffd33ce99b0ba62be061ee235.1756835342.git.jani.nikula@intel.com
2025-09-08 14:23:46 +03:00
Jani Nikula
cef2c7266f drm/i915/fb: add intel_framebuffer_alloc()
Add intel_framebuffer_alloc() to hide intel_bo_alloc_framebuffer(), as
that doesn't feel like the correct abstraction.

Cc: Jocelyn Falempe <jfalempe@redhat.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://lore.kernel.org/r/379c306c692c50f6af3b6f2488c213f12627954f.1756835342.git.jani.nikula@intel.com
2025-09-08 14:23:46 +03:00
Uma Shankar
45b9545980 drm/i915/display: Remove FBC modulo 4 restriction for ADL-P+
WA:22010751166 does not apply past display version 12.  Or, in
other words, the FBC restriction where FBC is disabled for
non-modulo 4 plane sizes (including plane size + yoffset) is fixed
from display version 13 and onwards. Relax the restriction for the same.

v4: Dropped redundant commit message

v3: Update comments for clarity (Jonathan Cavitt)

v2: Update the macro for display version check (Vinod)

Suggested-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://lore.kernel.org/r/20250904095338.300813-2-uma.shankar@intel.com
2025-09-08 17:02:41 +05:30
Peng Fan
d3e25c244d firmware: arm_scmi: imx: Support retrieving MISC protocol configuration info
The MISC protocol can provide System Manager (SM) configuration
information, including platform identifiers and board-specific
attributes. Add support to retrieve this information during protocol
initialization.

If the firmware does not implement the CFG_INFO command, handle
-EOPNOTSUPP gracefully and continue without failing init.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250904-sm-misc-api-v1-v4-3-0bf10eaabdf1@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08 11:52:30 +01:00
Peng Fan
cc798b1050 firmware: arm_scmi: imx: Discover MISC build info from the system manager
MISC protocol can report System Manager (SM) build information (commit,
build date/time, etc.). Discover those information at the init time.
If the firmware doesn't support it, ignore -EOPNOTSUPP.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250904-sm-misc-api-v1-v4-2-0bf10eaabdf1@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08 11:52:30 +01:00
Hongliang Yang
fad32e8ac4 arm64: dts: cix: add DT nodes for all I2C and I3C ports for sky1
The CIX SKY1 SoC supports the integration of 8 I2C bus controllers and
2 I3C bus controllers.

Signed-off-by: Hongliang Yang <hongliang.yang@cixtech.com>
Signed-off-by: Jun Guo <jun.guo@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
2025-09-08 18:45:52 +08:00
Liao Yuanhong
30c3ffb880 drm/i915/gvt: Remove redundant ternary operators
For ternary operators in the form of "a ? false : true", if 'a' itself
returns a boolean result, the ternary operator can be omitted. Remove
redundant ternary operators to clean up the code.

Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com>
Link: https://lore.kernel.org/r/20250904112644.350512-1-liaoyuanhong@vivo.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08 13:45:49 +03:00
Peng Fan
646c0c9e06 firmware: arm_scmi: imx: Add documentation for MISC_BOARD_INFO
System Manager Firmware supports getting board information, add
documentation for this MISC_BOARD_INFO command.

Also extends the SYSLOG response to include NOT_SUPPORTED.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Message-Id: <20250904-sm-misc-api-v1-v4-1-0bf10eaabdf1@nxp.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-09-08 11:32:17 +01:00
Jani Nikula
55c771b0d8 drm/i915/ddi: abstract figuring out encoder name
The encoder name deduction has become a bit cumbersome within
intel_ddi_init(). Split it out to a separate function to declutter
intel_ddi_init(), even if that means having to use a temp seq buffer for
the name.

Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://lore.kernel.org/r/20250903101050.3671305-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08 13:14:49 +03:00
Xichao Zhao
882569dca6 PCI: plda: Remove dev_err_probe() when the errno is -ENOMEM
The dev_err_probe() doesn't do anything when error is '-ENOMEM'.
Therefore, remove the useless call to dev_err_probe(), and just
return the value instead.

Signed-off-by: Xichao Zhao <zhao.xichao@vivo.com>
[mani: reworded the subject]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2025-09-08 15:44:31 +05:30
Christophe JAILLET
c4f8b11bac
platform/x86: quickstart: Use devm_mutex_init()
Use devm_mutex_init() instead of hand-writing it.

This saves some LoC, improves readability and saves some space in the
generated .o file.

Before:
======
   text	   data	    bss	    dec	    hex	filename
   7607	   2616	     64	  10287	   282f	drivers/platform/x86/quickstart.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
   7301	   2544	     64	   9909	   26b5	drivers/platform/x86/quickstart.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/530b930c981c436c172c0308b348d4ae4ef72800.1757251867.git.christophe.jaillet@wanadoo.fr
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-09-08 13:13:41 +03:00
Christophe JAILLET
b5a5a16e37
platform/x86: xiaomi-wmi: Use devm_mutex_init()
Use devm_mutex_init() instead of hand-writing it.

This saves some LoC, improves readability and saves some space in the
generated .o file.

Before:
======
   text	   data	    bss	    dec	    hex	filename
   3520	   1112	     64	   4696	   1258	drivers/platform/x86/xiaomi-wmi.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
   3069	   1040	     64	   4173	   104d	drivers/platform/x86/xiaomi-wmi.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/bb5d7a57e11eb580f610276a351a01a993341fb8.1757239732.git.christophe.jaillet@wanadoo.fr
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2025-09-08 13:10:29 +03:00
Marek Vasut
512bf60226 pinctrl: renesas: r8a779g0: Fix trivial typo in SoC type comment
Fix SoC type comment in the PFC table file, replace R8A779A0
likely copy-paste error with R8A779G0. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250904222806.193260-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08 12:03:08 +02:00
Qianfeng Rong
9f062fc5b0 pinctrl: renesas: Use int type to store negative error codes
Change the 'ret' variable in sh_pfc_pinconf_group_set() from unsigned
int to int, as it needs to store either negative error codes or zero
returned by sh_pfc_pinconf_set().

No effect on runtime.

Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com>
Fixes: d0593c363f ("pinctrl: sh-pfc: Propagate errors on group config")
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250831084958.431913-4-rongqianfeng@vivo.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08 12:03:08 +02:00
Biju Das
837afa592c pinctrl: renesas: rzg2l: Add suspend/resume support for Schmitt control registers
Renesas RZ/G3E supports a power-saving mode where power to most of the
SoC components is lost, including the PIN controller.  Save and restore
the Schmitt control register contents to ensure the functionality is
preserved after a suspend/resume cycle.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250819084022.20512-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08 12:03:08 +02:00
Biju Das
30247fc325 pinctrl: renesas: rzg2l: Fix OEN resume
Writing to the PFC_OEN register is controlled by the write protect
register (PWPR).  Currently the OEN register write in resume() is done
without enabling write access in PWPR leading to incorrect operation.

Fixes: cd39805be8 ("pinctrl: renesas: rzg2l: Unify OEN handling across RZ/{G2L,V2H,V2N}")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[geert: Move spin_*lock*() calls inside if-statements]
Link: https://lore.kernel.org/20250817143024.165471-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-09-08 12:02:55 +02:00
Jani Nikula
7ea3baa6ef drm/i915/power: fix size for for_each_set_bit() in abox iteration
for_each_set_bit() expects size to be in bits, not bytes. The abox mask
iteration uses bytes, but it works by coincidence, because the local
variable holding the mask is unsigned long, and the mask only ever has
bit 2 as the highest bit. Using a smaller type could lead to subtle and
very hard to track bugs.

Fixes: 62afef2811 ("drm/i915/rkl: RKL uses ABOX0 for pixel transfers")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: stable@vger.kernel.org # v5.9+
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250905104149.1144751-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08 12:56:29 +03:00
K Prateek Nayak
cba4262a19 x86/cpu/topology: Always try cpu_parse_topology_ext() on AMD/Hygon
Support for parsing the topology on AMD/Hygon processors using CPUID leaf 0xb
was added in

  3986a0a805 ("x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available").

In an effort to keep all the topology parsing bits in one place, this commit
also introduced a pseudo dependency on the TOPOEXT feature to parse the CPUID
leaf 0xb.

The TOPOEXT feature (CPUID 0x80000001 ECX[22]) advertises the support for
Cache Properties leaf 0x8000001d and the CPUID leaf 0x8000001e EAX for
"Extended APIC ID" however support for 0xb was introduced alongside the x2APIC
support not only on AMD [1], but also historically on x86 [2].

Similar to 0xb, the support for extended CPU topology leaf 0x80000026 too does
not depend on the TOPOEXT feature.

The support for these leaves is expected to be confirmed by ensuring

  leaf <= {extended_}cpuid_level

and then parsing the level 0 of the respective leaf to confirm EBX[15:0]
(LogProcAtThisLevel) is non-zero as stated in the definition of
"CPUID_Fn0000000B_EAX_x00 [Extended Topology Enumeration]
(Core::X86::Cpuid::ExtTopEnumEax0)" in Processor Programming Reference (PPR)
for AMD Family 19h Model 01h Rev B1 Vol1 [3] Sec. 2.1.15.1 "CPUID Instruction
Functions".

This has not been a problem on baremetal platforms since support for TOPOEXT
(Fam 0x15 and later) predates the support for CPUID leaf 0xb (Fam 0x17[Zen2]
and later), however, for AMD guests on QEMU, the "x2apic" feature can be
enabled independent of the "topoext" feature where QEMU expects topology and
the initial APICID to be parsed using the CPUID leaf 0xb (especially when
number of cores > 255) which is populated independent of the "topoext" feature
flag.

Unconditionally call cpu_parse_topology_ext() on AMD and Hygon processors to
first parse the topology using the XTOPOLOGY leaves (0x80000026 / 0xb) before
using the TOPOEXT leaf (0x8000001e).

While at it, break down the single large comment in parse_topology_amd() to
better highlight the purpose of each CPUID leaf.

Fixes: 3986a0a805 ("x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available")
Suggested-by: Naveen N Rao (AMD) <naveen@kernel.org>
Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Cc: stable@vger.kernel.org # Only v6.9 and above; depends on x86 topology rewrite
Link: https://lore.kernel.org/lkml/1529686927-7665-1-git-send-email-suravee.suthikulpanit@amd.com/ [1]
Link: https://lore.kernel.org/lkml/20080818181435.523309000@linux-os.sc.intel.com/ [2]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 [3]
2025-09-08 11:37:49 +02:00
Christian Borntraeger
352ccf890a KVM: s390: improve interrupt cpu for wakeup
Turns out that picking an idle CPU for floating interrupts has some
negative side effects. The guest will keep the IO workload on its CPU
and rather use an IPI from the interrupt CPU instead of moving workload.
For example a guest with 2 vCPUs and 1 fio process might run that fio on
vcpu1. If after diag500 both vCPUs are idle then vcpu0 is woken up. The
guest will then do an IPI from vcpu0 to vcpu1.

So lets change the heuristics and prefer the last CPU that went to
sleep. This one is likely still in halt polling and can be woken up
quickly.

This patch shows significant improvements in terms of bandwidth or
cpu consumption for fio and uperf workloads and seems to be a net
win.

Link: https://lore.kernel.org/linux-s390/20250904113927.119306-1-borntraeger@linux.ibm.com/
Reviewed-by: Christoph Schlameuß <schlameuss@de.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@linux.ibm.com>
2025-09-08 11:12:39 +02:00
Greg Kroah-Hartman
e81783899d Revert "m68k: make HPDCA and HPAPCI bools"
This reverts commit 5a66087107.

m68k patches shouldn't go through the tty tree without the m68k
maintainer acking them first.

Cc: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-09-08 11:05:16 +02:00
Liao Yuanhong
6d0982ae78 PM / devfreq: mtk-cci: avoid redundant conditions
While 'if (i <= 0) ... else if (i > 0) ...' is technically equivalent to
'if (i <= 0) ... else ...', the latter is vastly easier to read because
it avoids writing out a condition that is unnecessary. Let's drop such
unnecessary conditions.

Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://patchwork.kernel.org/project/linux-pm/patch/20250903121452.387023-1-liaoyuanhong@vivo.com/
2025-09-08 17:19:25 +09:00
Christophe JAILLET
474014cdec gpio: pisosr: Use devm_mutex_init()
Use devm_mutex_init() instead of hand-writing it.

This saves some LoC, improves readability and saves some space in the
generated .o file.

Before:
======
   text	   data	    bss	    dec	    hex	filename
   8431	   1808	    192	  10431	   28bf	drivers/gpio/gpio-pisosr.o

After:
=====
   text	   data	    bss	    dec	    hex	filename
   8112	   1736	    192	  10040	   2738	drivers/gpio/gpio-pisosr.o

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/01910ebdaba7d8d0cdc4ac60eb70da8e29cb85f1.1757251512.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:38:27 +02:00
Shenghao Ding
71d2893a23 ALSA: hda/tas2781: Fix the order of TAS2781 calibrated-data
A bug reported by one of my customers that the order of TAS2781
calibrated-data is incorrect, the correct way is to move R0_Low
and insert it between R0 and InvR0.

Fixes: 4fe2385134 ("ALSA: hda/tas2781: Move and unified the calibrated-data getting function for SPI and I2C into the tas2781_hda lib")
Signed-off-by: Shenghao Ding <shenghao-ding@ti.com>
Link: https://patch.msgid.link/20250907222728.988-1-shenghao-ding@ti.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-09-08 09:36:39 +02:00
Yao Zi
03c146cb6c gpio: loongson-64bit: Add support for Loongson-2K0300 SoC
This controller's input and output logic is similar to previous
generations of SoCs. Additionally, it's capable of interrupt masking,
and could be configured to detect levels and edges, and is supplied with
a distinct reset signal.

The interrupt functionality is implemented through an irqchip, whose
operations are written with previous generation SoCs in mind and could
be reused. Since all Loongson SoCs with similar interrupt capability
(LS2K1500, LS2K2000) support byte-control mode, these operations are for
byte-control mode only for simplicity.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250904013438.2405-3-ziyao@disroot.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:36:00 +02:00
Yao Zi
084d01a173 dt-bindings: gpio: loongson: Document GPIO controller of LS2K0300 SoC
Loongson-2K0300 ships a GPIO controller whose input/output control logic
is similar to previous generation of SoCs. Additionally, it acts as an
interrupt-controller supporting both level and edge interrupts and has a
distinct reset signal.

Describe its compatible in devicetree. We enlarge the maximum value of
ngpios to 128, since the controller technically supports at most 128
pins, although only 106 are routed out of the package. Properties for
interrupt-controllers and resets are introduced and limited as LS2K0300
only.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Huacai Chen <chenhuacai@loongson.cn>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250904013438.2405-2-ziyao@disroot.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:36:00 +02:00
Henrik Grimler
d19b177336 ARM: dts: samsung: smdk5250: add sromc node
The smdk5250 board has an ethernet port which is connected to bank 1
of the SROM controller. Describe it.

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-08 09:35:51 +02:00
Henrik Grimler
6016813c88 ARM: dts: samsung: exynos5250: describe sromc bank memory map
According to public user manual for Exynos 5250 [1], the SROM
controller has 4 banks, at same addresses as for example Exynos
5410. Describe the bank memory map of the SoC.

[1] https://web.archive.org/web/20130921194458/http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-08 09:35:51 +02:00
Henrik Grimler
31f5a855f7 ARM: dts: samsung: exynos5410: use multiple tuples for sromc ranges
Preferred style is to have comma separated tuples when multiple
addresses and sizes are defined in ranges. Therefore, change the
format to clarify the node.

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-08 09:35:50 +02:00
Akhilesh Patil
d3e7efad8f gpio: Kconfig: Update help for GPIO_PCA953X
Update help description with supported ICs from gpio-pca953x.c
Include missing IC names.

Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in>
Link: https://lore.kernel.org/r/aLmtOWjAWPtWe/gH@bhairav-test.ee.iitb.ac.in
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:35:11 +02:00
Joris Verhaegen
86eec88c5b ALSA: compress_offload: Add SNDRV_COMPRESS_AVAIL64 ioctl
The previous patch introduced a 64-bit timestamp ioctl
(SNDRV_COMPRESS_TSTAMP64). To provide a consistent API, this patch
adds a corresponding 64-bit version of the SNDRV_COMPRESS_AVAIL ioctl.

A new struct snd_compr_avail64 is added to the UAPI, which includes
the 64-bit timestamp. The existing ioctl implementation is refactored
to handle both the 32-bit and 64-bit variants.

Reviewed-by: Miller Liang <millerliang@google.com>
Tested-by: Joris Verhaegen <verhaegen@google.com>
Signed-off-by: Joris Verhaegen <verhaegen@google.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250905091301.2711705-4-verhaegen@google.com
2025-09-08 09:33:24 +02:00
Joris Verhaegen
f20a53974f ALSA: compress_offload: Add SNDRV_COMPRESS_TSTAMP64 ioctl
The previous patch introduced the internal infrastructure for handling
64-bit timestamps. This patch exposes this capability to user-space.

Define the new ioctl command SNDRV_COMPRESS_TSTAMP64, which allows
applications to fetch the overflow-safe struct snd_compr_tstamp64.

The ioctl dispatch table is updated to handle the new command by
calling a new snd_compr_tstamp64 handler, while the legacy path is
renamed to snd_compr_tstamp32 for clarity.

This patch bumps the SNDRV_COMPRESS_VERSION to 0.4.0.

Reviewed-by: Miller Liang <millerliang@google.com>
Tested-by: Joris Verhaegen <verhaegen@google.com>
Signed-off-by: Joris Verhaegen <verhaegen@google.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250905091301.2711705-3-verhaegen@google.com
2025-09-08 09:33:24 +02:00
Joris Verhaegen
2c92e2fbe9 ALSA: compress_offload: Add 64-bit safe timestamp infrastructure
The copied_total field in struct snd_compr_tstamp is a 32-bit
value that can overflow on long-running high-bitrate streams,
leading to incorrect calculations for buffer availablility.

This patch adds a 64-bit safe timestamping mechanism.
A new UAPI struct, snd_compr_tstamp64, is added which uses 64-bit
types for byte counters. The relevant ops structures across the
ASoC and core compress code are updated to use this new struct.
ASoC drivers are updated to use u64 counters.

Internal timestamps being u64 now, a compatibility function is added
to convert the 64-bit timestamp back to the 32-bit format for legacy
ioctl callers.

Reviewed-by: Miller Liang <millerliang@google.com>
Tested-by: Joris Verhaegen <verhaegen@google.com>
Signed-off-by: Joris Verhaegen <verhaegen@google.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250905091301.2711705-2-verhaegen@google.com
2025-09-08 09:33:24 +02:00
Jouni Högander
90d8aad11f drm/i915/psr: Panel Replay SU cap dpcd read return value
Currently return value of drm_dpcd_readb is not checked when reading sink
Panel Replay Selective Update capabilities.

Fix this and switch to drm_dpcd_read_byte.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Link: https://lore.kernel.org/r/20250827060809.2461725-1-jouni.hogander@intel.com
2025-09-08 10:25:32 +03:00
Bartosz Golaszewski
f3c19e70eb gpio: mlxbf3: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-12-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
ab61c8b613 gpio: ep93xx: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-11-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
a685ac6539 gpio: ep93xx: order includes alphabetically
For better readability and easier maintenance, order the includes
alphabetically.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-10-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
74dcb94730 gpio: ep93xx: allow building the module with COMPILE_TEST enabled
Increase build coverage by allowing the module to be built with
COMPILE_TEST=y.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-9-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
fff086ebc5 gpio: mlxbf: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-8-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
8bbe11bb2f gpio: tb10x: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-7-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
682fbb18e1 gpio: tb10x: allow building the module with COMPILE_TEST=y
Increase build coverage by allowing the module to be built with
COMPILE_TEST=y. We need an actual prompt entry in this case so add it.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-6-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
76e61b03d1 gpio: tb10x: order includes alphabetically
For better readability and easier maintenance, order the includes
alphabetically.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-5-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
59b82bedbf gpio: blzp1600: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-4-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
f21c10649a gpio: idt3243x: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-3-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
bd9bfafae0 gpio: ixp4xx: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-2-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
b23c22a8d7 gpio: ixp4xx: allow building the module with COMPILE_TEST enabled
Increase build coverage by allowing the module to be built with
COMPILE_TEST=y.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250903-gpio-mmio-gpio-conv-part3-v1-1-ff346509f408@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-09-08 09:17:02 +02:00
Bartosz Golaszewski
e10a7cf4f6 Linux 6.17-rc5
-----BEGIN PGP SIGNATURE-----
 
 iQFSBAABCgA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmi997IeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGCZ8H/iLRgKHnMq/flMo1
 UJ/BOWLRHwyt2FK1iAVJpKxnmdgIlRUPXTPeKBKuMtDWUopJqXxXuqsxIU9eDQMw
 7YAjQIKC3a+TqNUuPYrXKsZhVpcWrC1OK+wZNoIuehiAJI3fQ/POgM9/9Y46XK7E
 yte6fahzBnIMS1aev+/hz7Cw63pXe6DrE+IKnerdpA1b4Nj9KDRcQ7j6WCtUyeGM
 Q4ERoJvyOMbz3B91kkheuXfCnQFe+HUvM9Nf4ufGkWruAOkLWxO5ttgHX6IbnHmR
 gjxjAOeXQJkjjgKpBSygVd/PGmTIIQzpu56gwg0GQj9SW3xm/h8giB5k4gwFOLTL
 5rz7xKw=
 =Mpqf
 -----END PGP SIGNATURE-----

Merge tag 'v6.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next

Linux 6.17-rc5
2025-09-08 09:16:23 +02:00
Kalesh AP
4a9fba4d00 RDMA/bnxt_re: Delete always true SGID table check
The "sgid_tbl" inside "rdev->qplib_res" is a static memory.
Hence, the check always return true.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Link: https://patch.msgid.link/20250814112555.221665-9-kalesh-anakkur.purayil@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-09-08 03:08:35 -04:00
Abhishek Mohapatra
dc61e916f1 RDMA/bnxt_re: Report udp source port for flow_label in bnxt_re_query_qp
The firmware doesn't capture the flow_label. Therefore the value
that's always returned by qplib_qp->ah.flow_label is 0 whenever
a qp is created. And as per IB spec, udp source port can be reported
for flow_label. Hence reported udp source port for flow_label in
bnxt_re_query_qp by populating the value of qplib_qp->udp_sport
into qp_attr->ah_attr.grh.flow_label.

Signed-off-by: Abhishek Mohapatra <abhishek.mohapatra@broadcom.com>
Signed-off-by: Saravanan Vajravel <saravanan.vajravel@broadcom.com>
Link: https://patch.msgid.link/20250814112555.221665-8-kalesh-anakkur.purayil@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-09-08 03:08:35 -04:00
Vasuthevan Maheswaran
ef56081d18 RDMA/bnxt_re: RoCE related hardware counters update
Support for new hardware counters added, and existing hardware
counters have been modified according to the design documents
for compatibility with open-source monitoring agents.

Signed-off-by: Vasuthevan Maheswaran <vasuthevan.maheswaran@broadcom.com>
Signed-off-by: Saravanan Vajravel <saravanan.vajravel@broadcom.com>
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Link: https://patch.msgid.link/20250814112555.221665-7-kalesh-anakkur.purayil@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-09-08 03:08:35 -04:00
Damodharam Ammepalli
832fc9e161 RDMA/bnxt_re: Optimize bnxt_qplib_get_dev_attr function
Optimize bnxt_qplib_get_dev_attr() by separating out query_version which
uses creq notification method to host. Due to serialization of cmdq by
firmware, expected latency in response to heavy multi-threaded rdma
applications might be observed.

This patch separates the version_query logic out of device attribute
query and called only during rdma driver init.

Signed-off-by: Damodharam Ammepalli <damodharam.ammepalli@broadcom.com>
Reviewed-by: Hongguang Gao <hongguang.gao@broadcom.com>
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Link: https://patch.msgid.link/20250814112555.221665-6-kalesh-anakkur.purayil@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-09-08 03:08:35 -04:00