Commit graph

1,403,262 commits

Author SHA1 Message Date
Chukun Pan
4bef07b79a dt-bindings: arm: rockchip: Add HINLINK H66K / H68K
The HINLINK H66K/H68K are 2.5GbE SBC based on the RK3568 SoC.
Add devicetree binding documentation for them.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250818100009.170202-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 12:20:44 +02:00
Chukun Pan
7d11b8c260 dt-bindings: vendor-prefixes: Add HINLINK
Add vendor prefix for HINLINK, which is an SBC manufacturer.

Link: https://www.hinlink.cn/
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250818100009.170202-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 12:20:44 +02:00
Inochi Amaoto
adecf78df9 irqchip/sifive-plic: Respect mask state when setting affinity
plic_set_affinity() always calls plic_irq_enable(), which clears up the
priority setting even the interrupt is only masked. This unmasks the
interrupt unexpectly.

Replace the plic_irq_enable/disable() with plic_irq_toggle() to avoid
changing the priority setting.

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nam Cao <namcao@linutronix.de> # VisionFive 2
Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox
Reviewed-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/all/20250811002633.55275-1-inochiama@gmail.com
Link: https://lore.kernel.org/lkml/20250722224513.22125-1-inochiama@gmail.com/
2025-08-24 12:20:18 +02:00
Sebastian Reichel
9c059700fe arm64: dts: rockchip: Enable RK3576 watchdog
The RK3576 watchdog does not need any board specific resources, so
let's enable it by default just like we do for RK3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250818-rk3576-watchdog-v1-1-28f82e01029c@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 12:18:26 +02:00
Sebastian Reichel
09cce87842 arm64: dts: rockchip: correct network description on Sige5
Both network PHYs have dedicated crystals for the 25 MHz clock
and do not source it from the RK3576.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250818-sige5-network-phy-clock-v1-1-87a9122d41c2@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 12:17:45 +02:00
Lorenzo Pieralisi
1a2cce5b91 irqchip/gic-v5: Fix kmemleak L2 IST table entries false positives
L2 IST table entries are allocated with the kmalloc interface and their
physical addresses are programmed in the GIC (either IST base address
register or L1 IST table entries) but their virtual addresses are not
stored in any kernel data structure because they are not needed at runtime
- the L2 IST table entries are managed through system instructions but
never dereferenced directly by the driver.

This triggers kmemleak false positive reports:

unreferenced object 0xffff00080039a000 (size 4096):
  comm "swapper/0", pid 0, jiffies 4294892296
  hex dump (first 32 bytes):
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
  backtrace (crc 0):
    kmemleak_alloc+0x34/0x40
    __kmalloc_noprof+0x320/0x464
    gicv5_irs_iste_alloc+0x1a4/0x484
    gicv5_irq_lpi_domain_alloc+0xe4/0x194
    irq_domain_alloc_irqs_parent+0x78/0xd8
    gicv5_irq_ipi_domain_alloc+0x180/0x238
    irq_domain_alloc_irqs_locked+0x238/0x7d4
    __irq_domain_alloc_irqs+0x88/0x114
    gicv5_of_init+0x284/0x37c
    of_irq_init+0x3b8/0xb18
    irqchip_init+0x18/0x40
    init_IRQ+0x104/0x164
    start_kernel+0x1a4/0x3d4
    __primary_switched+0x8c/0x94

Instruct kmemleak to ignore L2 IST table memory allocation virtual
addresses to prevent these false positive reports.

Reported-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/20250811135001.1333684-1-lpieralisi@kernel.org
Closes: https://lore.kernel.org/lkml/cc611dda-d1e4-4793-9bb2-0eaa47277584@huawei.com/
2025-08-24 12:12:53 +02:00
Fushuai Wang
b92ff23b12 irqchip/sifive-plic: Use for_each_present_cpu() instead of for_each_cpu()
Replace the open coded for_each_cpu(cpu, cpu_present_mask) loop with the
more readable and equivalent for_each_present_cpu(cpu) macro.

Signed-off-by: Fushuai Wang <wangfushuai@baidu.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250811064701.2906-1-wangfushuai@baidu.com
2025-08-24 12:10:46 +02:00
Dan Carpenter
c8bb0f00a4 irqchip/mvebu-gicp: Fix an IS_ERR() vs NULL check in probe()
ioremap() never returns error pointers, it returns NULL on error.  Fix the
check to match.

Fixes: 3c3d7dbab2 ("irqchip/mvebu-gicp: Clear pending interrupts on init")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/aKRGcgMeaXm2TMIC@stanley.mountain
2025-08-24 12:00:47 +02:00
Waqar Hameed
51548c36b3 counter: ti-ecap-capture: Use devm_pm_runtime_enable()
There is no need to register a manual `devm` action for
`pm_runtime_disable()` when `devm_pm_runtime_enable()` exists. It does
the same thing (but also calls `pm_runtime_dont_use_autosuspend()`,
which should be fine here).

Moreover, when `devm_add_action_or_reset()` fails, it is due to a failed
memory allocation and will thus return `-ENOMEM`. `dev_err_probe()`
doesn't do anything when error is `-ENOMEM`. Therefore, the call to
`dev_err_probe()` is useless. Note that `devm_pm_runtime_enable()` has a
tail call to `devm_add_action_or_reset()` and thus returns that value.
Therefore, replace `dev_err_probe()` with the returning value.

Signed-off-by: Waqar Hameed <waqar.hameed@axis.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/pnda54bjmij.a.out@axis.com
Signed-off-by: William Breathitt Gray <wbg@kernel.org>
2025-08-24 17:02:03 +09:00
William Breathitt Gray
36ee9770a8 counter: Alphabetize component_id sysfs attributes Documentation list
Prefer alphabetical order for the component_id sysfs attributes list in
the Counter ABI Documentation file. This should make it easier for users
to locate a component_id attribute in the list and its respective
Documentation entry.

Suggested-by: David Lechner <dlechner@baylibre.com>
Link: https://lore.kernel.org/r/20250615-alphabetize-component_id-doc-v1-1-4c5943b41198@kernel.org
Signed-off-by: William Breathitt Gray <wbg@kernel.org>
2025-08-24 16:58:53 +09:00
Troy Mitchell
c536e00d58
clk: spacemit: fix sspax_clk
Hardware Requirement:

BIT[3] of this register must be set if need to select i2s_bclk as
SSPA parent clock, to solve this, introduces a new SSPAx_I2S_BCLK
clock as the virtual gate clock.

Fixes: 1b72c59db0 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Suggested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Haylen Chu <heylenay@4d2.org>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20250811-k1-clk-i2s-v5-2-ebadd06e1e91@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-24 15:42:31 +08:00
Troy Mitchell
7d50d9bf1c
dt-bindings: clock: spacemit: CLK_SSPA_I2S_BCLK for SSPA
In order to use the virtual clock SSPAx_I2S_BCLK in the device tree and
register it in the driver, this patch introduces the macro definition.

Fixes: 1b72c59db0 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20250811-k1-clk-i2s-v5-1-ebadd06e1e91@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-24 15:42:28 +08:00
Hendrik Hamerlinck
eba84c94f9
riscv: dts: spacemit: add UART resets for Soc K1
The UARTs in the SpacemiT K1 device tree are probed by the 8250_of driver,
but without reset lines they remain non-functional.

Add reset control entries so that the UARTs can operate when mapped to
devices. UART0 is already de-asserted by the bootloader, but include its
reset as well to avoid relying on bootloader state.

Tested on Orange Pi RV2 and Banana Pi BPI-F3 boards, with UART9 enabled
and verified functional.

Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250821152619.597051-1-hendrik.hamerlinck@hammernet.be
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-24 15:16:09 +08:00
Sebastian Reichel
67b2c15d8f arm64: dts: rockchip: add USB-C support for ROCK 5B/5B+/5T
Add hardware description for the USB-C port in the Radxa ROCK 5 Model B
family. This describes the OHCI, EHCI and XHCI USB parts. The DisplayPort
AltMode is only partially described, as bindings for the necessary
DisplayPort controller are still being reviewed.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250819-rock5bp-for-upstream-v4-1-7a2365ce7176@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 09:04:14 +02:00
Kyle Petryszak
5487086c4d arm64: dts: rockchip: Add green power LED to rk3588s-rock-5a
The Radxa ROCK 5A board includes a green power LED that is defined in
the vendor device tree but is missing from the upstream kernel DTS file.

This causes the LED to be uncontrollable from the operating system, as no
entry is created for it under /sys/class/leds.

This patch adds the missing node to the leds block, creating a
"green:power" device and allowing the LED to be controlled by the kernel.

Signed-off-by: Kyle Petryszak <kylepzak@projectinitiative.io>
Link: https://lore.kernel.org/r/175565703702.6.15498212790604388615.862782045@projectinitiative.io
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 09:04:02 +02:00
Krzysztof Kozlowski
521b36e5a2 arm64: dts: rockchip: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250819131607.86338-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:43:28 +02:00
Krzysztof Kozlowski
106bdca970 ARM: dts: rockchip: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250819131607.86338-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:43:28 +02:00
Chen-Yu Tsai
2dea24df23 arm64: dts: rockchip: Add supplies for eMMC on rk3588-orangepi-5
The eMMC description is missing both vmmc and vqmmc supplies.

Add them to complete the description.

Fixes: 236d225e1e ("arm64: dts: rockchip: Add board device tree for rk3588-orangepi-5-plus")
Fixes: ea63f4666e ("arm64: dts: rockchip: refactor common rk3588-orangepi-5.dtsi")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20250821052939.1869171-1-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:35:09 +02:00
Jonas Karlman
178879625f arm64: dts: rockchip: Enable more power domains for RK3528
Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU
power-domains on RK3528.

The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset trying to read the rate of the SCMI_CLK_DDR
clock.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250821211843.3051349-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:24:03 +02:00
Maud Spierings
3dc7ba3548 arm64: dts: rockchip: Enable the NPU on the orangepi 5 boards
Enable the NPU and the PMIC that powers it.

Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-3-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:32 +02:00
Maud Spierings
ccc7f16ea2 arm64: dts: rockchip: Enable HDMI receiver on orangepi 5 plus
Enable support for the HDMI input port found on the orangepi 5 plus.

Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-2-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:32 +02:00
Maud Spierings
8976583832 arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 plus
The logic of the headphone detect pin seems to be inverted, with this
change headphones actually output sound when plugged in.

Verified by checking /sys/kernel/debug/gpio and by listening.

Fixes: 236d225e1e ("arm64: dts: rockchip: Add board device tree for rk3588-orangepi-5-plus")
Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-1-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:10 +02:00
Krzysztof Kozlowski
2f8c7b179f arm64: dts: qcom: Use GIC_SPI for interrupt-map for readability
Decoding interrupt-map is tricky, because it consists of five
components.  Use known GIC_SPI define in final interrupt specifier
component makes easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-10-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
9c18757804 arm64: dts: qcom: sm8350: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8350.dtsi:1554.4-1557.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-9-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
3e17f489e3 arm64: dts: qcom: sm8250: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8250.dtsi:2166.4-2169.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-8-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
d0054c3e5b arm64: dts: qcom: sm8150: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8150.dtsi:1869.4-1872.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-7-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
b8159aaf5e arm64: dts: qcom: sm6150: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm6150.dtsi:1122.4-1125.30: Warning (interrupt_map): /soc@0/pcie@1c08000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-6-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
6cfdee6dca arm64: dts: qcom: sc8180x: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sc8180x.dtsi:1743.4-1746.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-5-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
0325653b1a arm64: dts: qcom: qcs404: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  qcs404.dtsi:1496.4-1499.30: Warning (interrupt_map): /soc@0/pcie@10000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@b000000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-4-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
d434b7198a arm64: dts: qcom: msm8996: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  msm8996.dtsi:1931.5-1934.31: Warning (interrupt_map): /soc@0/bus@0/pcie@600000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@9bc0000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-3-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
0eb7656667 arm64: dts: qcom: lemans: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  lemans.dtsi:7623.3-7626.29: Warning (interrupt_map): /pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-2-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
dc3f005e6b arm64: dts: qcom: ipq5424: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  ipq5424.dtsi:961.4-964.30: Warning (interrupt_map): /soc@0/pcie@50000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@f200000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-1-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
6dcc44fc69 arm64: dts: qcom: x1e80100-qcp: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: 9f53c36119 ("arm64: dts: qcom: x1e78100-qcp: Enable Type-A USB ports labeled 3 and 4/6")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-4-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
d5d72e3267 arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: c0c46eea24 ("arm64: dts: qcom: x1e80100-vivobook-s15: Enable USB-A ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-3-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
c3994b4951 arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: ffbf3a8be7 ("arm64: dts: qcom: x1e78100-t14s: Enable support for both Type-A USB ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-2-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
59a4b94a8c arm64: dts: qcom: x1e001de-devkit: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: d12fbd11c5 ("arm64: dts: qcom: x1e001de-devkit: Enable support for both Type-A USB ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-1-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
41b9f3dae1 arm64: dts: qcom: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819131717.86713-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Neil Armstrong
4f97774ac2 arm64: dts: qcom: sm8550: add PPI interrupt partitions for the ARM PMUs
The PMUs shares the same per-cpu (PPI) interrupt, so declare the proper
interrupt partition maps and use the 4th interrupt cell to pass the
partition phandle for each ARM PMU node.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250820-topic-sm8550-upstream-pmu-ppi-4-cells-v1-2-a8915672e996@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Neil Armstrong
40db99f1b6 arm64: dts: qcom: sm8550: switch to interrupt-cells 4 to add PPI partitions
The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
to interrupt-cells = <4> in the GIC node to allow adding an interrupt
partition map phandle as the 4th cell value for GIC_PPI interrupts.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250820-topic-sm8550-upstream-pmu-ppi-4-cells-v1-1-a8915672e996@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
013632a410 arm64: dts: qcom: sm8750-mtp: Add speaker Soundwire port mapping
Add appropriate mappings of Soundwire ports of WSA883x speaker
to correctly map the Speaker ports to the WSA macro ports.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250820141233.216713-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
316294bb66 arm64: dts: qcom: sdm845: Fix slimbam num-channels/ees
Reading the hardware registers of the &slimbam on RB3 reveals that the BAM
supports only 23 pipes (channels) and supports 4 EEs instead of 2. This
hasn't caused problems so far since nothing is using the extra channels,
but attempting to use them would lead to crashes.

The bam_dma driver might warn in the future if the num-channels in the DT
are wrong, so correct the properties in the DT to avoid future regressions.

Cc: stable@vger.kernel.org
Fixes: 27ca1de07d ("arm64: dts: qcom: sdm845: add slimbus nodes")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821-sdm845-slimbam-channels-v1-1-498f7d46b9ee@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Shashank Maurya
69f0611c89 arm64: dts: qcom: lemans-evk: Enable Display Port
Lemans EVK board has two mini-DP connectors, connected to EDP0
and EDP1 phys. Other EDP phys are available on expansion
connectors for the mezzanine boards.
Enable EDP0 and EDP1 along with their corresponding PHYs.

Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821-enable-iq9-dp-v3-1-8c3a719e3b9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:14 -05:00
Krzysztof Kozlowski
e2f4e0f141 ARM: dts: qcom: apq8064-mako: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819131717.86713-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:55:32 -05:00
Trevor Woerner
bcafdbaff2 ARM: defconfig: cleanup orphaned CONFIGs
Drop CONFIG_ARCH_MSM8X60 and CONFIG_ARCH_MSM8960 which were removed in
commit 99497df594 ("ARM: qcom: merge remaining subplatforms into sensible
Kconfig entry").

Drop CONFIG_ARCH_MSM8916 and CONFIG_ARCH_MSM8974 which were removed in
commit 85148df368 ("ARM: qcom: drop most of 32-bit ARCH_QCOM subtypes").

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819231652.15938-1-twoerner@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:55:00 -05:00
Prasad Kumpatla
72e9f68bf1 soc: qcom: pd-mapper: Add SM8750 compatible
Add support for the Qualcomm SM8750 SoC to the protection
domain mapper. SM8750 shares the same protection domain
configuration as SM8550, so reuse the existing SM8550 domain data.

Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821160618.1037157-2-quic_pkumpatl@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:51:17 -05:00
Taniya Das
fecc6e0b02 arm64: dts: qcom: qcs615: Add CPU scaling clock node
Add cpufreq-hw node to support CPU frequency scaling.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-2-a06f69928ab5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Taniya Das
f9c36698db arm64: dts: qcom: qcs615: Add clock nodes for multimedia clock
Add support for video, camera, display and gpu clock controller nodes
for QCS615 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Dmitry Baryshkov
be541b8431 arm64: dts: qcom: sm6150: move standard clocks to SoC dtsi
Follow the example of all other platforms and reference standard clocks
(XO, sleep) from the SoC DT even if they are defined in the board DT
file.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250816-qcs615-move-clocks-v1-1-bc5665d6e1c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Dmitry Baryshkov
d7d28bcc20 arm64: dts: qcom: use DT label for DSI outputs
Instead of keeping a copy of the DT tree going down to the DSI output
endpoint use the label to reference it directly, making DTs less
error-prone.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250815-msm-dsi-outs-v2-1-3662704e833f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Gabor Juhos
a300bbd90c arm64: dts: qcom: ipq9574-rdp433: remove unused 'sdc-default-state'
Since commit 8140d10568 ("arm64: dts: qcom: ipq9574: Remove eMMC node"),
the 'sdc-default-state' pinctrl state is not used so remove that.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250701-rdp433-remove-sdc-state-v1-1-ca0f156a42d5@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00