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Tomeu Vizoso
a31dfc060a arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588-base
See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).

The IP is divided in three cores, programmed independently. The first
core though is special, being able to delegate work to the other cores.

The IOMMU of the first core is also special in that it has two subunits
(read/write?) that need to be programmed in sync.

v2:
- Have one device for each NPU core (Sebastian Reichel)
- Have one device for each IOMMU (Sebastian Reichel)
- Correctly sort nodes (Diederik de Haas)
- Add rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)

v3:
- Adapt to a split of the register block in the DT bindings (Nicolas
  Frattaroli)

v4:
- Adapt to changes in bindings

v6:
- pclk and npu clocks are needed by all clocks (Rob Herring)

v8:
- Remove notion of top core (Robin Murphy)

Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-8-77ebd484941e@tomeuvizoso.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 09:45:36 +02:00
Nicolas Frattaroli
6d64bceb97 arm64: dts: rockchip: add pd_npu label for RK3588 power domains
The NPU of the RK3588 has an external supply. This supply also affects
the power domain of the NPU, not just the NPU device nodes themselves.
Since correctly modelled boards will want the power domain to be aware
of the regulator so that it doesn't always have to be on, add a label to
the NPU power domain node so board files can reference it.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250721-6-10-rocket-v9-7-77ebd484941e@tomeuvizoso.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 09:45:36 +02:00
Baojun Xu
f4ee43ae6e ALSA: hda: Add TAS5825 support
Add TAS5825 support in TI's HDA driver.
TAS5825 is an on-chip DSP, but no calibration is required,
and no global address support smart amplifier devices.

Signed-off-by: Baojun Xu <baojun.xu@ti.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250810122358.1575-1-baojun.xu@ti.com
2025-08-11 09:13:42 +02:00
Colin Ian King
03714939b1 ALSA: hda: Fix spelling mistake "dismatch" -> "mismatch"
There is a spelling mistake (or neologism of dis and match) in a
dev_err message. Fix it.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://patch.msgid.link/20250808104621.829448-1-colin.i.king@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-08-11 09:13:11 +02:00
Christopher Eby
0db77eccd9 ALSA: hda/realtek: Add Framework Laptop 13 (AMD Ryzen AI 300) to quirks
Framework Laptop 13 (AMD Ryzen AI 300) requires the same quirk for
headset detection as other Framework 13 models.

Signed-off-by: Christopher Eby <kreed@kreed.org>
Cc: <stable@vger.kernel.org>
Link: https://patch.msgid.link/20250810030006.9060-1-kreed@kreed.org
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-08-11 09:10:57 +02:00
Peter Griffin
78b72897a5 soc: samsung: exynos-pmu: Enable CPU Idle for gs101
Register cpu pm notifiers for gs101 which call the
gs101_cpu_pmu_online/offline callbacks which in turn program the ACPM
C2 hint. This hint is required to actually enter the C2 idle state in
addition to the PSCI calls due to limitations in the el3mon/ACPM firmware.

A couple of corner cases are handled, namely when the system is rebooting
or suspending we ignore the request. Additionally the request is ignored if
the CPU is in CPU hot plug. Some common code is refactored so that it can
be called from both the CPU hot plug callbacks and CPU PM notifier taking
into account that CPU PM notifiers are called with IRQs disabled whereas
CPU hotplug callbacks are not.

Additionally due to CPU PM notifiers using raw_spinlock the locking is
updated to use raw_spinlock variants, this includes updating the pmu_regs
regmap to use .use_raw_spinlock = true and additionally creating and
registering a custom  pmu-intr-gen regmap instead of using the regmap
provided by syscon.

Note: this patch has a runtime dependency on adding 'local-timer-stop' dt
property to the CPU nodes. This informs the time framework to switch to a
broadcast timer as the local timer will be shutdown. Without that DT
property specified the system hangs in early boot with this patch applied.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20250717-gs101-cpuidle-v7-1-33d51770114b@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-11 09:04:54 +02:00
Peter Robinson
d1f9c49761 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-pinebook-pro
As described in the pinebookpro_v2.1_mainboard_schematic.pdf page 10,
he SPI Flash's VCC connector is connected to VCC_3V0 power source.

This fixes the following warning:

  spi-nor spi1.0: supply vcc not found, using dummy regulator

Fixes: 5a65505a69 ("arm64: dts: rockchip: Add initial support for Pinebook Pro")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20250730102129.224468-1-pbrobinson@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 09:03:42 +02:00
Md Sadre Alam
2b5066a3a1 cpufreq: qcom-nvmem: Enable cpufreq for ipq5424
IPQ5424 have different OPPs available for the CPU based on
SoC variant. This can be determined through use of an eFuse
register present in the silicon.

Added support for ipq5424 on nvmem driver which helps to
determine OPPs at runtime based on the eFuse register which
has the CPU frequency limits. opp-supported-hw dt binding
can be used to indicate the available OPPs for each limit.

nvmem driver also creates the "cpufreq-dt" platform_device after
passing the version matching data to the OPP framework so that the
cpufreq-dt handles the actual cpufreq implementation.

Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
[ Changed '!=' based check to '==' based check ]
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:30:46 +05:30
Nicolas Frattaroli
a4053badac arm64: dts: rockchip: Add thermal trim OTP and tsadc nodes
Thanks to Heiko's work getting OTP working on the RK3576, we can specify
the thermal sensor trim values which are stored there now, and with my
driver addition to rockchip_thermal, we can make use of these.

Add them to the devicetree for the SoC.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-7-b6e9efbf1015@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 09:00:34 +02:00
Nicolas Frattaroli
15e8ba9d8b arm64: dts: rockchip: Add thermal nodes to RK3576
Add the TSADC node to the RK3576. Additionally, add everything the TSADC
needs to function, i.e. thermal zones, their trip points and maps, as
well as adjust the CPU cooling-cells property.

The polling-delay properties are set to 0 as we do have interrupts for
this TSADC on this particular SoC, though the polling-delay-passive
properties are set to 100 for the thermal zones that have a passive
cooling device, as otherwise the thermal throttling behaviour never
unthrottles.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-6-b6e9efbf1015@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 09:00:34 +02:00
Chaoyi Chen
6294d0590d arm64: dts: rockchip: Enable eMMC on rk3576-evb1-v10
Some rk3576-evb1 boards use eMMC instead of UFS. Enable eMMC for it.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Link: https://lore.kernel.org/r/20250731062415.212-1-kernel@airkyi.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 08:58:21 +02:00
Chukun Pan
f18c9e79bb arm64: dts: rockchip: mark eeprom as read-only for Radxa E52C
The eeprom on the Radxa E52C SBC contains manufacturer data
such as the mac address, so it should be marked as read-only.

Fixes: 9be4171219 ("arm64: dts: rockchip: Add Radxa E52C")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250810100020.445053-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 08:56:07 +02:00
Chukun Pan
6f36b1fdb8 arm64: dts: rockchip: set LAN LEDs to default-off on Radxa E52C
The NICs have default-trigger of "netdev" in order to show up as
LAN/WAN connected, so their default-state should be set to "off".

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20250810100020.445053-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 08:55:52 +02:00
BowenYu
16d39e2bf9 cpufreq: Remove unused parameter in cppc_perf_from_fbctrs()
Remove the unused parameter cppc_cpudata* cpu_data in
cppc_perf_from_fbctrs().

Signed-off-by: BowenYu <yubowen8@huawei.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:24:51 +05:30
Anton Kirilov
91ec67fa33 arm64: dts: rockchip: Enable HDMI audio output for NanoPi R6C/R6S
Enable HDMI audio output for FriendlyElec NanoPi R6C/R6S boards.

Signed-off-by: Anton Kirilov <anton.kirilov@arm.com>
Link: https://lore.kernel.org/r/20250807170012.88178-1-anton.kirilov@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-11 08:50:01 +02:00
Akhilesh Patil
17bd9599f0 cpufreq: armada-37xx: use max() to calculate target_vm
Use max() macro while calculating target_vm to simplify and improve the
armada-37xx-cpufreq driver code.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/r/202503251256.rrl65HgY-lkp@intel.com/
Reported-by: Yang Ruibin <11162571@vivo.com>
Closes: https://lore.kernel.org/lkml/2c55fb07-b29e-43e0-8697-f75d1f0df89a@vivo.com/
Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:29 +05:30
Christian Marangi
8640689f17 cpufreq: airoha: Add support for AN7583 SoC
New Airoha AN7583 SoC use the same exact logic to control the CPU
frequency. Add the Device compatible to the block list for
cpufreq-dt-plat and to the Airoha CPUFreq driver compatible list.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:20 +05:30
Nicolas Frattaroli
32e0d669f3 cpufreq: mediatek-hw: Add support for MT8196
The MT8196 SoC uses DVFS to set a desired target frequency for each CPU
core. It also uses slightly different register offsets.

Add support for it, which necessitates reworking how the mmio regs are
acquired, as mt8196 has the fdvfs register before the performance domain
registers.

I've verified with both `sysbench cpu run` and `head -c 10G \
/dev/urandom | pigz -p 8 -c - | pv -ba > /dev/null` that we don't just
get a higher reported clock frequency, but that the observed performance
also increases, by a factor of 2.64 in an 8 thread sysbench test.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:03 +05:30
Nicolas Frattaroli
35eb6b7885 cpufreq: mediatek-hw: Separate per-domain and per-instance data
As it stood, the mediatek cpufreq driver could get away with never
really having a private driver instance struct. This is because all data
was stored in the per-domain structs.

However, this complicates matters when actual per-instance data like the
variant struct is introduced. Instead of having a pointer to it for
every domain, have a pointer to a global "priv" struct that can be
extended over time, and rename the "data" struct to "domain" to
distinguish its purpose better.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:02 +05:30
Nicolas Frattaroli
2f5178abb9 cpufreq: mediatek-hw: Refactor match data into struct
While the driver could get away with having the per-compatible match
data just be an array of the reg offsets, the only thing it used it for
right now, this doesn't really allow it to be extended in any meaningful
way if some other per-variant information needs to be communicated.

In preparation of adding support for hybrid "FDVFS" for MT8196, refactor
the code to make the DT match data a struct, which currently only
contains a single member: the reg offsets. This will allow this struct
to be extended with other members for other hardware variants.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:02 +05:30
Nicolas Frattaroli
62498af7b1 dt-bindings: cpufreq: Add mediatek,mt8196-cpufreq-hw binding
The MediaTek MT8196 SoC has new cpufreq hardware, with added memory
register ranges to control Dynamic-Voltage-Frequency-Scaling.

The DVFS hardware is controlled through a set of registers referred to
as "FDVFS". They set the target frequency the DVFS hardware should aim
for for each performance domain.

Instead of working around the old binding and its already established
meanings for the reg items, add a new binding. The FDVFS register memory
region is at the beginning, which allows us to easily expand this
binding for future SoCs which may have more than 3 performance domains.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11 12:19:01 +05:30
Tzung-Bi Shih
032c59c1d3 platform/chrome: cros_ec_chardev: Decouple fops from struct cros_ec_dev
The fops doesn't really need to hold a reference to struct cros_ec_dev.
Remove the references from the fops.

No functional changes.

Link: https://lore.kernel.org/r/20250721044456.2736300-4-tzungbi@kernel.org
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2025-08-11 14:37:29 +08:00
Tzung-Bi Shih
432418bf27 platform/chrome: cros_ec_chardev: Remove redundant struct field
`ec_dev` in the `struct chardev_data` is unused.  Remove the field
and the whole struct as well.

Link: https://lore.kernel.org/r/20250721044456.2736300-2-tzungbi@kernel.org
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2025-08-11 14:37:29 +08:00
Eric Biggers
0eff12ce88 thunderbolt: Use HMAC-SHA256 library instead of crypto_shash
Use the hmac_sha256_usingrawkey() library function instead of the
"hmac(sha256)" crypto_shash.  This is simpler and faster.

As a cleanup, change the input data parameters from "challenge,
sizeof(hmac)" to "challenge, sizeof(challenge)", so that the size is
being taken of the correct buffer.  This is not a functional change,
since it happens that sizeof(hmac) == sizeof(challenge).

Replace the selection of CRYPTO and CRYPTO_HASH with CRYPTO_LIB_SHA256
and CRYPTO_LIB_UTILS.  The latter is needed for crypto_memneq() which
was previously being pulled in via CRYPTO.

Signed-off-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2025-08-11 07:56:14 +02:00
Eric Biggers
dced755df3 thunderbolt: Compare HMAC values in constant time
To prevent timing attacks, HMAC value comparison needs to be constant
time.  Replace the memcmp() with the correct function, crypto_memneq().

Fixes: f67cf49117 ("thunderbolt: Add support for Internal Connection Manager (ICM)")
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2025-08-11 07:56:13 +02:00
Stephan Gerhold
5068b52548 dmaengine: qcom: bam_dma: Fix DT error handling for num-channels/ees
When we don't have a clock specified in the device tree, we have no way to
ensure the BAM is on. This is often the case for remotely-controlled or
remotely-powered BAM instances. In this case, we need to read num-channels
from the DT to have all the necessary information to complete probing.

However, at the moment invalid device trees without clock and without
num-channels still continue probing, because the error handling is missing
return statements. The driver will then later try to read the number of
channels from the registers. This is unsafe, because it relies on boot
firmware and lucky timing to succeed. Unfortunately, the lack of proper
error handling here has been abused for several Qualcomm SoCs upstream,
causing early boot crashes in several situations [1, 2].

Avoid these early crashes by erroring out when any of the required DT
properties are missing. Note that this will break some of the existing DTs
upstream (mainly BAM instances related to the crypto engine). However,
clearly these DTs have never been tested properly, since the error in the
kernel log was just ignored. It's safer to disable the crypto engine for
these broken DTBs.

[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/

Cc: stable@vger.kernel.org
Fixes: 48d163b1aa ("dmaengine: qcom: bam_dma: get num-channels and num-ees from dt")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-8-f560889e65d8@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-11 10:52:43 +05:30
Stephan Gerhold
2257117225 dt-bindings: dma: qcom: bam-dma: Add missing required properties
num-channels and qcom,num-ees are required when there are no clocks
specified in the device tree, because we have no reliable way to read them
from the hardware registers if we cannot ensure the BAM hardware is up when
the device is being probed.

This has often been forgotten when adding new SoC device trees, so make
this clear by describing this requirement in the schema.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-7-f560889e65d8@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-11 10:52:43 +05:30
Ovidiu Panait
5f5743e5b5 staging: axis-fifo: remove unnecessary dev_set_drvdata() calls
Remove unnecessary dev_set_drvdata() calls - driver_data will be set to
NULL in device_unbind_cleanup() at driver exit time.

This allows us to remove the 'err_initial' label, simplifying the probe
function a bit.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Link: https://lore.kernel.org/r/20250808204831.2618122-1-ovidiu.panait.oss@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Jannik Rehkemper
498a14ce8e staging: rtl8723bs: fix checkpatch spaces preferred around that
Added spaces where prefered or required by the checkpatch.pl script to
adhere codestyle.

Signed-off-by: Jannik Rehkemper <jannik@jrehkemper.de>
Link: https://lore.kernel.org/r/20250807185436.853318-2-jannik@jrehkemper.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
c158e7c293 staging: rtl8723bs: move rtw_reset_securitypriv to core/rtw_mlme.c
Move the function rtw_reset_securitypriv from os_dep/mlme_linux.c to
core/rtw_mlme.c to reduce code in the os_dep directory.

The file os_dep/mlme_linux.c is finally empty now and we can remove it.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-9-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
522440e417 staging: rtl8723bs: move rtw_report_sec_ie to core/rtw_mlme.c
Move the function rtw_report_sec_ie from os_dep/mlme_linux.c to
core/rtw_mlme.c to reduce code in the os_dep directory.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-8-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
7bb7804420 staging: rtl8723bs: merge rtw_os_indicate_disconnect into rtw_indicate_disconnect
Merge the functionality of the function rtw_os_indicate_disconnect into the
function rtw_indicate_disconnect to reduce code in the os_dep directory.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-7-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
ff059535aa staging: rtl8723bs: merge rtw_os_indicate_connect into rtw_indicate_connect
Merge the functionality of the function rtw_os_indicate_connect into the
function rtw_indicate_connect to reduce code in the os_dep directory.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-6-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
eec9d92d08 staging: rtl8723bs: remove wrapper init_addba_retry_timer
The function init_addba_retry_timer is just a wrapper around timer_setup.
Remove the wrapper and use timer_setup directly.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-5-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
472646fce3 staging: rtl8723bs: move rtw_init_mlme_timer to core/rtw_mlme.c
Move the function rtw_init_mlme_timer from os_dep/mlme_linux.c to
core/rtw_mlme.c to reduce code in the os_dep directory.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-4-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
6f9ada0a69 staging: rtl8723bs: move init_mlme_ext_timer to core/rtw_mlme_ext.c
Move the function init_mlme_ext_timer from os_dep/mlme_linux.c to
core/rtw_mlme_ext.c to reduce code in the os_dep directory.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-3-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Michael Straube
7c0480fd76 staging: rtl8723bs: remove wrapper rtw_os_indicate_scan_done
The function rtw_os_indicate_scan_done is just a wrapper around
rtw_cfg80211_indicate_scan_done. Use rtw_cfg80211_indicate_scan_done
directly and remove the wrapper.

Signed-off-by: Michael Straube <straube.linux@gmail.com>
Tested-by: Hans de Goede <hansg@kernel.org>
Reviewed-by: Hans de Goede <hansg@kernel.org>
Link: https://lore.kernel.org/r/20250801083131.82915-2-straube.linux@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Zhuoheng Li
08a2e17462 staging: rtl8723bs: fix space-before-tab warnings
Fixes multiple coding style issues reported by checkpatch.pl:
"WARNING: please, no space before tabs". This patch only adjusts
whitespace indentation without changing functionality.

Signed-off-by: Zhuoheng Li <lizhuoheng@kylinos.cn>
Link: https://lore.kernel.org/r/20250805023816.3741-1-15620332615@163.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:22 +02:00
Len Bao
4a9e0777bf staging: octeon: Use 'u64' instead of 'uint64_t' in union cvmx_pip_wqe_word2
In the kernel type 'u64' is preferred over type 'uint64_t'. So, refactor
the 'union cvmx_pip_wqe_word2' to use the former. At the same time, take
advantage of this to align the bits quantity to improve readability.
Also, separate the structs with blank lines to gain readability.

Signed-off-by: Len Bao <len.bao@gmx.us>
Link: https://lore.kernel.org/r/20250727101052.41181-1-len.bao@gmx.us
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:21 +02:00
Bruce Qin
520c9fde09 staging: rtl8723bs: fix if-statement alignment and line continuation in rtw_ap.c
This patch fixes several style issues in a multiline if-statement:

- Moved '&&' to the end of the previous line to follow logical continuation style
- Fixed indentation to align with the opening parenthesis of the expression
- Avoided ending a line with an open parenthesis '('
- Moved closing ')' to the end of the last expression line (as suggested by the maintainer)

These changes improve readability and conform to Linux kernel coding conventions.
No functional changes.

Signed-off-by: Bruce Qin <bqn9090@gmail.com>
Link: https://lore.kernel.org/r/20250724192533.21141-1-bqn9090@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:21 +02:00
Ali Nasrolahi
5225c689dd staging: rtl8723bs: fix comment formatting in basic_types.h
This patch fixes several block comment formatting issues in basic_types.h
to comply with the Linux kernel coding style.

Changes include:
- Aligning comment markers with asterisks in multi-line comments
- Reformatting long lines for better readability
- Improving consistency in comment structure
- Fixing typos in comments

These changes improve readability and remove checkpatch.pl warnings.
No functional changes introduced.

Signed-off-by: Ali Nasrolahi <A.Nasrolahi01@gmail.com>
Link: https://lore.kernel.org/r/20250724175819.29142-1-A.Nasrolahi01@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-11 07:21:21 +02:00
Frederic Weisbecker
61399e0c54 rcu: Fix racy re-initialization of irq_work causing hangs
RCU re-initializes the deferred QS irq work everytime before attempting
to queue it. However there are situations where the irq work is
attempted to be queued even though it is already queued. In that case
re-initializing messes-up with the irq work queue that is about to be
handled.

The chances for that to happen are higher when the architecture doesn't
support self-IPIs and irq work are then all lazy, such as with the
following sequence:

1) rcu_read_unlock() is called when IRQs are disabled and there is a
   grace period involving blocked tasks on the node. The irq work
   is then initialized and queued.

2) The related tasks are unblocked and the CPU quiescent state
   is reported. rdp->defer_qs_iw_pending is reset to DEFER_QS_IDLE,
   allowing the irq work to be requeued in the future (note the previous
   one hasn't fired yet).

3) A new grace period starts and the node has blocked tasks.

4) rcu_read_unlock() is called when IRQs are disabled again. The irq work
   is re-initialized (but it's queued! and its node is cleared) and
   requeued. Which means it's requeued to itself.

5) The irq work finally fires with the tick. But since it was requeued
   to itself, it loops and hangs.

Fix this with initializing the irq work only once before the CPU boots.

Fixes: b41642c877 ("rcu: Fix rcu_read_unlock() deadloop due to IRQ work")
Reported-by: kernel test robot <oliver.sang@intel.com>
Closes: https://lore.kernel.org/oe-lkp/202508071303.c1134cce-lkp@intel.com
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Neeraj Upadhyay (AMD) <neeraj.upadhyay@kernel.org>
2025-08-11 08:43:49 +05:30
Rob Herring (Arm)
684339e80a dt-bindings: PCI: Add missing "#address-cells" to interrupt controllers
An interrupt-controller node which is the parent provider for
"interrupt-map" needs an "#address-cells" property. This fixes
"interrupt_map" warnings in new dtc.

Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250801200728.3252036-2-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-10 21:49:51 -05:00
Bjorn Andersson
25daf9af0a soc: qcom: mdt_loader: Deal with zero e_shentsize
Firmware that doesn't provide section headers leave both e_shentsize and
e_shnum 0, which obvious isn't compatible with the newly introduced
stricter checks.

Make the section-related checks conditional on either of these values
being non-zero.

Fixes: 9f9967fed9 ("soc: qcom: mdt_loader: Ensure we don't read past the ELF header")
Reported-by: Val Packett <val@packett.cool>
Closes: https://lore.kernel.org/all/ece307c3-7d65-440f-babd-88cf9705b908@packett.cool/
Reported-by: Neil Armstrong <neil.armstrong@linaro.org>
Closes: https://lore.kernel.org/all/aec9cd03-6fc2-4dc8-b937-8b7cf7bf4128@linaro.org/
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Fixes: 9f35ab0e53 ("soc: qcom: mdt_loader: Fix error return values in mdt_header_valid()")
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250730-mdt-loader-shentsize-zero-v1-1-04f43186229c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:02:14 -05:00
Wasim Nazir
99ea5a0d6b arm64: dts: qcom: Add lemans evaluation kit (EVK) initial board support
Lemans EVK is an IoT board without safety monitoring feature of
Safety Island(SAIL) subsystem.

Lemans EVK is single board supporting these peripherals:
  - Storage: 2 × 128 GB UFS, micro-SD card, EEPROMs for MACs,
    eMMC on mezzanine card
  - Audio/Video, Camera & Display ports
  - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD
  - Sensors: IMU
  - PCIe ports
  - USB & UART ports

On top of lemans EVK board additional mezzanine boards can be stacked
in future.

Implement basic features like uart/ufs to enable 'boot to shell'.

Co-developed-by: Rakesh Kota <quic_kotarake@quicinc.com>
Signed-off-by: Rakesh Kota <quic_kotarake@quicinc.com>
Co-developed-by: Sayali Lokhande <quic_sayalil@quicinc.com>
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-9-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:20 -05:00
Wasim Nazir
e9d84a1f8b dt-bindings: arm: qcom: lemans: Add bindings for Lemans Evaluation Kit (EVK)
Introduce new bindings for the Lemans EVK, an IoT board without safety
features.

Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250803110113.401927-8-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:16 -05:00
Wasim Nazir
b4feac9e03 arm64: dts: qcom: lemans: Fix dts inclusion for IoT boards and update memory map
IoT boards currently inherit the automotive memory map, which is not
suitable for their configuration. This leads to incorrect memory layout
and inclusion of unnecessary carveouts.

Use lemans.dtsi as the base for IoT boards to apply the correct memory
map. Include additional DTSI files as needed to complete the board
configuration.

Update 'model' string to represent these boards as 'lemans'.

Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-7-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:16 -05:00
Wasim Nazir
d39e1d737b arm64: dts: qcom: lemans: Rename sa8775p-pmics.dtsi to lemans-pmics.dtsi
The existing PMIC DTSI file is named sa8775p-pmics.dtsi, which does not
align with the updated naming convention for Lemans platform components.
This inconsistency can lead to confusion and misalignment with other
platform-specific files.

Rename the file to lemans-pmics.dtsi to reflect the platform naming
convention and improve clarity.

Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-6-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Wasim Nazir
76326da895 arm64: dts: qcom: lemans: Refactor ride/ride-r3 boards based on daughter cards
Ride/Ride-r3 boards used with lemans and derivatives:
  - Are composed of multiple daughter cards (SoC-card, display, camera,
    ethernet, pcie, sensor, front & backplane, WLAN & BT).
  - Across lemans & its derivatives, SoM is changing.
  - Across Ride & Ride-r3 board, ethernet card is changing.

Excluding the differences all other cards i.e SoC-card, display,
camera, PCIe, sensor, front & backplane are same across Ride/Ride-r3
boards used with lemans and derivatives.

Describe all the common cards in lemans-ride-common so that it can be
reused for all the variants of ride & ride-r3 platforms in lemans and
derivatives.

Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-5-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Wasim Nazir
4c0c97b95a arm64: dts: qcom: lemans: Separate out ethernet card for ride & ride-r3
Ride & Ride-r3 in lemans/lemans-auto uses different ethernet cards
with different phy capabilities. Separate out the ethernet card
information from main board so that it can be reused for all the
variants of ride & ride-r3 platforms in lemans/lemans-auto.

Lemans/lemans-auto Ride uses 1G phy while Lemans/lemans-auto Ride-r3
uses 2.5G phy.

Introduce ethernet cards with 1G & 2.5G phy capabilities respectively:
  *-88ea1512.dtsi is for 2x 1G - SGMII (Marvell 88EA1512-B2) phy
  *-aqr115c.dtsi is for 2x 2.5G - HSGMII (Marvell AQR115c) phy

Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-4-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00