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1,403,262 commits

Author SHA1 Message Date
Wasim Nazir
24dc241bdd arm64: dts: qcom: lemans: Update memory-map for IoT platforms
The "automotive" memory map is the special case for the Lemans
configuration described by this dtsi, move it aside and use the IoT
memory map as the baseline.

Introduce "lemans-auto" as a derivative of "lemans" that retains the
old automotive memory map to support legacy use cases.

As part of the IoT memory map updates:
  - Introduce new carveouts for gunyah_md and pil_dtb. Adjust the size and
    base address of the PIL carveout to accommodate these changes.
  - Increase the size of the video/camera PIL carveout without affecting
    existing functionality.
  - Reduce the size of the trusted apps carveout to meet IoT-specific
    requirements.
  - Remove audio_mdf_mem, tz_ffi_mem, and their corresponding SCM references,
    as they are not required for IoT platforms.

Co-developed-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Co-developed-by: Prakash Gupta <quic_guptap@quicinc.com>
Signed-off-by: Prakash Gupta <quic_guptap@quicinc.com>
Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-3-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Wasim Nazir
c7724332e0 arm64: dts: qcom: Rename sa8775p SoC to "lemans"
SA8775P, QCS9100 and QCS9075 are all variants of the same die,
collectively referred to as lemans. Most notably, the last of them
has the SAIL (Safety Island) fused off, but remains identical
otherwise.

In an effort to streamline the codebase, rename the SoC DTSI, moving
away from less meaningful numerical model identifiers.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wasim Nazir <wasim.nazir@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250803110113.401927-2-wasim.nazir@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Dmitry Baryshkov
633ffe2317 arm64: dts: qcom: sm8550: stop using SoC-specific genpd indices
The SM8550 has switched to RPMHPD_* indices for RPMh power domains,
however commit e271b59e39 ("arm64: dts: qcom: sm8550: Add camera clock
controller") brought some more old-style indices. Convert all of them to
use common RPMh PD indices.

Fixes: e271b59e39 ("arm64: dts: qcom: sm8550: Add camera clock controller")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250718-fix-rpmhpd-abi-v2-4-0059edb9ddb3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Dmitry Baryshkov
c48aa92720 arm64: dts: qcom: sm8250: stop using SoC-specific genpd indices
The SM8250 has switched to RPMHPD_* indices for RPMh power domains,
however commit 86a9264b6c ("arm64: dts: qcom: sm8250: Add
interconnects and power-domains to QUPs") brought some more old-style
indices. Convert all of them to use common RPMh PD indices.

Fixes: 86a9264b6c ("arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250718-fix-rpmhpd-abi-v2-3-0059edb9ddb3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Dmitry Baryshkov
1d517444b2 arm64: dts: qcom: sm8150: use correct PD for DisplayPort controller
Commit 5dd110c90a ("arm64: dts: qcom: sm8150: add DisplayPort
controller") specified SM8250_MMCX (= 6) for the DisplayPort power
domain, however on SM8150 this indices maps to SM8150_MX_AO (= 6). Use
correct indice instead (SM8150_MMCX = 9).

Fixes: 5dd110c90a ("arm64: dts: qcom: sm8150: add DisplayPort controller")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20250718-fix-rpmhpd-abi-v2-2-0059edb9ddb3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Dmitry Baryshkov
3ede313b5e arm64: dts: qcom: sa8775p: fix RPMh power domain indices
On SA8775P power domains device doesn't use unufied (RPMHPD_foo) ABI,
but it uses SoC-specific indices (SA8775P_foo). Consequently, all DSP on
that platform are referencing random PDs instead of the expected ones.

Correct indices used for that platform.

Fixes: df54dcb34f ("arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodes")
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20250718-fix-rpmhpd-abi-v2-1-0059edb9ddb3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-10 21:01:15 -05:00
Tomer Maimon
13587befb3 arm64: dts: nuvoton: add refclk and update peripheral clocks for NPCM845
Add a 25 MHz fixed-clock node (refclk) in the NPCM845-EVB board device
tree to represent the external reference clock used by the NPCM845 reset
and clock controller.

Update peripherals (timer0, watchdog0-2) in the NPCM845 device tree to
reference this refclk directly instead of the previous clock controller
output (NPCM8XX_CLK_REFCLK).

Depends-on: arm64: dts: nuvoton: Combine NPCM845 reset and clk nodes

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://patch.msgid.link/20250706134207.2168184-3-tmaimon77@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:38:08 +09:30
Tomer Maimon
2e6028f8fa arm64: dts: nuvoton: combine NPCM845 reset and clk nodes
Combine the NPCM845 reset and clock controller nodes into a single node
with compatible "nuvoton,npcm845-reset" in nuvoton-common-npcm8xx.dtsi,
using the auxiliary device framework to provide clock functionality.

Update the register range to 0xC4 to cover the shared reset and clock
registers at 0xf0801000.

Remove the separate nuvoton,npcm845-clk node, as the reset driver now
handles clocks via an auxiliary device.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://patch.msgid.link/20250706134207.2168184-2-tmaimon77@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:38:08 +09:30
Tomer Maimon
91f8329e67 arm64: dts: nuvoton: npcm845: Add pinctrl groups
Add 64 missing pinctrl groups to the NPCM845 device tree source file to
support additional pinmux configurations defined in the npcm845-pinctrl
driver.

This enhances the pinmux configuration for the NPCM845 SoC, enabling
further hardware pin functionalities.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://patch.msgid.link/20250706153551.2180052-1-tmaimon77@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:38:08 +09:30
Krzysztof Kozlowski
7686b441c0 ARM: dts: nuvoton: Use generic "ethernet" as node name
Common name for Ethernet controllers is "ethernet", not "eth", also
recommended by Devicetree specification in "Generic Names
Recommendation".  Verified lack of impact using dtx_diff.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250717142301.92548-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:38:03 +09:30
Ryan Chen
c30dcfd4b5 soc: aspeed: socinfo: Add AST27xx silicon IDs
Extend the ASPEED SoC info driver to support AST27XX silicon IDs.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Link: https://patch.msgid.link/20250807005208.3517283-1-ryan_chen@aspeedtech.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:53 +09:30
Rob Herring (Arm)
c5313eea3e soc: aspeed: Use of_reserved_mem_region_to_resource() for "memory-region"
Use the newly added of_reserved_mem_region_to_resource() function to
handle "memory-region" properties.

The error handling is a bit different. "memory-region" is optional, so
failed lookup is not an error. But then an error in
of_address_to_resource() is treated as an error. However, that
distinction is not really important. Either the region is available
and usable or it is not. So now, it is just
of_reserved_mem_region_to_resource() which is checked for an error.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250703183508.2074735-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:53 +09:30
Tan Siewert
b785b5d88c ARM: dts: aspeed: x570d4u: convert NVMEM content to layout syntax
The used bindings syntax has been deprecated and doesn't work properly
anymore.

Use the newer (and non-deprecated) fixed-layout approach. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Tan Siewert <tan@siewert.io>
Reviewed-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://patch.msgid.link/20250803151949.68618-4-tan@siewert.io
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:48 +09:30
Tan Siewert
1f5ab37b75 ARM: dts: aspeed: romed8hm3: convert NVMEM content to layout syntax
The used bindings syntax has been deprecated and doesn't work properly
anymore.

Use the newer (and non-deprecated) fixed-layout approach. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Tan Siewert <tan@siewert.io>
Reviewed-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://patch.msgid.link/20250803151949.68618-3-tan@siewert.io
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:48 +09:30
Tan Siewert
2660d172a3 ARM: dts: aspeed: e3c256d4i: convert NVMEM content to layout syntax
The used bindings syntax has been deprecated and doesn't work properly
anymore.

Use the newer (and non-deprecated) fixed-layout approach. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Tan Siewert <tan@siewert.io>
Reviewed-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://patch.msgid.link/20250803151949.68618-2-tan@siewert.io
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tan Siewert
5bf96232ed ARM: dts: aspeed: e3c246d4i: convert NVMEM content to layout syntax
The used bindings syntax has been deprecated and doesn't work properly
anymore.

Use the newer (and non-deprecated) fixed-layout approach. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Tan Siewert <tan@siewert.io>
Reviewed-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://patch.msgid.link/20250803151949.68618-1-tan@siewert.io
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Rob Herring (Arm)
608e2990e6 ARM: dts: aspeed: Add missing "ibm,spi-fsi" compatibles
The "ibm,spi-fsi" compatible is missing or incorrect in various nodes.
The incorrect cases used the "ibm,fsi2spi" compatible by mistake which
is the parent node of the actual SPI controller nodes.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20250731-dt-fsi-cleanups-v1-3-e7b695a29fc3@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Rob Herring (Arm)
b1ccd095b8 ARM: dts: aspeed: Drop "fsi-master" compatibles
The "fsi-master" compatible has been used inconsistently on FSI masters.
It doesn't have any real use or meaning, so it's easier to drop it
everywhere than add it where missing. It is also not documented by any
schemas (only .txt bindings).

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20250731-dt-fsi-cleanups-v1-2-e7b695a29fc3@kernel.org
[arj: Drop hunk affecting removed swift platform]
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Rob Herring (Arm)
3ca621af06 ARM: dts: aspeed: Drop "no-gpio-delays"
The "no-gpios-delays" property only applies to the "fsi-master-gpio"
binding and not the "aspeed,ast2[45]00-cf-fsi-master" binding. It
doesn't really make sense either as the timing is controlled by the
offloaded firmware.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20250731-dt-fsi-cleanups-v1-1-e7b695a29fc3@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
88950abacd ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC
Add initial device tree for the Meta (Facebook) Darwin AST2600 BMC.

Darwin is Meta's rack switch platform with an AST2600 BMC integrated for
health monitoring purpose.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-14-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
0ae1108099 dt-bindings: arm: aspeed: add Facebook Darwin board
Document the new compatibles used on Meta/Facebook Darwin board.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250728055618.61616-13-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
b0f294fdfc ARM: dts: aspeed: facebook-fuji: Include facebook-fuji-data64.dts
Include "facebook-fuji-data64.dts" in facebook-fuji dts to avoid
duplicated code.

Fuji-data64 and Fuji are identical except the BMC flash layout.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-12-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
1bc2625836 ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board
Introduce fuji-data64.dts to extend Meta/Facebook Fuji BMC's data0
partition without breaking the existing users.

Fuji-data64.dts is copied from fuji.dts with below changes:
  - updating model/compatible strings.
  - updating FMC flash0' data0 partition to 64MB.
  - removing mac3.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-11-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
36296b06cd dt-bindings: arm: aspeed: add Facebook Fuji-data64 board
Document the new compatibles used on Meta/Facebook Fuji-data64 board.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250728055618.61616-10-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
fe0e2fbb6a ARM: dts: aspeed: wedge400: Include wedge400-data64.dts
Include "wedge400-data64.dts" in wedge400 dts to avoid duplicated code.

Wedge400-data64 and Wedge400 are identical except the BMC flash layout.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-9-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
2baf3b61f0 ARM: dts: aspeed: Add Facebook Wedge400-data64 (AST2500) BMC
Add wedge400-data64.dts to extend wedge400's data0 partition from 8MB to
64MB smoothly.

wedge400-data64.dts is copied from wedge400.dts with below changes:
  - updating model/compatible strings.
  - updating flash0 partition.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-8-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
83656699ba dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board
Document the new compatibles used on Meta/Facebook Wedge400-data64
board.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250728055618.61616-7-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
e1b5c5f547 ARM: dts: aspeed: Add facebook-bmc-flash-layout-128-data64.dtsi
Add facebook-bmc-flash-layout-128-data64.dts (with 64MB datastore) to be
used by Meta Network BMC platforms.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-6-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
c11f9190f9 ARM: dts: aspeed: Move eMMC out of ast2600-facebook-netbmc-common.dtsi
Move eMMC entries from ast2600-facebook-netbmc-common.dtsi to each
platform because eMMC is removed from future Meta/Facebook AST2600
Network BMC platforms.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-5-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
dc4717e34f ARM: dts: aspeed: Fix DTB warnings in ast2600-facebook-netbmc-common.dtsi
Fix deprecated spi-gpio properties in ast2600-facebook-netbmc-common.dtsi.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-4-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:47 +09:30
Tao Ren
78831e53bb ARM: dts: aspeed: fuji: Fix DTB warnings
Remove redundant adm1278 properties from fuji dts.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-3-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Tao Ren
fc6c8ccfaa ARM: dts: aspeed: wedge400: Fix DTB warnings
Fix the deprecated spi-gpio properties in wedge400 dts.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://patch.msgid.link/20250728055618.61616-2-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Willie Thai
2b4e0d787d ARM: dts: aspeed: nvidia: gb200nvl: Enable MAC0 for BMC network
Upstream-Status: Inappropriate Bad devices

Signed-off-by: Deepak Kodihalli <dkodihalli@nvidia.com>
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250717-update-gb200nvl-dts-for-new-hardware-v3-4-f28145c55c98@nvidia.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Willie Thai
2193aed602 ARM: dts: aspeed: nvidia: gb200nvl: Repurpose the HMC gpio pin
Repurpose the HMC reset pin to FPGA reset pin.
This change is according to hardware change.

Signed-off-by: Deepak Kodihalli <dkodihalli@nvidia.com>
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
Link: https://patch.msgid.link/20250717-update-gb200nvl-dts-for-new-hardware-v3-3-f28145c55c98@nvidia.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Willie Thai
63d2e5dd62 ARM: dts: aspeed: nvidia: gb200nvl: Enable i2c3 bus
Enable i2c3 bus for telemetry fetching purpose.

Signed-off-by: Deepak Kodihalli <dkodihalli@nvidia.com>
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
Link: https://patch.msgid.link/20250717-update-gb200nvl-dts-for-new-hardware-v3-2-f28145c55c98@nvidia.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Willie Thai
b20d199da7 ARM: dts: aspeed: nvidia: gb200nvl: Add VCC Supply
Add Vcc supply to avoid probing the devices before they have power.

Signed-off-by: Deepak Kodihalli <dkodihalli@nvidia.com>
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
Link: https://patch.msgid.link/20250717-update-gb200nvl-dts-for-new-hardware-v3-1-f28145c55c98@nvidia.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-08-11 09:37:46 +09:30
Gao Xiang
0b96d9bed3 erofs: fix block count report when 48-bit layout is on
Fix incorrect shift order when combining the 48-bit block count.

Fixes: 2e1473d519 ("erofs: implement 48-bit block addressing for unencoded inodes")
Signed-off-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Link: https://lore.kernel.org/r/20250807082019.3093539-1-hsiangkao@linux.alibaba.com
2025-08-11 06:31:19 +08:00
Junli Liu
c99fab6e80 erofs: fix atomic context detection when !CONFIG_DEBUG_LOCK_ALLOC
Since EROFS handles decompression in non-atomic contexts due to
uncontrollable decompression latencies and vmap() usage, it tries
to detect atomic contexts and only kicks off a kworker on demand
in order to reduce unnecessary scheduling overhead.

However, the current approach is insufficient and can lead to
sleeping function calls in invalid contexts, causing kernel
warnings and potential system instability. See the stacktrace [1]
and previous discussion [2].

The current implementation only checks rcu_read_lock_any_held(),
which behaves inconsistently across different kernel configurations:

- When CONFIG_DEBUG_LOCK_ALLOC is enabled: correctly detects
  RCU critical sections by checking rcu_lock_map
- When CONFIG_DEBUG_LOCK_ALLOC is disabled: compiles to
  "!preemptible()", which only checks preempt_count and misses
  RCU critical sections

This patch introduces z_erofs_in_atomic() to provide comprehensive
atomic context detection:

1. Check RCU preemption depth when CONFIG_PREEMPTION is enabled,
   as RCU critical sections may not affect preempt_count but still
   require atomic handling

2. Always use async processing when CONFIG_PREEMPT_COUNT is disabled,
   as preemption state cannot be reliably determined

3. Fall back to standard preemptible() check for remaining cases

The function replaces the previous complex condition check and ensures
that z_erofs always uses (kthread_)work in atomic contexts to minimize
scheduling overhead and prevent sleeping in invalid contexts.

[1] Problem stacktrace
[ 61.266692] BUG: sleeping function called from invalid context at kernel/locking/rtmutex_api.c:510
[ 61.266702] in_atomic(): 0, irqs_disabled(): 0, non_block: 0, pid: 107, name: irq/54-ufshcd
[ 61.266704] preempt_count: 0, expected: 0
[ 61.266705] RCU nest depth: 2, expected: 0
[ 61.266710] CPU: 0 UID: 0 PID: 107 Comm: irq/54-ufshcd Tainted: G W O 6.12.17 #1
[ 61.266714] Tainted: [W]=WARN, [O]=OOT_MODULE
[ 61.266715] Hardware name: schumacher (DT)
[ 61.266717] Call trace:
[ 61.266718] dump_backtrace+0x9c/0x100
[ 61.266727] show_stack+0x20/0x38
[ 61.266728] dump_stack_lvl+0x78/0x90
[ 61.266734] dump_stack+0x18/0x28
[ 61.266736] __might_resched+0x11c/0x180
[ 61.266743] __might_sleep+0x64/0xc8
[ 61.266745] mutex_lock+0x2c/0xc0
[ 61.266748] z_erofs_decompress_queue+0xe8/0x978
[ 61.266753] z_erofs_decompress_kickoff+0xa8/0x190
[ 61.266756] z_erofs_endio+0x168/0x288
[ 61.266758] bio_endio+0x160/0x218
[ 61.266762] blk_update_request+0x244/0x458
[ 61.266766] scsi_end_request+0x38/0x278
[ 61.266770] scsi_io_completion+0x4c/0x600
[ 61.266772] scsi_finish_command+0xc8/0xe8
[ 61.266775] scsi_complete+0x88/0x148
[ 61.266777] blk_mq_complete_request+0x3c/0x58
[ 61.266780] scsi_done_internal+0xcc/0x158
[ 61.266782] scsi_done+0x1c/0x30
[ 61.266783] ufshcd_compl_one_cqe+0x12c/0x438
[ 61.266786] __ufshcd_transfer_req_compl+0x2c/0x78
[ 61.266788] ufshcd_poll+0xf4/0x210
[ 61.266789] ufshcd_transfer_req_compl+0x50/0x88
[ 61.266791] ufshcd_intr+0x21c/0x7c8
[ 61.266792] irq_forced_thread_fn+0x44/0xd8
[ 61.266796] irq_thread+0x1a4/0x358
[ 61.266799] kthread+0x12c/0x138
[ 61.266802] ret_from_fork+0x10/0x20

[2] https://lore.kernel.org/r/58b661d0-0ebb-4b45-a10d-c5927fb791cd@paulmck-laptop

Signed-off-by: Junli Liu <liujunli@lixiang.com>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Link: https://lore.kernel.org/r/20250805011957.911186-1-liujunli@lixiang.com
[ Gao Xiang: Use the original trace in v1. ]
Signed-off-by: Gao Xiang <hsiangkao@linux.alibaba.com>
2025-08-11 06:02:20 +08:00
Geert Uytterhoeven
74da24f0ac erofs: Do not select tristate symbols from bool symbols
The EROFS filesystem has many configurable options, controlled through
boolean Kconfig symbols.  When enabled, these options may need to enable
additional library functionality elsewhere.  Currently this is done by
selecting the symbol for the additional functionality.  However, if
EROFS_FS itself is modular, and the target symbol is a tristate symbol,
the additional functionality is always forced built-in.

Selecting tristate symbols from a tristate symbol does keep modular
transitivity.  Hence fix this by moving selects of tristate symbols to
the main EROFS_FS symbol.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Link: https://lore.kernel.org/r/da1b899e511145dd43fd2d398f64b2e03c6a39e7.1753879351.git.geert+renesas@glider.be
Signed-off-by: Gao Xiang <hsiangkao@linux.alibaba.com>
2025-08-11 06:02:20 +08:00
Yuezhang Mo
c6993c4cb9 erofs: Fallback to normal access if DAX is not supported on extra device
If using multiple devices, we should check if the extra device support
DAX instead of checking the primary device when deciding if to use DAX
to access a file.

If an extra device does not support DAX we should fallback to normal
access otherwise the data on that device will be inaccessible.

Signed-off-by: Yuezhang Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Friendy Su <friendy.su@sony.com>
Reviewed-by: Jacky Cao <jacky.cao@sony.com>
Reviewed-by: Daniel Palmer <daniel.palmer@sony.com>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Reviewed-by: Hongbo Li <lihongbo22@huawei.com>
Link: https://lore.kernel.org/r/20250804082030.3667257-2-Yuezhang.Mo@sony.com
Signed-off-by: Gao Xiang <hsiangkao@linux.alibaba.com>
2025-08-11 06:02:19 +08:00
Gabor Juhos
a1d0b0ae65
spi: spi-qpic-snand: avoid double assignment in qcom_spi_probe()
The snandc->dev pointer is being assigned twice in the qcom_spi_probe()
function. Remove the second assignment as that uses the same pointer
value than the first one.

No functional changes.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Link: https://patch.msgid.link/20250808-qpic-snand-double-assign-fix-v2-1-1a3d0ed0d404@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:43 +01:00
Manikandan Muralidharan
91e5722baa
spi: atmel: Add support for handling GCLK as a clock source
The SPI peripheral clock is typically used to derive the serial
clock (SPCK) via the FLEX_SPI_CSRx.SCBR field. However, on platforms
like the SAM9X7 SoC, where the peripheral clock can reach up to 266 MHz,
this may exceed the SCBR limit, causing SPI transfers to fail.
This patch adds support for using the SPI Generic Clock (GCLK) as an
alternative and more flexible clock source for SPCK generation.
The FLEX_SPI_MR.BRSRCCLK bit is updated accordingly to select between the
peripheral clock and GCLK.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Link: https://patch.msgid.link/20250730101015.323964-3-manikandan.m@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:42 +01:00
Manikandan Muralidharan
a673ebd0a2
spi: dt-bindings: atmel,at91rm9200-spi: Add support for optional 'spi_gclk' clock
Update the Atmel SPI DT binding to support an optional programmable
SPI generic clock 'spi_gclk', in addition to the required 'spi_clk'.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Link: https://patch.msgid.link/20250730101015.323964-2-manikandan.m@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:41 +01:00
Manikandan Muralidharan
379f819733
spi: atmel: simplify MR register update in cs_activate()
simplified the MR register configuration by updating only the PCS field
using SPI_BFINS() instead of rewriting the entire register.
Avoids code duplication.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Link: https://patch.msgid.link/20250730101015.323964-1-manikandan.m@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:40 +01:00
Darshan R
f1ac30a862
spi: sunplus: sp7021: Clean up coding style
This patch tidies up minor coding style deviations within the Sunplus SP7021 SPI driver, ensuring closer adherence to established kernel coding guidelines.

Specifically, it addresses:
- Correction of a whitespace inconsistency before a comma in `writel()` calls.
- Alignment of function parameter indentation for `struct spi_transfer *xfer` in `sp7021_spi_host_transfer_one()` and `sp7021_spi_target_transfer_one()`.

While purely cosmetic, these adjustments contribute to improved code readability and maintainability, making future development and review easier.

Signed-off-by: Darshan R. <rathod.darshan.0896@gmail.com>
Link: https://patch.msgid.link/20250728124104.6370-1-rathod.darshan.0896@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:39 +01:00
Waqar Hameed
692abf80ce
spi: nxp-fspi: Remove error print for devm_add_action_or_reset()
When `devm_add_action_or_reset()` fails, it is due to a failed memory
allocation and will thus return `-ENOMEM`. `dev_err_probe()` doesn't do
anything when error is `-ENOMEM`. Therefore, remove the useless call to
`dev_err_probe()` when `devm_add_action_or_reset()` fails, and just
return the value instead.

Signed-off-by: Waqar Hameed <waqar.hameed@axis.com>
Link: https://patch.msgid.link/pndqzxqkt8u.a.out@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:11:38 +01:00
Joy Zou
162e23657e regulator: pf0900: Add PMIC PF0900 support
The PF0900 is a power management integrated circuit (PMIC) optimized
for high performance i.MX9x based applications. It features five high
efficiency buck converters, three linear and one vaon regulators. It
provides low quiescent current in Standby and low power off Modes.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202507221720.jxsGRfcE-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202506181134.0Hkvy7CK-lkp@intel.com/
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Link: https://patch.msgid.link/20250731-b4-pf09-v2-v3-2-4c2659516582@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:09:45 +01:00
Joy Zou
82f0907931 dt-bindings: regulator: add PF0900 regulator yaml
Add device binding doc for PF0900 PMIC driver.

Can not get the I2C_CRC_EN config by reading register. If the PMIC
OTP_I2C_CRC_EN is enable, need to add the nxp,i2c-crc-enable property.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Link: https://patch.msgid.link/20250731-b4-pf09-v2-v3-1-4c2659516582@nxp.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:09:45 +01:00
Daniel Almeida
9a200cbdb5 rust: regulator: implement Send and Sync for Regulator<T>
Sending a &Regulator<T> to another thread is safe, as the regulator core
will properly handle the locking for us. Additionally, there are no
restrictions that prevents sending a Regulator<T> to another thread.

Given these two facts, implement Send and Sync.

Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com>
Link: https://patch.msgid.link/20250729-regulator-send-sync-v1-2-8bcbd546b940@collabora.com
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Alice Ryhl <aliceryhl@google.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:09:34 +01:00
Daniel Almeida
f7fbf3091f rust: regulator: remove needless &mut from member functions
Regulator functions like "regulator_enable()" and "regulator_disable()"
already provide their own locking through "regulator_lock_dependent()", so
we can safely call the Rust API with a shared reference.

This was already the case with Regulator::set_voltage() on the Rust side,
but it was forgotten for Regulator::enable() and Regulator::disable().

Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com>
Link: https://patch.msgid.link/20250729-regulator-send-sync-v1-1-8bcbd546b940@collabora.com
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Alice Ryhl <aliceryhl@google.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-10 21:09:33 +01:00