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1,403,262 commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Guomin Chen
|
621d7d081d |
dt-bindings: mailbox: add cix,sky1-mbox
Add a dt-binding for the Cixtech Mailbox Controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com> Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com> Signed-off-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Fugang Duan
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aa4bc2850e |
arm64: Kconfig: add ARCH_CIX for cix silicons
Add ARCH_CIX for CIX SoC series support. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Fugang Duan <fugang.duan@cixtech.com> Signed-off-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Peter Chen
|
69563d502c |
dt-bindings: arm: add CIX P1 (SKY1) SoC
Add device tree bindings for CIX P1 (Internal name sky1) Arm SoC, it consists several SoC models like CP8180, CD8180, etc. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Fugang Duan <fugang.duan@cixtech.com> Signed-off-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Peter Chen
|
960dda6eca |
dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd.
CIX Technology Group Co., Ltd. is a high performance Arm SoC design company. Link: https://www.cixtech.com/. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Fugang Duan <fugang.duan@cixtech.com> Signed-off-by: Peter Chen <peter.chen@cixtech.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Shankari Anand
|
313bf5b79e |
fs: orangefs: replace scnprintf() with sysfs_emit()
Documentation/filesystems/sysfs.rst mentions that show() should only use sysfs_emit() or sysfs_emit_at() when formating the value to be returned to user space. So replace scnprintf() with sysfs_emit(). Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com> Signed-off-by: Mike Marshall <hubcap@omnibond.com> |
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Arnd Bergmann
|
63e9bb0d6e |
Merge branch 'newsoc/andes' into soc/newsoc
Patches from Ben Zong-You Xie <ben717@andestech.com>: The Voyager is a 9.6” x 9.6” Micro ATX form factor development board including Andes QiLai SoC. This patch series adds minimal device tree files for the QiLai SoC and the Voyager board [1]. Now only support basic uart drivers to boot up into a basic console. Other features will be added later. [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/ [2] https://lore.kernel.org/all/20250602060747.689824-1-ben717@andestech.com/ * newsoc/andes: MAINTAINERS: Add entry for Andes SoC riscv: defconfig: enable Andes SoC riscv: dts: andes: add Voyager board device tree riscv: dts: andes: add QiLai SoC device tree dt-bindings: timer: add Andes machine timer dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller dt-bindings: interrupt-controller: add Andes QiLai PLIC dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings riscv: add Andes SoC family Kconfig support |
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Amir Mohammad Jahangirzad
|
cdfa130465 |
fs/orangefs: use snprintf() instead of sprintf()
sprintf() is discouraged for use with bounded destination buffers as it does not prevent buffer overflows when the formatted output exceeds the destination buffer size. snprintf() is a safer alternative as it limits the number of bytes written and ensures NUL-termination. Replace sprintf() with snprintf() for copying the debug string into a temporary buffer, using ORANGEFS_MAX_DEBUG_STRING_LEN as the maximum size to ensure safe formatting and prevent memory corruption in edge cases. EDIT: After this patch sat on linux-next for a few days, Dan Carpenter saw it and suggested that I use scnprintf instead of snprintf. I made the change and retested. Signed-off-by: Amir Mohammad Jahangirzad <a.jahangirzad@gmail.com> Signed-off-by: Mike Marshall <hubcap@omnibond.com> |
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Arnd Bergmann
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d436d1d5ed |
MediaTek ARM64 DeviceTree updates for v6.17
This adds new machines and improves support for already supported
MediaTek SoCs.
In particular:
- New machine: MT8186 Steelix Squirtle Chromebook
- Steelix-Voltorb's two dts are merged in one
...and improvements for already supported SoCs and machines:
- Added reserved memory for AFE DMA for MT8173/83/86/92,
aligning audio related memory allocation between all of
the Chromebook SoCs
- Added second source components for Steelix, and marked the
multiple trackpads for Asurada as such
- MediaTek Genio 1200: Enabled support for the Audio DSP and sound
- MediaTek Genio 510/700/1200: Added support for the PMIC Keys
- MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
- MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
- Airoha EN7581: Added ethernet nodes to Evaluation Board
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Merge tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DeviceTree updates for v6.17
This adds new machines and improves support for already supported
MediaTek SoCs.
In particular:
- New machine: MT8186 Steelix Squirtle Chromebook
- Steelix-Voltorb's two dts are merged in one
...and improvements for already supported SoCs and machines:
- Added reserved memory for AFE DMA for MT8173/83/86/92,
aligning audio related memory allocation between all of
the Chromebook SoCs
- Added second source components for Steelix, and marked the
multiple trackpads for Asurada as such
- MediaTek Genio 1200: Enabled support for the Audio DSP and sound
- MediaTek Genio 510/700/1200: Added support for the PMIC Keys
- MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
- MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
- Airoha EN7581: Added ethernet nodes to Evaluation Board
* tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support
arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support
arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
arm64: dts: mediatek: mt7988: add cci node
dt-bindings: interconnect: add mt7988-cci compatible
arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board
arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe
arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks
arm64: dts: mediatek: mt8186: Merge Voltorb device trees
arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing
dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks
dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries
arm64: dts: mediatek: mt8395-genio-1200-evk: Enable Audio DSP and sound card
arm64: dts: mediatek: mt8192-asurada: Reserve memory for audio frontend
arm64: dts: mediatek: mt8186-corsola: Reserve memory for audio frontend
arm64: dts: mediatek: mt8183-kukui: Reserve memory for audio frontend
arm64: dts: mediatek: mt8173: Reserve memory for audio frontend
Link: https://lore.kernel.org/r/20250711083656.33538-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
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Arnd Bergmann
|
a6942926a3 |
MediaTek mach ARM32 updates
This adds support for the MediaTek MT6572 SoC, found in various old smartphones and tablets from various manufacturers. In particular, this adds a board_dt_compat entry for this SoC and its SMP bring up sequence to enable secondary cores. -----BEGIN PGP SIGNATURE----- iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaHDMLCgcYW5nZWxvZ2lv YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4Tx0A/0ul iMSrLva3h+HjH0yN+O9CTPJHe01KFbdkG7zW174iAQDR0SdGpH352LcTM2Lmo17K 4XS5JLI+mkY2XrUS3c2XDA== =bxBl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V3EACgkQmmx57+YA GNlnSA//YWBeTPgdk9Y+yGn0LLtYz9ug8sOnCIwUt6hK8CJYAedlSeGqmpAvdUDU gMEXYiI/KKDKh11Mm+SO9p684Ykjh0PST18FUWxrpbvbB3rI0zWJnAKSq1amRgD7 lVwC6LO/M1XbPBQzwKhcBH2cvTbYAYfcGlLBESu5zFAXFslF0Pue9LMfL3UlgT3C wzX4Z4UeQO3Y77a8kYj/PKJawv78Z63TwTBX2W6fHyHAVCGSsMlJJUEGW4xSYLWM xxeZAdy3qoRCxS+iZZ6proaU0WJejrMABgvzQ3NECSFg8xZzdBmO40mF8K2ZA1PW NS+DLkAaBdS/3wnyogqQDIZXLweipdrz9eQWNmUKIOPBE9ga7YbefJr8i/rXOKzA pFxgfBceAgVO+JShFGOKM7uATd3O48mb/VIqsHkZNpGogh/V2TLEouJ6ts9QeEpf QXhIKJvaLo6ZDFz2Yl9R+RXAzyiUTIjqGHXqeYk8FI+jfioUCEVDV78Smqo/kQBW yaz+QrfARe3KOlgV4XqJOpZPKyxK8Iytf0FkJK0SGFsu7C1dQ8XbS4ajEdRHoyC4 1KnsL2vG3G0LcJbHL1m8VaxYxmep9mgKGygMwgeaJ+aA9yWIO2cmjkab4SrNpG3m KCL5eMectDjtwW2es5gMnqLBeOMk4HRTqybAQksLPcebVdzZFJc= =Dq3g -----END PGP SIGNATURE----- Merge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek mach ARM32 updates This adds support for the MediaTek MT6572 SoC, found in various old smartphones and tablets from various manufacturers. In particular, this adds a board_dt_compat entry for this SoC and its SMP bring up sequence to enable secondary cores. * tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: ARM: dts: mediatek: add basic support for Lenovo A369i board ARM: dts: mediatek: add basic support for JTY D101 board ARM: dts: mediatek: add basic support for MT6572 SoC dt-bindings: arm: mediatek: add boards based on the MT6572 SoC dt-bindings: vendor-prefixes: add JTY dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572 dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572 Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
5a793f891a |
arm: dts: OMAP updates for v6.17
- new board support: Seeed BeagleBone Green Eco - misc. fixups / cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAmhv4GEACgkQWTcYmtP7 xmXEFA//RflPc1mafc3vs0Guvuhk3/NuCVQoei71156oz2FbZRsXpR1ICMMil5+h pZrJbzjTLzVbBvPXhkMQ9e970Zgz0LBZFubgE+6LE8jZ97ob2WmrSQFqyPeO0zMX BBRVzKMNOsxtLgamHmnh4FANAwUGD4QRYnRFkutzTNC6ITBItxjeiFKbimFL2lFu HLxiDxVgFgce2meJnmMZZzgN+te5cIzzNmwg7QSL9VK85sZevMBfRYmc5L9kSMsR Z4FuFA7XFkrevWDMWpg8lkq6hHd9VI5C7K9XKV6Xux9lesRR8tHQ8X0FQ3Flb4zP f1jJTqUBDmRvwAqx4ZMhTnFqx3nBMUVOdQsqradv9UHiq9CpbyX7iKU9sSWdeJvN 7Ku8/fokJj8UNSPg9nUzjRzNIm4BMeBiDGyP/ykndF8/N5pTuEsS4t2oqWiErMgu Cl0AiOKi8bmGtxd6w0UCtcVr/za84sTMQ5FZsOK+xI5xwQZ0RZlPesgbuPYbmFoD Qm2hRCTEMI53gZyhOcfW5JAlUaNAgqNlDKVEPBKXAKNhF/Mb5MSfnag5cDMyofuV hHTo59/F0GfTL+Ru0xagpySztfZ+7iL2G5I0amTEWHE4F3/ObbmenlW/GuuQv2Vw yFqiMSWe17VaN6Qkq6k58/SxSggGKfeII3fpbYPwT4GE3LusKbs= =zJ+Z -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V0oACgkQmmx57+YA GNmgXw//VcFix8qXFC1wZ+SbKHXeUU8rHDWTQl6SXH57/ob4kDFzxUzpxENqHK4r 0zy5uNLWRU4s9SCYq2Jm9fWhhD+qSBgQxUY8glBSttW0lmTizhz4dhTBAGJqWDVl 4zWvV9/sosxo0Ecz//eFCLxbWifjVJa+voeOa6JfD3KNc1EVnLLokehtupFxKYZk xgcD7yOanJQFCJiN+mJ+fJd/D0Qn0ffl2F4/cEVJg8m7lyn09/Fjq8VoKjKgcmim WE/fZ8ZDJf6qeaBi8miAFSOsX3cWDDGE9UcTibHsV+ex3GAyeFB0/KfXxME813CG 2Kxqa1CxANpip4zO1FkofxJX6aRmvyhf7biyl1kKsdGqRbOH9PA1c7ALlsJIrB/l B8PwS2MJBv91DR5yFBQPAcZqPHc07jc1tFCrmhKxlI2H1Yd+uZKuAIaJYM9faQqa K7B87NTj3TfWP95T/PhhInBxU7arGRMY74dTeRjKjibcjegYD83U8LTD2pebgO7A 7DxTwjbQNiOJEX4VIbk3RT4+0Ymc3S404qLiWLK91SJY75UJWRssU5RU10oVpWDm SLskvH8hUvFJ0Iu6JCff4Q8gju2tG86ejVz29fnW3ziksO4OJANBWW75vSTR2BOA ujuGYoF/eJD3DwYWvBC8Vk7YDyX2ov3qD5l16ZXNl2dVy6bpqCY= =Qgls -----END PGP SIGNATURE----- Merge tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt arm: dts: OMAP updates for v6.17 - new board support: Seeed BeagleBone Green Eco - misc. fixups / cleanups * tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap: arm: dts: ti: omap: Fixup pinheader typo ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching arm: dts: omap: Add support for BeagleBone Green Eco board dt-bindings: omap: Add Seeed BeagleBone Green Eco arm: dts: omap: am335x-bone-common: Rename tps to generic pmic node Revert "ARM: dts: Update pcie ranges for dra7" ARM: dts: omap: am335x: Use non-deprecated rts-gpios Link: https://lore.kernel.org/r/7h7c0gxczy.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Shuming Fan
|
17882721dc |
ASoC: SDCA: add route by the number of input pins in MU entity
This patch removed the code where num_sources should be the same as cn_list. For better resilience, it would be preferable to explicitly add the route mapping the input pins to this MU entity. Signed-off-by: Shuming Fan <shumingf@realtek.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20250721112346.388542-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Shuming Fan
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9e55f11926 |
ASoC: SDCA: correct the calculation of the maximum init table size
One initial setting is 5 bytes, so num_init_writes should divide by 5. Signed-off-by: Shuming Fan <shumingf@realtek.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20250721112334.388506-1-shumingf@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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Arnd Bergmann
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96a96de2cc |
STM32 DT for v6.17, round 1
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
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Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: remove empty line in stm32mp251.dtsi
arm64: dts: st: fix timer used for ticks
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
ARM: dts: stm32: add stm32mp157f-dk2 board support
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
arm64: defconfig: enable STM32 timers drivers
arm64: dts: st: add timer nodes on stm32mp257f-ev1
arm64: dts: st: add timer pins for stm32mp257f-ev1
arm64: dts: st: add timer nodes on stm32mp251
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
4340c8d32a |
New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T,
Sakura Pi RK3308B - all of them have the used soc in their name. New overlays: RockPro64 screen, optional Sige5 Wifi/BT module, ethernet-switch addon for Jaguar. Added peripherals on rk3528 (spi, power-domain controller, gpu) and sdio controller on rk3576. DSI display support for the Gameforce-ACE handheld, a fix for the cover-detection (closed/open) on the PineNote, camera support for the Haikou Video Demo overlay on PX30 Ringneck as well as a number of other newly enabled peripherals on a number of boards. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmhvlYoQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgYQVCACJ/OziWNpSWMLP5L7mBqyiN16oiLUqhyde /wYlS2e9u4jHs6KtRMNMvzBpGNXaQY5ybSo9LCBzn5YHD6dmatpBB4yx0C29Knwm o1QS0E4A5iWYH2uxAEwVGjhZkAnLIDkSR9yCDNNgUVnyLKbsyDVemIfj1QDwAQHk WaPXkoaThsyVldU0404TA6JOLhOjVU8ON0BaYcKH9vYv/UNrFN4DxkXh+1jsFhdw 1ry27DC0vi+cJPNYoRqFTXKeN6tWhvrjnrX1Gi6Jk8sKEwDcpsBjKREXr9e6A1WN 2fuef1zpa3rdOW8uH6/dltjWh7BbnnJ7JNQo1g/Db5M7GqKuS9wq =JiLV -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VrMACgkQmmx57+YA GNkMHg//T758/giBtfTytRD5wdieMUAoDPPMvfaSV1VoUtbAaf7p0kG585UCK84m 3FWoCHzLXAHIYY7IBkBo0cEWY4L+65xCU047K6B1f/CC5/izjixNRsnsN58TqUxS GLWKvUrlNG4OzsvWU5EhrKeJxyhoSj8zu1K/JLLDMnKgbKuDXLoJuFjwcWthjZOz c4et0S2e7HCZitTgNjClkqLyA5mdk8NjgXy70weXrJCb1wmru9WFdOQK4FxP5ycg pTBe98RFStKgc6K3BY+Se5haFnonbdUPMcRK4mFuyR3eX67xwT6OvXkffJSiljbU YpiyOo4UPcMOAh8VngE6gARCH+rLts0RhCTXOVnSm0GPLOJFnKfGW7lOesvzWSLB U8GYeEnD8Q9kOQ8CCZO5r0Z5yefNuXBzsvpUtwk4gh3n07r0I83UsSIQrZRVZZdf YV/Vs4cWGEt8JLXiOOYYoxXY+Z4OCjv700gIE7NChKK7MfukYpedxDxU6ItRmQ4K hWxX+oKUiCryepAXEEYo0tx4kfH6Vt7b64iArSrXlRPYFp7i2xDkRRvtUl5rNFs+ q4DRdcHYdPs0WMGcMkT46MSrwrECv4osPDawHvHcZnrym90w1KnuQyyvNSk7M9Ww r0R3CohU693ALWDLT2vyYZNOXdSdOjma6hLAcUTso95lZA6RFRk= =93Fr -----END PGP SIGNATURE----- Merge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T, Sakura Pi RK3308B - all of them have the used soc in their name. New overlays: RockPro64 screen, optional Sige5 Wifi/BT module, ethernet-switch addon for Jaguar. Added peripherals on rk3528 (spi, power-domain controller, gpu) and sdio controller on rk3576. DSI display support for the Gameforce-ACE handheld, a fix for the cover-detection (closed/open) on the PineNote, camera support for the Haikou Video Demo overlay on PX30 Ringneck as well as a number of other newly enabled peripherals on a number of boards. * tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits) arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7 arm64: dts: rockchip: enable PCIe on ROCK 4D arm64: dts: rockchip: Enable HDMI receiver on CM3588 arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576 arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576 arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC arm64: dts: rockchip: Enable GPU on Radxa E20C arm64: dts: rockchip: Add GPU node for RK3528 arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck arm64: dts: rockchip: add label to first port of ISP on px30 arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP arm64: dts: rockchip: Add power controller for RK3528 arm64: dts: rockchip: enable USB on Sige5 arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2 arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5 arm64: dts: rockchip: add SDIO controller on RK3576 arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10 arm64: dts: rockchip: Update the PinePhone Pro panel description ... Link: https://lore.kernel.org/r/15465458.uLZWGnKmhe@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Rob Herring (Arm)
|
8e7e63fc47 |
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have no CPU affinity. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
9a5a531d1c |
ASPEED devicetree updates for 6.17
Removed platforms: - IBM's Swift BMC New platforms: - Meta's Santabarbara Santabarbara is a compute node with an accelerator module - NVIDIA's GB200NVL BMC NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA NVLink-connected, liquid-cooled, rack-scale design. Updated BMC platforms: - Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation - Catalina (Meta): Various sensors added, MCTP support for NIC management - Harma (Meta): Various sensors added - System1 (IBM): IPMB and various GPIO-related updates - Yosemite4 (Meta): GPIO names for UART mux select lines The System1 series includes a devicetree binding patch for IPMI IPMB devices. -----BEGIN PGP SIGNATURE----- iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaGdkFhwcYW5kcmV3QGNv ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmvsYA/igiCEelkgM1XwRceb9n 8r06Zwd+/B4nH2Qtwk9wwM1PAQD5eYs0ukpyEZNxMphA5VCLvYjLZhs3Kprs5Ibr 9Ry7Cg== =6CH9 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VlcACgkQmmx57+YA GNljJA//a6csTtM+gQ2pDFIjyUYs1781pEe2unwVgWPEIzTt++0Zc/I9Y6BIRJ7U Fbdak2f8+4KwDr0ytguu3NOlauy1tleCAxoSQvm0bWSdTrEu8zgHnzpMKVNOZrtk 6x8pDOKyoAjSVhaog7k142dl1SdVSUNvh5tKbVXa5Ec++bX8CLyh+a+xp9p9/pKo nHOraY/Q6E3PdhAJ80MFFP/mxsQz1vtp0+45HWeyi+kpDCgXKvLEmJ7RUEZ0XaCG YX8nuSb6uIt+VyRV3Lt6KXB8LKfymPzD6SeIum8G6Nl1voxZaSadqn69/DJ4O3lq HS//sMXonX3wHNaHR+5I0xsflcgy+qYszp5+rcRk4XZ9u0qwWkDZj2Bfwpu/xn2S hWDbUbw40tB0UpUM0uKtgcngTakyqStmH6ecJqRMTkXH0Xk88mWm6C5TpVhZMkJ3 IorSJr9OhjWej8Ie47qfKEdnR6q6PVLMevEm0l2Y7jVbscNcymP/SIOYbqyaC7Vz UZhggptowpPYqGhVbbRUtv5cotnnhrezplfUcPLjhaAgFqlRZLF+QyT07QWeW/HN Roo7WBjIdWvAiBbPM3TVJqehbDDTcayxEk8L7pWk47iBIqQMyZ9t6+Nn9UzPa+BE EaF8jA+bRQcUKqOOhu1cnfP0d46o/5mnL/TZANaM135g4yPZ13k= =Snu6 -----END PGP SIGNATURE----- Merge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt ASPEED devicetree updates for 6.17 Removed platforms: - IBM's Swift BMC New platforms: - Meta's Santabarbara Santabarbara is a compute node with an accelerator module - NVIDIA's GB200NVL BMC NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA NVLink-connected, liquid-cooled, rack-scale design. Updated BMC platforms: - Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation - Catalina (Meta): Various sensors added, MCTP support for NIC management - Harma (Meta): Various sensors added - System1 (IBM): IPMB and various GPIO-related updates - Yosemite4 (Meta): GPIO names for UART mux select lines The System1 series includes a devicetree binding patch for IPMI IPMB devices. * tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits) ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC dt-bindings: arm: aspeed: add Meta Santabarbara board ARM: dts: aspeed: bletchley: enable USB PD negotiation ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes ARM: dts: aspeed: harma: add mmc health ARM: dts: aspeed: Harma: revise gpio bride pin for battery ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring ARM: dts: aspeed: harma: add fan board I/O expander ARM: dts: aspeed: harma: add E1.S power monitor ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC ARM: dts: aspeed: catalina: Enable MCTP support for NIC management ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes ARM: dts: aspeed: catalina: Add second source HSC node support ARM: dts: aspeed: catalina: Add second source fan controller support ARM: dts: aspeed: catalina: Add fan controller support ... Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
31e91dfc7f |
Renesas DTS updates for v6.17 (take two)
- Add support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2),
- Add eMMC and microSD expansion board support for the RZ/V2H and
RZ/V2N EVK development boards,
- Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
Carrier-II EVK development board,
- Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
development boards,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.17 (take two)
- Add support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2),
- Add eMMC and microSD expansion board support for the RZ/V2H and
RZ/V2N EVK development boards,
- Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
Carrier-II EVK development board,
- Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g057: Add XSPI node
arm64: dts: renesas: r9a09g056: Add XSPI node
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
arm64: dts: renesas: Add Renesas R8A779H2 SoC support
arm64: dts: renesas: Factor out Gray Hawk Single board support
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
Link: https://lore.kernel.org/r/cover.1752090401.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
c9d40ba737 |
Renesas DT binding updates for v6.17 (take two)
- Document support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2).
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Merge tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.17 (take two)
- Document support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2).
* tag 'renesas-dt-bindings-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Document R-Car V4M-7 Gray Hawk Single
Link: https://lore.kernel.org/r/cover.1752090400.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
e65761ff6b |
Samsung DTS ARM64 changes for v6.17
1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
clock controllers and initial USB support. Add board using it:
Samsung Galaxy S22+ (SM-S906B), called G0S.
2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes
3. Google GS101:
- Prepare to switching to architected timer, instead of Exynos MCT as
the primary one.
- Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
charger.
- Add incomplete description of the primary Samsung S2MPG10 PMIC.
Several bits, like regulators, are still missing, though.
- Add also secondary reboot-mode, via MAX77759 NVMEM.
- Switch the primary (SoC) reboot handler to Google specific
google,gs101-reboot which gives additional GS101 features (cold and
warm reboots).
This change will affect other users of this DTS, but to our
knowledge there is only Android, from which this change originates.
4. Exynos7870:
- Fix speed problems in USB gadget mode.
- Correct memory map to avoid crashes due to secure world.
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Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.17
1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
clock controllers and initial USB support. Add board using it:
Samsung Galaxy S22+ (SM-S906B), called G0S.
2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes
3. Google GS101:
- Prepare to switching to architected timer, instead of Exynos MCT as
the primary one.
- Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
charger.
- Add incomplete description of the primary Samsung S2MPG10 PMIC.
Several bits, like regulators, are still missing, though.
- Add also secondary reboot-mode, via MAX77759 NVMEM.
- Switch the primary (SoC) reboot handler to Google specific
google,gs101-reboot which gives additional GS101 features (cold and
warm reboots).
This change will affect other users of this DTS, but to our
knowledge there is only Android, from which this change originates.
4. Exynos7870:
- Fix speed problems in USB gadget mode.
- Correct memory map to avoid crashes due to secure world.
* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
arm64: dts: exynos: gs101: switch to gs101 specific reboot
arm64: dts: exynos: gs101-pixel-common: add main PMIC node
arm64: dts: exynos: gs101: ufs: add dma-coherent property
arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
arm64: dts: exynosautov920: Add DT node for all SPI ports
arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
MAINTAINERS: add entry for Samsung Exynos2200 SoC
arm64: dts: exynos: add initial support for Samsung Galaxy S22+
arm64: dts: exynos: add initial support for exynos2200 SoC
dt-bindings: arm: samsung: document g0s board binding
Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann
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ad6d5af8bb |
Samsung DTS ARM changes for v6.17
Just few cleanups based on dtbs_check. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuvgsQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1xqcD/9fJhockP5kA33vOeSXy+t6I1zijhA1hnj2 xJjjXIpxTKEjxbAazFdrD6JEArep5TwkNoVBFNpxGODKWsR5qbX1i0/phbdfdFcR w84y4EnPxOKTmaOaXt8hCSFOi97N46T36d7P/62yBlDvUor+NuoYkV/XgObfJ+Mz voE+km28HGztMgYo7aVz1/+vpMv9zkPwY1RqsePDVir+H8xpbtYhhiehMWIOSGg7 XF1comxWnX9MMihtk0SVFAzOKSV62V8e8bkfPH3PqLoI3xUbYW6wgyWkA9qHw1WQ xWPwbvAod2gfgW9ngTIp3dBQXsjnpYMggRxX6uXWxZ2qZaTBYMsqFCQ8zLfCvu2A FFGguX4JwuhkBEtBu/odnomIhzgTQbVQd0Y2liYvG+20t8FliRjzNbee9w3b1EMN 9LA22LtxKWMyPYHzHvape1K4a6cDTGHai8zL1LIltFnr+LglGM+n2c0UdvnEQTy4 S2iUHkKMzpO2oCMTVocX2elNgChuj8Ov47uK34dn5frI/uuPIkLoJ/UzIQVd6Yf6 LI6x5rs+tdyUXefPVBfBwK19IsVRQ40KJDAbPsXQ0tWQ0LJnkwm5VjXVmL5MuAx7 Erzv4/qOG/tGbXCqc9xyxLmyOOkBMhHnj0Ho/SrxiGqJD5Ovv5fBzppzfPNuC2cS 4yRNQBcT7A== =VAMy -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VbcACgkQmmx57+YA GNnmBQ//Y2z7sn082/oziLdc5eaK4a26O9J42eiy5lOPHUhm/NaHx4/MT91PPSbZ 7MI+TGgqBOTD/2CQSEtnX4Y7em4AF+4sysc3qjUMDVG7OAfe3tcAsrRQDWYLrStR OY83o7U6Fx7hHoBsEXmPnralfA2gjIwBUlJ78KLcf8zr+BxIvivAV5GnpOSQr4Ux 9j2cWycXXqeTFgoIenrM1TpY2/odPp5RG6YgRHsmudeKcj3OojH5DtVhnnzgf/SO EEudbKPLivdaCJCYyS5yR3t0RHSX+k4eWHQmwqbrwzQR7tnTQltpnSk+DC1Bx47r 4CaF97MeohPvwlrWPAnMkFCNfNMSD6s79yb2G8OJH4RLv0H+urb45wR1tVVkMco/ t7uHmmwBSeHTWr3yZo0IPntXn5XyyIKBN+jqWUA8sxhbAAUTlShzbXr2csKaPEY2 738xu9SEYLr8aOWpNl9iuQBJCPB2J9lMMKXD3ANSxNeCsf5yK4kUw+oD96cJ5tXK q5n3DUcl41VYOeEToJTezd51nEWj/RS3tECGBrhR+cwicQnYhq0sxYaaKloj2eXs cegzgYTvj18pdWUJcCCNJkijuFPkpCSR2shpABUkWIjRv0mVDxTOBkDT6TuZBoBJ IT1bFgqfQSGSjq+/z0Ay6hIp35e6h+yn9AgM/slbMogp7as6DXI= =ASrH -----END PGP SIGNATURE----- Merge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM changes for v6.17 Just few cleanups based on dtbs_check. * tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: Align i2c-gpio node names with dtschema ARM: dts: exynos: Align i2c-gpio node names with dtschema Link: https://lore.kernel.org/r/20250709191523.171359-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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43af11e192 |
VT8500 DTS ARM changes for v6.17
1. Several dtbs_check cleanups. 2. Add missing cache topology - L2 cache controller on WM8850/WM895. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuuSEQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD18ydD/wIP2a7A7cE0o08fPl9Lo4pp2TxRY1JJdSf wiKSce+ptQXVJHJ5ZB9RWP0yV+BxjLHpicW7k6ghdEC/9kbdDot25Wzwg5TH+DfO vsJbMtR8A2dRvE7gTM5H+bcfC3HiclbMKXDWcskaedtxn1a64caU0XlbR8bXhkOt a9HxwdRMTTXDamCor/dY5rASvhBO+r/NHiiMGZBfKqmcsE9GJy0XiIE6eVnGLCUk Tk6Edosoz/2M5/Kx/i/ytsp5342awbOxHoAkHMx3Ot+CrHenOq0PqkyWFrOcwyry AUCeD9/1cO6/7HXc05Ir9fkCg6kpVtL/pOzBWse7UBF1ngryMhGevfAyFpwe7Pxd 67WE3uB3s//iU+dXUzrDN2JEYv1BKySoYQ+FeX7xayfeo7uEsylAYW++kKrDdFt5 NuoxnSz1kihij9aXu94sHS2Haz9QJcvCHPV+MuFSGyAvdawhxWkVbvljFtO9FT// e+Pxpz/ygpBTxkgBtoQNXaKZXG6S1rPYW97sftSk7qUIIMGvhp5fBLzj5FDojJIn MU3S5vS84ePHAsFYpFDHRr5Z0/uP+rtV2WOn8lVmPsKZauve5RLK1yfUs7xssMWQ hJwstbPUZvd7sE6cmRrT+qzUrWtATi+AHh+YdM3UZOzGd9pzCLVRelkULsdsKz52 S4OnPGHCAg== =A6jK -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VZYACgkQmmx57+YA GNlZMA/7BBNs+cS05gTKh1PBvvrtrnnnnG4dBActYdd1iJe+/7QDrN3uGl7zXtMn 5L69a71YdhR/mhLziEPYhlr78NoNmJMHbtG90LOtDwtz8yRmhadhO/3FHRDGWOyU vZb97cFikw6zoHmU+ISwvVM8SCyLqW+gOB0w4fFjdKa7ibBicBAghmJEBdqs1IGL 2PIT4nEbqWbtIaRjkWXSvWkrgHlsWpDodNjpwJbQcnAx2QhgKRhqlV8s+ZHe28EQ CgznfJ2S6bjSby3gvTAG7N6fxbc1oQuHZqaTSorHfSsPyRAYHh2X7FOIiRkKhH4D xm/ubYF+2frT2Hd9cNDo4ETgvuPLLjWHFTW38rmw477gAVW2dzyLNiSOVcVnBg5b cha2gWtJL13BLk1ipkH5g6LNwk8/TvR65JdG609b+CkmitaStUDlVEOAeP1ayPA/ qUFUtGu6kJZvQF/VNoG278vqtwb0jxR79UoYn9xJku0vvf/GIDimJLzrpyIfJQWw o0FOpiweSZdM0D8aOSipOy5BI3M5HHYobImDs1XaZ3Q+sPoauD12eGrEuEmW8nCV T/u5P3xcO0+Jf7UqPAPwjBPwMzhC/GMK/Ni+tySOS5ZajNuio9aZ7C2Bde0yNJFd o5GZaZosmew7NtOpLaCI9mUN5AknqLxPAIVtB+cx65cqDXSA9Pk= =m5Ie -----END PGP SIGNATURE----- Merge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt VT8500 DTS ARM changes for v6.17 1. Several dtbs_check cleanups. 2. Add missing cache topology - L2 cache controller on WM8850/WM895. * tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950 ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller ARM: dts: vt8500: Use generic node name for the SD/MMC controller ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size ARM: dts: vt8500: Add node address and reg in CPU nodes Link: https://lore.kernel.org/r/20250709184800.168462-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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aee4eeec7e |
This pull request contains Broadcom SoCs drivers updates for 6.17,
please pull the following: - Andrea adds the RP1 clock, pinctrl/pinconf/gpio and misc driver to bind them all -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmhi3rwACgkQh9CWnEQH BwSCmxAAwEDCorz31+5yt1NjJfS6DVbbXlN6EcZfa4Ysri3uGVQnUC/IdBou7UOO t03wnrQmrl2GXKSJBp5jvA6JbuTwBMeMtPy0e3Ayg+k5iJf0s+DgVO7NJeMhEHPP Y/TfcHvsVQkRJ2jaXl9zLA2PRQhKxVhvj0lTmm0AtHm0ctdxfqgJct1k65fj9/Qk sYbSQ+ZXT+1nLnoL1WoEl0QStIJGDNp4Jns0ZfHaYxFcc1AGZRLckYHyjxLjG1i3 b+t5uIpppbUIRLQTJpX7YlD8dk9laCACoD5P5aULPPBe2uykOeYViux/FTFgWrLY a8RYBZfAzw6HWYuUivWoMmnGzXPea+wKuT8IS776E/0wk/gAmuuu1eA2ioJ+pyj6 bAfAcgTL/gkaHKL1pH4OCu3SmMnhtYQQaERzHFf49Xucjaou3XM37YOhNo2hraNp jeS9f1HQUuBYr31FWjw6h19dbAWkJJ4Kzux9K9g1x3XSYVZeOv4POfrCztpYtA53 uDCdql21MNrjvRfE4xBcRGJ+j4PVOdB8UKJ77vo0+c+sKbVLLDGOSrqTbpagNSaR R7WBOgygPU8TSxqe7xzqds5ZGevMhQ0j8yJupxlYJoias4ak8q7hEL6WtJKDm+dQ pegyUzB/cYC5y+sKN3RFfQQ3s05Ee6UUXXEOntFAj8S/Ns3fOpU= =V+Co -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VTAACgkQmmx57+YA GNkZWg/+OiQoQBMfhPuALhK3y/C3xE6m59Qio2EkyAVqJiDzsXEXs2AZrlqNCJ+G WVeJuEWHRYfeMf+XWpUZi/UL2agPNjFUOiV4m8ShikZ6mMiIhrzzpRquYcgAi1Ey GorgadJAOuWlDRQnVmJZ83+asRAlKnnKiwbJYmfgQTURyGd78LfUiMN2AucWH1+o MPZw8+uxrL56AOgHBrLAmaq5U0pLvUlp8wHByFhiIZ9jPQGTHlmoloVngHenaVfs hlMVghyh55G8VWrhnmls0cdz8CBvvXG3ZukcSXw7uFS7B+oJLbPyk1OSvst6dzh+ S43cX1X5hzAyVTlpIUMR4/Lyzd+x2DZalX2VwdT3x/FG4xAwG8nH/ZG2j5oXyES7 AMICQ2O/+heljpYYvqK4ZDR1ju+KEvOpmaO7aRWHlPIIMJnN6Z1dajdWoIpMlnv/ dHsNFzBE00dYZ+iqLbDw/L0HTN9v2diHrStrrHvhylq0Q2og/JtAlDWUis/s9doS 83DfSY7+BePVrwxVXb3Jf6WO0ADCQZ7xc3XuM0C9ptvQaHoyshXAHb9P6X/DTULd ErRYjS/5WZ9Bc0B15gY9Vwxe4UZTfryXcIdCLzVJ/4bHC1rf95b+GNILgtLNT58/ 8uDgd41fpVE2OnGIebeDOb1VBxRTMtSBg9iNWhnmfmzBNgVXHsI= =pldc -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.17/drivers' of https://github.com/Broadcom/stblinux into soc/drivers This pull request contains Broadcom SoCs drivers updates for 6.17, please pull the following: - Andrea adds the RP1 clock, pinctrl/pinconf/gpio and misc driver to bind them all * tag 'arm-soc/for-6.17/drivers' of https://github.com/Broadcom/stblinux: pinctrl: rp1: Implement RaspberryPi RP1 pinmux/pinconf support misc: rp1: RaspberryPi RP1 misc driver pinctrl: rp1: Implement RaspberryPi RP1 gpio support clk: rp1: Add support for clocks provided by RP1 dt-bindings: clock: Add RaspberryPi RP1 clock bindings Link: https://lore.kernel.org/r/20250630190216.1518354-4-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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2b12a400dd |
This pull request contains MAINTAINERS file updates for 6.17, please
pull the following: - Andrea adds the RP1 entry for all of the drivers pertaining to that chip -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmhi3v0ACgkQh9CWnEQH BwT2ng//UIA/GNT+ounrsubIjZf0CuNQfY2HlOlZ5n7ZsZT+umHf5Np8QVE1YVqT aNz3VGESkRddFOVGBv3jDvZAETsAIC/0w3SO0k/pifh584+TAmKlO44Ft15LCDH9 59DfWQjcPufxN3aOQ7nUeS3Ad5L2cz1cp7Bc04y1ioq211lYmV5mt+WXsmS6J876 QpLcBw9AunQPmggnCV9Kp9je07x16Ql4wIC/pW4BEJittKEnPh6PY0wEuVwQn6+W LYcP9F18SC+JhjnvZpaGYB8bI9x9ZpXdxAGusnJeIQrsWQ0l2el8KYShUBh9kIcw xMA91RwbRrEXC6esIBq5JxyI9nHNrzC1xg9ifHbgYP/9DXZJvGTP1bHj9haMosNh EF9/T4EXJaHnat0evz/PwE1609vDQ/GFf1cZRCD+yySX57ktsPs4dAFyBKPuBglm QMWrWotZKPbWZwUR1RGu0iLtRQzif06jjrkgcxY/dG9gLLiaUSDpBMpfPa3A9fNk 2l9dLim7ObY0GymzitYgwdwOy4IxDpdHa6oDZPRd8Sh9K9HdPk0d6ZecOQXIr0Wo xavnmRi5qAFE1zEFVMRPlMJU1r63QIgfFPzS8Q9a4xEizeCet4mRlnvFkT9Jqqk/ 5FpDWMFz5PhHL/bDV5WaC8iBQagRQ+44DKcrhY/JAM4wcmh/inI= =EoAs -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VQwACgkQmmx57+YA GNmB3RAAudz9gJiaZ+4NXhcComj/N4NiGbE0azDPApCD3W4D4vnDPGbl7CNq07Tg wtUMseP/sMxIUILzCoCwwCZf1Kq+OeauYEfKkgiekJ4nj6Phz7BSUUr+TjbQcHLD vz42gOyNpbjbD33gK98Xha1NnIHHOfvj7y4CnW++8TPA/BPVcGQTMFtefLo9eSL6 c4DxjtngqEc1+AUrLRyeLWBb0WSMRRjKzTLrBmYXTS5PLKeVirnyN7s4jsPkcMX7 cqOQPyHe6fgSWRFoIRzjWSB93NLtbEMTJ522DlEStBlyuRso6bRdPGC2wrzOZ1Cm rxr1xq9DBvhqmlZWXjuJVRF5GOgRhRVFys7IR+oikpRNJOhnHIXoq3iKJX/mFgkH awOCp1WRJY2gGDiz2tfugeKzE+MUTctA69rIjmIP7YBiT0mFeQxIjmmE/snpyGpy Z8wb4QYyyJmq9q+xqfgFvNITiJUjSSbcB421RNmkp6Wfr0Zb8o3qMYu6dPXKYu9K h72aBVQv1ecpeDxBSbOAyYPy1Hf9t6IVBLaPp7N9eFCS/N46TY6apeFthcL4QKxF KH10xAaP9HGI0AoIizu76QagjzWC5QwVpzeegGU/P1NbRFcD6ZXOfn0hu0l6iOL8 otV0wOFsd+Ez9HiAJ9rQ/2IS0WqZVIPc838txtXcvSrW12FEgp4= =wV2B -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.17/maintainers' of https://github.com/Broadcom/stblinux into soc/drivers This pull request contains MAINTAINERS file updates for 6.17, please pull the following: - Andrea adds the RP1 entry for all of the drivers pertaining to that chip * tag 'arm-soc/for-6.17/maintainers' of https://github.com/Broadcom/stblinux: MAINTAINERS: add Raspberry Pi RP1 section Link: https://lore.kernel.org/r/20250630190216.1518354-5-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Greg Kroah-Hartman
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bcbef1e4a6 |
Linux 6.16-rc7
-----BEGIN PGP SIGNATURE----- iQFSBAABCgA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmh9azkeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiG7GIH/0lpQtHRl6N+q2Qs v75iG2ZouWyw2JlhUOHAToKU58MZqqTXLZzc8ZdY6fAd7DpXWKRGSDsyWVyLbUkt UKGzXEIJsHXYvw2QIPbhkY9gQBWpdZTh4tHztFyKb0QLn81qkibVP6ChOwSzOGa/ xUyQ5v6yH+JvQlnQaCgy6hi7cMrLNSNZmuIjy0yc5Y153YPEtX5OUPO2PstpUx5r AuiOhU4ewW9QCe07X/Pk7tdn0T2Jg8Kwk1FViaM0RBUf/0GXGfsovIxpUP/eCyMc MA+9SXXLlDa/4Z8w3EsQYx6m2MnNmm0HPeevCmWqq3+Ocooik4si1BpzHfUaE6n/ /0D8zBg= =NzEi -----END PGP SIGNATURE----- Merge tag 'v6.16-rc7' into tty-next We need the tty/serial fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Ben Zong-You Xie
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bf40c1a5b9 |
MAINTAINERS: Add entry for Andes SoC
Add entry for Andes SoC maintainer and related files Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-10-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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ad087c91eb |
riscv: defconfig: enable Andes SoC
Enable Andes SoC config in defconfig to allow the default upstream kernel to boot on Voyager board. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-9-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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9d462f56db |
riscv: dts: andes: add Voyager board device tree
Introduce the device tree support for Voyager development board. Currently only support booting into console with only uart, other features will be added later. Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-8-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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609496af55 |
riscv: dts: andes: add QiLai SoC device tree
Introduce the initial device tree support for the Andes QiLai SoC. For further information, you can refer to [1]. [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/ Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-7-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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65bbf10b93 |
dt-bindings: timer: add Andes machine timer
Add the DT binding documentation for Andes machine timer. The RISC-V architecture defines a machine timer that provides a real-time counter and generates timer interrupts. Andes machiner timer (PLMT0) is the implementation of the machine timer, and it contains memory-mapped registers (mtime and mtimecmp). This device supports up to 32 cores. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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1f5ff8c363 |
dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller
Add the DT binding documentation for Andes machine-level software interrupt controller. In the Andes platform such as QiLai SoC, the PLIC module is instantiated a second time with all interrupt sources tied to zero as the software interrupt controller (PLICSW). PLICSW can generate machine-level software interrupts through programming its registers. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-5-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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6eeee4fb19 |
dt-bindings: interrupt-controller: add Andes QiLai PLIC
Add a new compatible string for Andes QiLai PLIC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-4-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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12d8c15992 |
dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings
Add DT binding documentation for the Andes QiLai SoC and the Voyager development board. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-3-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ben Zong-You Xie
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00dba19aa0 |
riscv: add Andes SoC family Kconfig support
The first SoC in the Andes series is QiLai. It includes a high-performance quad-core RISC-V AX45MP cluster and one NX27V vector processor. For further information, refer to [1]. [1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/ Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Link: https://lore.kernel.org/r/20250711133025.2192404-2-ben717@andestech.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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983f3a8831 |
MediaTek soc driver updates for v6.17
This adds a single cleanup commit for the mtk-mutex driver, clarifying the usage of the MUTEX_MOD1, MUTEX_MOD2 registers for applying display controller sub-component mute settings on all MediaTek SoCs. -----BEGIN PGP SIGNATURE----- iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaHDEnSgcYW5nZWxvZ2lv YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4HTEBAMK9 47KycyByOmJY01X+usWVfo2omdHJvcpgp9wmOXS7AQCfWfBhKGIG51SHQjmPaQJh XPyGUOMV54hbvA+3/p+iBg== =di4q -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+U4cACgkQmmx57+YA GNmfMg//Sm2efrPXfOq1OI5H1rIybp3vfKcR12tNitDyTkKSGB0D+CMs8XfwelVu mEhf2WHn42WfQJYRbqcohQrELImaEGsFuM6P0po4fPXic8uyTZTO7orObuUZpHbg J3PGeHeo6l1Pp4TedzEG/7oJXz/DXRTgOSuUVmgE15DueX/ZxLH+56+LxI1AEmg5 kynIC5w3fup/e0IKsdlELCZmLTOsv4RI+vAR2hza361KGbMw/ZXGR2d/VdL1wLak 25vOa0SYmPeWpWZKxEEp7Hfa9LgyzahfZVZ2kzB0xfMwbFzTGtoYd9TuLZwPGN2h v4bZtuhF5GYlns5orSXO0OR6kHihw/fbY8JkiNY6JEfZMp+jSYfmKkxZOTr/85sU uSVfHg6NgDR5+caef8tup//oPP7LlKCD+ggaHsitOFKucfZveHsVPA0xaOJRDHWa k6fXvF+n/yfH2HtkphckeZ/m5GKjzQI663OzKXie/6lTtUYHJeS4fF9x8Z6Wgp2m 4ja79UiEWM+ZzVJ1tt7hcCEK4z7kvhEwuy91PbXeYKfIeyr6YPlPi9qcjO1beD9b mn2udXtwv42kO6vMxZIetiSp6JYpo1oBiVvTiwoHQR3lClm/CNAq2AcuESWvTlm0 FTIkZwlV6eXt9Jln5yE5cUSMHVuvM9Z24yc6kPLIFb3DkosSYpo= =fVc1 -----END PGP SIGNATURE----- Merge tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers MediaTek soc driver updates for v6.17 This adds a single cleanup commit for the mtk-mutex driver, clarifying the usage of the MUTEX_MOD1, MUTEX_MOD2 registers for applying display controller sub-component mute settings on all MediaTek SoCs. * tag 'mtk-soc-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: soc: mediatek: mtk-mutex: Fix confusing usage of MUTEX_MOD2 Link: https://lore.kernel.org/r/20250711083656.33538-4-angelogioacchino.delregno@collabora.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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ed82b8d657 |
Reset controller updates for v6.17
* Support reset controllers on Kendryte K230 and SOPHGO CV1800B. * Add RZ/V2N USB2PHY reset controller bindings * Use auxiliary device creation helpers in reset-mpfs. * Convert nxp,lcp1850-rgu and snps,dw-reset binding docs to DT schema. * Enable reset-brcmstb(-rescal) on BCM2712. * Fix a typo in the T-HEAD TH1520 Kconfig option -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCaG/amxcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwK6oAP9aCwONI6A0uq5deV4caorQguqU iGU+IOup1VabI4l/JAEAq/48VrYuy/zS8jtn9jOnJD1DLkVMMhYL1+toeqqXKQ8= =DjB0 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+U0AACgkQmmx57+YA GNmDmQ/+Nv8gUvNO3zdVcRCZXl+SE3gjV2+l2BpXaAWylUMqBduEl7hLUpUg2PRB vl0cDsaIlwy8gqIbA1mMRDcHN1r0seyEbt5cVJh9VohFaoxPJ6+YzlopFvlsTDrx lLzhYqvvXOx+1KQInH4VQIiUzqeUFyKkw/VHHikRqe0CCIqL8PsiEUErKW0XkrDn SpqRpvRtZS4eGwaApzr0giiYoWhCGfkWWFWCVOHlDNvjne8XU1B3wZ60s/dYif+F qz0G8YAm12FTUe/yWOjM9yHWlCD2FO1amdvgZ6Ac+UetKd9gA28CiFF6EaHhUe0x n+c9+JNYaR/RRzj7gFCH7gRruJB29I7itpHRQ7N4fVHTsZAGY9jDOOqbhUm9WuCR ZaPbmoMPZk/yKQNQmlOFfPLFKBOXDF+Jw17xv85iU8dNQ0Pl5FCTz4sCNpU4x78k Fr+uS5r9B/8GWOCZeCwEpUY3wkz4lbOfd9df5l0Mb7JnythDqeH7y0NK0Z/dC96P cTv69JYqHV0bQqQm32ZAQ49U6P/8Jyq7M0uAcR4gwZ+AquTbVMWw6hANbxJcdGv0 hG0v6Cov++AZRStPmlLZpAJ8f3S6gUMLkau3KZ/4dg29oaBuWeLI9Fr64ZCadTFF LJoEqlwvy3YSs/cMjtaRiMPrvJZxPD36P5rnao5XD/MfZmXJr30= =heN+ -----END PGP SIGNATURE----- Merge tag 'reset-for-v6.17' of https://git.pengutronix.de/git/pza/linux into soc/drivers Reset controller updates for v6.17 * Support reset controllers on Kendryte K230 and SOPHGO CV1800B. * Add RZ/V2N USB2PHY reset controller bindings * Use auxiliary device creation helpers in reset-mpfs. * Convert nxp,lcp1850-rgu and snps,dw-reset binding docs to DT schema. * Enable reset-brcmstb(-rescal) on BCM2712. * Fix a typo in the T-HEAD TH1520 Kconfig option * tag 'reset-for-v6.17' of https://git.pengutronix.de/git/pza/linux: dt-bindings: reset: Convert snps,dw-reset to DT schema reset: brcmstb: Enable reset drivers for ARCH_BCM2835 reset: simple: add support for Sophgo CV1800B dt-bindings: reset: sophgo: Add CV1800B support reset: mpfs: use the auxiliary device creation dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/V2N SoC support dt-bindings: reset: convert nxp,lpc1850-rgu.txt to yaml format reset: thead: Fix TH1520 typo reset: canaan: add reset driver for Kendryte K230 dt-bindings: reset: add support for canaan,k230-rst Link: https://lore.kernel.org/r/20250710152513.1346298-1-p.zabel@pengutronix.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Ruben Wauters
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17133255a3 |
drm/i915: replace DRM_DEBUG_SELFTEST with DRM_KUNIT_TEST
DRM_DEBUG_SELFTEST was removed in commit
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Colin Ian King
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94fd442303 |
ACPI: processor: throttling: Remove space before newline
There is a extraneous space before a newline in a pr_warn message. Remove it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://patch.msgid.link/20250721135016.2500117-1-colin.i.king@gmail.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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Arnd Bergmann
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d60b1224b9 |
FSL SOC Changes for 6.17:
- Use dev_fwnode() instead of of_fwnode_handle() - Use new GPIO line value setter callbacks -----BEGIN PGP SIGNATURE----- iJIEABYKADoWIQQQ/+b4s5DeF6zCYyNoqS/rAbjdeAUCaG9cHRwcY2hyaXN0b3Bo ZS5sZXJveUBjc2dyb3VwLmV1AAoJEGipL+sBuN14RH0A/RtUuPKD0WO77GCuKyWm /k0NfZn/QnpR2m1+WPQ5EjRwAP4qsR5bEAM7OY8m+BBdZPgWR3Si5l3zH11KEm8p RlpECw== =ehqy -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+Uo0ACgkQmmx57+YA GNlnVA//Wn6thIIadTjlVarRQ8uV5V3ATR0ipKpP1bNSJA46EMj5fG32w02iD3P2 h5OgJ8xQUlnxMrbDIfctPEtF7N0uodE/KfW3d4Cgl5jHYS1QVZUFDHIkMD2QZy0j yuz265Cpv4jRIQBQP6d+2dEVY+hHF499hIUMKa33k7zf+X2zxLl07iYbjEvTQ5a7 26K7HHNDJg+AgjzPzfmCkXiz8bM8/bKZ45UvwaWU/jr4U/cdrWl/1KCUKWqupDol wW7EDO8XVKxsbUpqV9Nknh9vFZJxhDVlIxP6Pkwa671vuzedm4faeXIL3P/dc6OB 0JA3wgPLlEJ248xdkAr3EbIvEeoE60VISHFobkks4juY573G2GGRnStVBjukDSMY fKMDEAXu6yAhB7evvyh+lI+thhNYxxYJLb3aX6xL27zR28qpWdA7uHFCGHsB8IP/ 2Pt7hBVu4sXNeas/a/zXMwZkSe2L5LNYUKOIT6aQMrp3Dq9+okBezkHsbVR2K3I2 Ehr1TQYPUw9XVoze1hvceTfCYa+tLkPkA815qYGSD+jE5h/5BRYvDETOol6Aw1wU rzo0x4ZBQ6RcHffzZFfWk/xHk1fyejjS+zJ6Glk2uapsI5UKGHXtoZMpUczfJJ86 qDAQGpllNMItjatVwvLVXUBChebDeTEazHnUhdYo1Rin5G3+GI8= =pjEW -----END PGP SIGNATURE----- Merge tag 'soc_fsl-6.17-1' of https://github.com/chleroy/linux into soc/drivers FSL SOC Changes for 6.17: - Use dev_fwnode() instead of of_fwnode_handle() - Use new GPIO line value setter callbacks * tag 'soc_fsl-6.17-1' of https://github.com/chleroy/linux: soc: Use dev_fwnode() soc: fsl: qe: use new GPIO line value setter callbacks Link: https://lore.kernel.org/r/c947d537-cae5-44f0-abd8-0c558bac46d2@csgroup.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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708109c46f |
ASPEED SoC driver updates for 6.17
The ASPEED LPC snoop driver was recently the cause of some concern. In addition to the initial fixes, the channel configuration paths are refactored to improve robustness against errors. -----BEGIN PGP SIGNATURE----- iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaGyE5RwcYW5kcmV3QGNv ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmuHQA/2nA+lhSqWy3hjK9eada /l5d0ffV8jhbmMfWDUhcxrELAP40xkUSUdJD31LRrU/FDGjv7CIznZIldiSlD6tE JSNyDQ== =SNkf -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+UmAACgkQmmx57+YA GNkWEQ/9G+zYrNpGXmRhvdXmiSEs0/d9V9qfCdr26dwFR0F6lsFPtm/TJ+Fqi2fJ dV2RkJx2+31XzapxKrlyT9L7IMZ4OtfhN+MhFCqv0cB1HDSnxVQKue9/0BsomRUd 8ZpV5GUTHrYPQvqJUN/eK8BO4INqEnp6XZ9ArTzRDUvbOiCSLzXP8nVaHwSbq3WB FqwbMKMah26sW+PgokEhG4Xopa27pN4wbD+0/d3NFFXFDE/KUNBGtxEKz1NOr7qx nnpMBZ7KWIg7UltiZ3h6by5yiVQYOW8ekS+j1GcrHLN++LPEJhYlk/Ab91jxCln3 /U+aWlbQuYiqVVZINeks/RyOhwB8eofV0OvqAJu3TmnkZq28w22cTJESvs5KO3d9 eKXTd8Xz4mimK9ov8xKof0G/CN4m38FdwSr6YsjIZhWYVh64z0AtA3DlyXbRBjbV EY1ePVZZy3S56LdPDk/ADxtHHDC0PL/nIupeCwQLr9GYZeJQrRkPNV9CS8sJeW+o YPWM/14V4jCxERauUkCimLDOnRgD+9TVEdS5+a5gz2Bdw3YQCOzyJgqHj8STXlYV zZt3NGbb3WC9NXy8EW2U8nyRRg1w1KDQU1d+T6VF7m1WVG8+mbXqVNTw7cUKEsCu 1MO5V8AfFqyA0fKSN8bGX/5j671u/v611gZGetpwRg135HP46j0= =CrwR -----END PGP SIGNATURE----- Merge tag 'aspeed-6.17-drivers-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/drivers ASPEED SoC driver updates for 6.17 The ASPEED LPC snoop driver was recently the cause of some concern. In addition to the initial fixes, the channel configuration paths are refactored to improve robustness against errors. * tag 'aspeed-6.17-drivers-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: soc: aspeed: lpc-snoop: Lift channel config to const structs soc: aspeed: lpc-snoop: Consolidate channel initialisation soc: aspeed: lpc-snoop: Use dev_err_probe() where possible soc: aspeed: lpc-snoop: Switch to devm_clk_get_enabled() soc: aspeed: lpc-snoop: Rearrange channel paths soc: aspeed: lpc-snoop: Rename 'channel' to 'index' in channel paths soc: aspeed: lpc-snoop: Constrain parameters in channel paths soc: aspeed: lpc-snoop: Ensure model_data is valid soc: aspeed: lpc-snoop: Don't disable channels that aren't enabled soc: aspeed: lpc-snoop: Cleanup resources in stack-order Link: https://lore.kernel.org/r/9123f151280e52c63dcb645cb07d4eee3462c067.camel@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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404dcaa626 |
Renesas driver updates for v6.17 (take two)
- Sort Renesas Kconfig symbols. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaG7CZwAKCRCKwlD9ZEnx cC5IAQCXRn6uxg3sBTvqLuXNdgOcM0wJXJs9KVqlp8MCOVJdWgEApehiqsbwGBU9 f43uIY82degtrtLjTGlJIxqiMLFi7QI= =Os5D -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+UjIACgkQmmx57+YA GNmdyQ//ZQ/JJvzSDWcabAT85o9sTdeMc5UnwUI5rKqxKjOtlc8g0cK87lrHLpyw V7RJ2nJGRQOoYqVpPO85xyH/t165RAZgKfU4eHH2dc1BmR+ul8I6FGiIXiUYxkgL XppL1hoqgmv3qHoztx+G6SFZ9LONYSXsAyCDEj1BPaQSwdEP1X2dbrM4oGjsH/4Q 8l/FFXN+6YPmR/OGcBfQbCT6SRWpyuOJMUWeUgBamqAuqOHkVqp5tRRcifcuwxqU 3FTxhNmCNSIG34QJAMCFt6SdPk10g0DIt1myIqY3fW5d0VmbBAm0fRoxkBbDZWMt BRwLMUYk/jlg0eIznXoEZ18DMWRAAguVYvz0M6DanX49tcJInISDcmuV7H5swzIb Szp8sT5m6vx8w2Bzj3SbHS79C7R8P4sAhHoZ5N1+My8DiNdNAkI8m/l90uoYO3Kd X1UvSObXoqMrXZiBJu9KXj3TRYC6F8PrqIun4VlXLY+CitqsZQ4J6W2hNnjYORGt 9FOc4QsEO6F/7+j8BEauaBDxuGWtuLxvJryiesyd67UCldiMHRNuCubQUA2ghSjX m67ytQRgwdztEKXOBee0w3uRU5VnikzmPOTGukipMQeIscMAR/PTltwkE3THWVoN 7ojnbcru6Yt1gDCUw79g193r4P3Zz9cCKKT+mau4bW2VuI9Vwc4= =SMyp -----END PGP SIGNATURE----- Merge tag 'renesas-drivers-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.17 (take two) - Sort Renesas Kconfig symbols. * tag 'renesas-drivers-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Sort Renesas Kconfig configs Link: https://lore.kernel.org/r/cover.1752090398.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
753355d620 |
Arm SCMI updates for v6.17
1. A fix is introduced to correct turbo frequency marking for 64-bit
devices with sustained frequencies over 4GHz, ensuring accurate turbo
frequency identification.
2. Debug capabilities are being improved by introducing in-flight transfer
tracking using debug counters, which help diagnose transfer congestion
and behavior. Additional tracepoints are added to log in-flight counts
at transfer begin and end, offering better runtime insight. The debug
counters now support decrement operations using a newly added
scmi_dec_count helper, making counter tracking symmetric and more robust.
3. A race condition in suspend-resume logic is being resolved by ensuring
SCMI_SYSPOWER_IDLE state is set early during resume, improving suspend
reliability under certain conditions. New suspend and resume operations
are added to the scmi_bus_type to enable finer power management control
for SCMI-based devices.
4. Finally enhancements are also made to avoid registering notifiers for
events that a platform does not support, reducing unnecessary overhead
by checking for unsupported event types during protocolinitialization.
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Merge tag 'scmi-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.17
1. A fix is introduced to correct turbo frequency marking for 64-bit
devices with sustained frequencies over 4GHz, ensuring accurate turbo
frequency identification.
2. Debug capabilities are being improved by introducing in-flight transfer
tracking using debug counters, which help diagnose transfer congestion
and behavior. Additional tracepoints are added to log in-flight counts
at transfer begin and end, offering better runtime insight. The debug
counters now support decrement operations using a newly added
scmi_dec_count helper, making counter tracking symmetric and more robust.
3. A race condition in suspend-resume logic is being resolved by ensuring
SCMI_SYSPOWER_IDLE state is set early during resume, improving suspend
reliability under certain conditions. New suspend and resume operations
are added to the scmi_bus_type to enable finer power management control
for SCMI-based devices.
4. Finally enhancements are also made to avoid registering notifiers for
events that a platform does not support, reducing unnecessary overhead
by checking for unsupported event types during protocolinitialization.
* tag 'scmi-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Convert to SYSTEM_SLEEP_PM_OPS
firmware: arm_scmi: Avoid notifier registration for unsupported events
firmware: arm_scmi: power_control: Ensure SCMI_SYSPOWER_IDLE is set early during resume
firmware: arm_scmi: Add power management operations to SCMI bus
include: trace: Add tracepoint support for inflight xfer count
firmware: arm_scmi: Track number of inflight SCMI transfers
firmware: arm_scmi: Add support for debug counter decrement
firmware: arm_scmi: Fix up turbo frequencies selection
Link: https://lore.kernel.org/r/20250709122907.1171913-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
7edf259b11 |
firmware: smccc: Update for v6.17
Just a single update extending arm_smccc_hypervisor_has_uuid() to support both SMC and HVC conduits, enabling UUID retrieval when Linux runs as the root partition under Microsoft Hypervisor (MSHV), where SMC is used. It leverages arm_smccc_1_1_invoke() to dynamically select the appropriate conduit, enhancing compatibility beyond just HVC. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmhuPJ0ACgkQAEG6vDF+ 4pjqARAAlh6YarQMJi7zwqIafEyBYmW5o5x9MAW3J7rQLS4C2/ozEFCPMjoQ2g5b Hnb0wfCk9KLxOygXGxWRbTJOI42wIcM8VO6+Ge5pOificfMEtlYmoZw/LeR9yuub R0QTr/r1QF21vEk8F/ZhQoJGE9kb5aTbHPJ6TWy1gdXOep0kXfZvc1hE5cZoiT0I Bgl4Rsf997DQQgsp+0hXdFLC485nq1nvEjYNR/OqpbSxiOb10ZHoNBi1vekH3N6r pP/krMOkYGONbVgHcVjj5Coi92pWWWgL+l8AbOLHK2MCO0xyxDN2xVmIkhiZ1M/z oaG5fnYdtljTcxqW4eBwPxxYtUO7LJoiT8YHOY+luwrWaEsCl4/5LDVb4sktH+a8 4tami+TjJfWNlHe1xLfUGz+FAsPqYPH36KxpyGGERz2pSqYLLZ3YtAVe06/neaQ6 TBWOJJjKI0G4j4xetIjYtT/v+DIz/Lz4fx0hNoclUKUZ51QF/sd+Hv52W+5p2fVY hhR7aFKXg8k1RjSfdPAOHcAYnsPtIhBdCUbES+ra9GEezE/b83yR4+ki/njylP5w qhji5bhQlUQxWU1BeLeNTqP3GGtbFQP4IJvcQoIEYi9IB8x3zHaIRvi0LeosNwbb IJEiH+9puGYjXu2QKskGg9hZCHTfOUmDXfM1WqJpOXDeHyH3Ruw= =Ud+7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+UVUACgkQmmx57+YA GNmS3g//X05D2kUOMZDZQ1qng8jAUrNfjFmTYoUpOaHWvGIH3z9trxQIV0gGPNys 3JLwxtXrqyrN0AozuTe3CZUrJJlKkOSgdT+H824knjqSZ1UCj4xxo84VZk3u9/gu HOVPD36qXZB6/q2FtAPljz5/yV0cN6FQIFIX3bXmQt/VwjMuJLd8pcHWzNVxs3rz egRXQQBRnypAHHlIopFV4049QfcATO1DkXKIQ26N1BY7ObhBVvw8PAP5gg+3FYiC nC3i5pDNPMcgEgHgm9FUmOtAPGYZo2LVr+x1hbuFb0x65GjavLoOJoknntVCo9j8 3kYkx6C6OorDZZ6T//ktp8no1exzlIc4+R2zNHfqvEXFWbGdVgsr2adzfZ1sGTWQ AsNVMqTPW3FlkZG0u3DhEoDvOiv8qRn5RQwssBdhjtHjSkDYasd/aNTIoOPN6C3E AsDvJGoFDJULOKjrwje7XCxM4hvgJPs3szPDoxYsRtQecrTwSv6EwAtOclSxpmVv exzGU3PQc22jlI2yPtJ7Q0N6kcMjI+V9eG+NjPXv0LJA/rMCyY4RvYnA96b13N5E wMS13z5zj0meZWE8Uj43axxYerb7hPQRov7xtI1fi2CvC5lQSPZWiGQWrsNgWrtM bVn217qQFJ+FQCOl+hq3zn5pRa1Zz5ThYyC2/QMO5cxAt7pLTD0= =Rwqz -----END PGP SIGNATURE----- Merge tag 'smccc-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers firmware: smccc: Update for v6.17 Just a single update extending arm_smccc_hypervisor_has_uuid() to support both SMC and HVC conduits, enabling UUID retrieval when Linux runs as the root partition under Microsoft Hypervisor (MSHV), where SMC is used. It leverages arm_smccc_1_1_invoke() to dynamically select the appropriate conduit, enhancing compatibility beyond just HVC. * tag 'smccc-updates-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: smccc: Support both smc and hvc conduits for getting hyp UUID Link: https://lore.kernel.org/r/20250709122615.1171419-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Mark Brown
|
69e536c932 |
spidev: introduce trivial abb sensor device
Merge series from Heiko Schocher <hs@denx.de>: This series introduces the changes needed for trivial spi based sensors from ABB, currently operated from userspace. |
||
Dan Carpenter
|
6c9e64e83b |
drm/xe: Fix an IS_ERR() vs NULL bug in xe_tile_alloc_vram()
The xe_vram_region_alloc() function returns NULL on error. It never
returns error pointers. Update the error checking to match.
Fixes:
|
||
Eric Biggers
|
5cc1f66cb2 |
thunderbolt: Fix copy+paste error in match_service_id()
The second instance of TBSVC_MATCH_PROTOCOL_VERSION seems to have been
intended to be TBSVC_MATCH_PROTOCOL_REVISION.
Fixes:
|
||
Myrrh Periwinkle
|
7616f006db |
usb: typec: ucsi: Update power_supply on power role change
The current power direction of an USB-C port also influences the
power_supply's online status, so a power role change should also update
the power_supply.
Fixes an issue on some systems where plugging in a normal USB device in
for the first time after a reboot will cause upower to erroneously
consider the system to be connected to AC power.
Cc: stable <stable@kernel.org>
Fixes:
|
||
Benson Leung
|
af833e7f7d |
usb: typec: ucsi: psy: Set current max to 100mA for BC 1.2 and Default
ucsi_psy_get_current_max would return 0mA as the maximum current if UCSI detected a BC or a Default USB Power sporce. The comment in this function is true that we can't tell the difference between DCP/CDP or SDP chargers, but we can guarantee that at least 1-unit of USB 1.1/2.0 power is available, which is 100mA, which is a better fallback value than 0, which causes some userspaces, including the ChromeOS power manager, to regard this as a power source that is not providing any power. In reality, 100mA is guaranteed from all sources in these classes. Signed-off-by: Benson Leung <bleung@chromium.org> Reviewed-by: Jameson Thies <jthies@google.com> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20250717200805.3710473-1-bleung@chromium.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
||
Sebastian Reichel
|
1e61f6ab08 |
usb: typec: fusb302: cache PD RX state
This patch fixes a race condition communication error, which ends up in
PD hard resets when losing the race. Some systems, like the Radxa ROCK
5B are powered through USB-C without any backup power source and use a
FUSB302 chip to do the PD negotiation. This means it is quite important
to avoid hard resets, since that effectively kills the system's
power-supply.
I've found the following race condition while debugging unplanned power
loss during booting the board every now and then:
1. lots of TCPM/FUSB302/PD initialization stuff
2. TCPM ends up in SNK_WAIT_CAPABILITIES (tcpm_set_pd_rx is enabled here)
3. the remote PD source does not send anything, so TCPM does a SOFT RESET
4. TCPM ends up in SNK_WAIT_CAPABILITIES for the second time
(tcpm_set_pd_rx is enabled again, even though it is still on)
At this point I've seen broken CRC good messages being send by the
FUSB302 with a logic analyzer sniffing the CC lines. Also it looks like
messages are being lost and things generally going haywire with one of
the two sides doing a hard reset once a broken CRC good message was send
to the bus.
I think the system is running into a race condition, that the FIFOs are
being cleared and/or the automatic good CRC message generation flag is
being updated while a message is already arriving.
Let's avoid this by caching the PD RX enabled state, as we have already
processed anything in the FIFOs and are in a good state. As a side
effect that this also optimizes I2C bus usage :)
As far as I can tell the problem theoretically also exists when TCPM
enters SNK_WAIT_CAPABILITIES the first time, but I believe this is less
critical for the following reason:
On devices like the ROCK 5B, which are powered through a TCPM backed
USB-C port, the bootloader must have done some prior PD communication
(initial communication must happen within 5 seconds after plugging the
USB-C plug). This means the first time the kernel TCPM state machine
reaches SNK_WAIT_CAPABILITIES, the remote side is not sending messages
actively. On other devices a hard reset simply adds some extra delay and
things should be good afterwards.
Fixes:
|
||
|
Arnd Bergmann
|
a33665facf |
usb: typec: ucsi: yoga-c630: add DRM dependency
Selecting DRM_AUX_HPD_BRIDGE is not possible from a built-in driver when
CONFIG_DRM=m:
WARNING: unmet direct dependencies detected for DRM_AUX_HPD_BRIDGE
Depends on [m]: HAS_IOMEM [=y] && DRM [=m] && DRM_BRIDGE [=y] && OF [=y]
Selected by [y]:
- UCSI_LENOVO_YOGA_C630 [=y] && USB_SUPPORT [=y] && TYPEC [=y] && TYPEC_UCSI [=y] && EC_LENOVO_YOGA_C630 [=y] && DRM_BRIDGE [=y] && OF [=y]
arm-linux-gnueabi-ld: drivers/gpu/drm/bridge/aux-hpd-bridge.o: in function `drm_aux_hpd_bridge_notify':
aux-hpd-bridge.c:(.text.drm_aux_hpd_bridge_notify+0x28): undefined reference to `drm_bridge_hpd_notify'
arm-linux-gnueabi-ld: drivers/gpu/drm/bridge/aux-hpd-bridge.o: in function `drm_aux_hpd_bridge_probe':
aux-hpd-bridge.c:(.text.drm_aux_hpd_bridge_probe+0x20): undefined reference to `__devm_drm_bridge_alloc'
Add a dependency to force UCSI_LENOVO_YOGA_C630 to be a loadable module as
well in this configuration.
Fixes:
|
||
Tao Xue
|
151c0aa896 |
usb: gadget : fix use-after-free in composite_dev_cleanup()
1. In func configfs_composite_bind() -> composite_os_desc_req_prepare():
if kmalloc fails, the pointer cdev->os_desc_req will be freed but not
set to NULL. Then it will return a failure to the upper-level function.
2. in func configfs_composite_bind() -> composite_dev_cleanup():
it will checks whether cdev->os_desc_req is NULL. If it is not NULL, it
will attempt to use it.This will lead to a use-after-free issue.
BUG: KASAN: use-after-free in composite_dev_cleanup+0xf4/0x2c0
Read of size 8 at addr 0000004827837a00 by task init/1
CPU: 10 PID: 1 Comm: init Tainted: G O 5.10.97-oh #1
kasan_report+0x188/0x1cc
__asan_load8+0xb4/0xbc
composite_dev_cleanup+0xf4/0x2c0
configfs_composite_bind+0x210/0x7ac
udc_bind_to_driver+0xb4/0x1ec
usb_gadget_probe_driver+0xec/0x21c
gadget_dev_desc_UDC_store+0x264/0x27c
Fixes:
|