Instead of duplicating the node hierarchy, reference the nodes by label,
adding labels where necessary.
Drop some trailing or inconsistent white lines while at it.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
[Thomas: drop Fixes tag as it is not a bug fix.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Moving the comment to intel_dsi.h(Jani)
v3: Renaming the field names (Jani)
v4 by Jani: make this patch only about VBT
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459346623-30752-2-git-send-email-jani.nikula@intel.com
This patch adds support for eDP backlight control using DPCD registers to
backlight hooks in intel_panel.
It checks for backlight control over AUX channel capability and sets up
function pointers to get and set the backlight brightness level if
supported.
v2: Moved backlight functions from intel_dp.c into a new file
intel_dp_aux_backlight.c. Also moved reading of eDP display control
registers to intel_dp_get_dpcd
v3: Correct some formatting mistakes
v4: Updated to use AUX backlight control if PWM control is not possible
(Jani)
v5: Moved call to initialize backlight registers to dp_aux_setup_backlight
v6: Check DP_EDP_BACKLIGHT_PIN_ENABLE_CAP is disabled before setting up AUX
backlight control. To fix BLM_PWM_ENABLE igt test warnings on bdw_ultra
v7: Add enable_dpcd_backlight module parameter.
v8: Rebase onto latest drm-intel-nightly branch
v9: Remove changes to intel_dp_dpcd_read_wake
Split addition edp_dpcd variable into a separate patch
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Yetunde Adebisi <yetundex.adebisi@intel.com>
[Jani: whitepace changes to appease checkpatch]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459865452-9138-4-git-send-email-yetundex.adebisi@intel.com
This symbols is not needed to get access to selecting the
GPIOLIB anymore: any arch can select GPIOLIB.
Cc: Michael Büsch <m@bues.ch>
Cc: sparclinux@vger.kernel.org
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB"
as this can now be selected directly.
Cc: Michael Büsch <m@bues.ch>
Cc: Mikael Starvik <starvik@axis.com>
Cc: linux-cris-kernel@axis.com
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This symbols is not needed to get access to selecting the
GPIOLIB anymore: any arch can select GPIOLIB.
Cc: Michael Büsch <m@bues.ch>
Cc: nios2-dev@lists.rocketboards.org
Acked-by: Ley Foon Tan <lftan@altera.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB"
as this can now be selected directly.
Cc: Michael Büsch <m@bues.ch>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-m68k@lists.linux-m68k.org
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This symbols is not needed to get access to selecting the
GPIOLIB anymore: any arch can select GPIOLIB.
Cc: Michael Büsch <m@bues.ch>
Cc: Chris Zankel <chris@zankel.net>
Cc: linux-xtensa@linux-xtensa.org
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This symbols is not needed to get access to selecting the
GPIOLIB anymore: any arch can select GPIOLIB.
Cc: Michael Büsch <m@bues.ch>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: linux-alpha@vger.kernel.org
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In idle times 60G device can enter deep sleep and turn off
its XTAL clock.
Host access triggers the device power-up flow which will hold
the AHB during XTAL stabilization until device switches from
slow-clock to XTAL clock.
This behavior can stall the PCIe bus for some arbitrary period
of time.
In order to prevent this stall, host can vote for High Latency
Access Policy (HALP) before reading from PCIe bus.
This vote will wakeup the device from deep sleep and prevent
deep sleep until unvote is done.
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
RX_HTRSH interrupt sometimes triggered during device reset
procedure.
To prevent handling this interrupt when not required, unmask
this interrupt only if we are connected and mask it when
disconnected.
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Network stack can try to transmit data while AP / STA is
disconnected.
Change this print-out to debug level as this should not be
handled as error.
This patch also adds wil_dbg_ratelimited, used to limit the
above print-out.
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
When using interrupt moderation RX_HTRSH interrupt can occur
frequently during high throughput and should not be considered
as error.
Such print-outs can degrade the performance hence should be printed
in debug print level.
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
P2P search can only run on the social channel (channel 2).
When issuing a scan request on the P2P_DEVICE interface,
driver ignored the channels argument and always performed a P2P
search.
Fix this by checking the channels argument, if it is
not specified (meaning full scan) or if a non-social channel
was specified, perform a regular scan and not a P2P search.
Signed-off-by: Lior David <qca_liord@qca.qualcomm.com>
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Add __func__ to wil_err and wil_info for easier
debugging.
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
It's useful to permit the customization of the debug uart baud rate. Enable
this and send down the value to the chip if we're enabling debug.
Signed-off-by: Steve deRosier <steve.derosier@lairdtech.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
For some reason, the 6004 HW 3.0 definition was missing the value for the
uarttx_pin (used for firmware debug). This corrects this situation.
Signed-off-by: Steve deRosier <steve.derosier@lairdtech.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
fix a typo (spelling mistake) in 'ath10k_start'
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
When compiled with "W=1", dtc complains: e.g.
"Warning (unit_address_vs_reg):
Node /soc/ipu@02800000/port@2/endpoint@0
has a unit name, but no reg property"
Endpoint nodes don't have a reg property, and the addresses
in their node names are ordinals without any special meaning
so remove them and swap them for semantic node names.
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf
states the following:
"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."
So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
198MHz is a valid operating point for mx6sx.
Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
These values also match the ones from the NXP kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
QCA6174 WLAN.RM.2.0 firmware uses max_tx_power instead of using max_reg_power
to set transmission power. The tx power was about -50dbm, after applying this
change, it become -32dbm.
Signed-off-by: Alan Liu <alanliu@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This symbols is not needed to get access to selecting the
GPIOLIB anymore: any arch can select GPIOLIB.
Cc: Michael Büsch <m@bues.ch>
Cc: linux-metag@vger.kernel.org
Acked-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Replace "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB"
as this can now be selected directly.
Cc: Michael Büsch <m@bues.ch>
Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Acked-by: Acked-by: Hans-Christian Noren Egtvedt <egtvedt@samfundet.no>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The GPIOLIB symbol currently require that
ARCH_WANT_OPTIONAL_GPIOLIB or ARCH_REQUIRE_GPIOLIB is selected
to be selectable.
The ARCH_REQUIRE_GPIOLIB does only one thing: select GPIOLIB.
This is just confusing: architectures that want GPIOLIB should
be able to configure it in no matter what, and those who
require it should just select GPIOLIB.
It also creates problems for drivers that need to state
"select GPIOLIB" to get dependencies: those depend on the
selected architecture to select
ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB first, and will cause
compile errors for the few archs that state neither.
These intermediary symbols need to go.
As a first step, remove the dependencies so that:
- ARCH_WANT_OPTIONAL_GPIOLIB becomes a noop (GPIOLIB will be
available for everyone) and
- "select ARCH_REQUIRE_GPIOLIB" can be replaced by just
"select GPIOLIB"
After this patch we can follow up with patches cleaning up the
architectures one-by one and eventually remove the
ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB symbols altogether.
Reported-by: Michael Hennerich <michael.hennerich@analog.com>
Cc: Michael Büsch <m@bues.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When booting a relocatable kernel image, there is no practical reason
to refuse an image whose load address is not exactly TEXT_OFFSET bytes
above a 2 MB aligned base address, as long as the physical and virtual
misalignment with respect to the swapper block size are equal, and are
both aligned to THREAD_SIZE.
Since the virtual misalignment is under our control when we first enter
the kernel proper, we can simply choose its value to be equal to the
physical misalignment.
So treat the misalignment of the physical load address as the initial
KASLR offset, and fix up the remaining code to deal with that.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
For historical reasons, the kernel Image must be loaded into physical
memory at a 512 KB offset above a 2 MB aligned base address. The region
between the base address and the start of the kernel Image has no
significance to the kernel itself, but it is currently mapped explicitly
into the early kernel VMA range for all translation granules.
In some cases (i.e., 4 KB granule), this is unavoidable, due to the 2 MB
granularity of the early kernel mappings. However, in other cases, e.g.,
when running with larger page sizes, or in the future, with more granular
KASLR, there is no reason to map it explicitly like we do currently.
So update the logic so that the region is mapped only if that happens as
a side effect of rounding the start address of the kernel to swapper block
size, and leave it unmapped otherwise.
Since the symbol kernel_img_size now simply resolves to the memory
footprint of the kernel Image, we can drop its definition from image.h
and opencode its calculation.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
When building a relocatable kernel, we currently rely on the fact that
early 64-bit literal loads need to be deferred to after the relocation
has been performed only if they involve symbol references, and not if
they involve assemble time constants. While this is not an unreasonable
assumption to make, it is better to switch to movk/movz sequences, since
these are guaranteed to be resolved at link time, simply because there are
no dynamic relocation types to describe them.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Implement a macro mov_q that can be used to move an immediate constant
into a 64-bit register, using between 2 and 4 movz/movk instructions
(depending on the operand)
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Refactor the relocation processing so that the code executes from the
ID map while accessing the relocation tables via the virtual mapping.
This way, we can use literals containing virtual addresses as before,
instead of having to use convoluted absolute expressions.
For symmetry with the secondary code path, the relocation code and the
subsequent jump to the virtual entry point are implemented in a function
called __primary_switch(), and __mmap_switched() is renamed to
__primary_switched(). Also, the call sequence in stext() is aligned with
the one in secondary_startup(), by replacing the awkward 'adr_l lr' and
'b cpu_setup' sequence with a simple branch and link.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We can simply use a relocated 64-bit literal to store the address of
__secondary_switched(), and the relocation code will ensure that it
holds the correct value at secondary entry time, as long as we make sure
that the literal is not dereferenced until after we have enabled the MMU.
So jump via a small __secondary_switch() function covered by the ID map
that performs the literal load and branch-to-register.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This unexports some symbols from head.S that are only used locally.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
ath.git patches for 4.7. Major changes:
ath10k
* implement set_tsf() for 10.2.4 branch
* remove rare MSI range support
* remove deprecated firmware API 1 support
ath9k
* add module parameter to invert LED polarity
wcn36xx
* fixes to get the driver properly working on Dragonboard 410c
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Merge tag 'ox810se-arm-v4.6-rc3' of https://github.com/superna9999/linux into next/soc
Merge "ARM: Add OXNAS Platform Support" from Neil Armstrong
This is for the ARM926 based ox810 chip used in some older
NAS appliances. There is another related ox820 chip based on
ARM11 that might get added here later.
* tag 'ox810se-arm-v4.6-rc3' of https://github.com/superna9999/linux:
MAINTAINERS: add maintainer entry for ARM/OXNAS platform
ARM: Add new mach-oxnas
irqchip: versatile-fpga: add new compatible for OX810SE SoC
* Remove Gen2 designation from Kconfig for R-Car PCIE driver
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Merge tag 'renesas-pci-defconfig-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Merge "Renesas ARM Based SoC Pci Defconfig Updates for v4.7" from Simon Horman:
* Remove Gen2 designation from Kconfig for R-Car PCIE driver
* tag 'renesas-pci-defconfig-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
PCI: rcar-pcie: Remove Gen2 designation from Kconfig
The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The current code will set _PAGE_USER to the access flags for any
fault address, because the ~ operation will be true for all address we
take a fault on. But setting _PAGE_USER also means that the fault will
be handled only if the page table have _PAGE_USER set. Hence there is
no security hole with the current code.
Now if it is an user space access, then the change in this patch really
don't have an impact because we have (!ctx->kernel) set true
and we take the if condition true.
Now kernel context created fault on an address in the kernel range
will result in a fault loop because we will not insert the
hash pte due to access and pte permission mismatch. This patch fix
the above issue.
Fixes: f204e0b8ce ("cxl: Driver code for powernv PCIe based cards for userspace access")
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
- Enable Hi655x PMIC and regulator
- Enable SPI_SPIDEV as module
- Enable several common USB-Ethernet dongles
- Enable configs for WLAN and TI WL1835 as modules
- Enable ARM SP804 for ARCH_HISI
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Merge tag 'hi6220-config-for-4.7v3' of git://github.com/hisilicon/linux-hisi into next/arm64
Merge "ARM64: Hi6220: configure updates for 4.7 based on rc3" from Wei Xu:
- Enable Hi655x PMIC and regulator
- Enable SPI_SPIDEV as module
- Enable several common USB-Ethernet dongles
- Enable configs for WLAN and TI WL1835 as modules
- Enable ARM SP804 for ARCH_HISI
* tag 'hi6220-config-for-4.7v3' of git://github.com/hisilicon/linux-hisi:
arm64: Kconfig: select sp804 timer for ARCH_HISI
arm64: defconfig: enable configs for WLAN and TI WL1835 as modules
arm64: defconfig: enable several common USB network adapters
arm64: defconfig: add CONFIG_SPI_SPIDEV as module
arm64: defconfig: Enable the PMIC and regulator for Hi6220 and 96boards HiKey
DEBUG_HI3716_UART was supposed to be renamed to DEBUG_HIX5HD2_UART, but
accidentally both got left in place, which results in a build error when
CONFIG_DEBUG_UART_PHYS is not set as it should be.
This removes the old symbol.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 12aae30974 ("ARM: debug: Rename Hi3716 to HIX5HD2")
Acked-by: Wei Xu <xuwei5@hisilicon.com>
A little bit of code cleanup in prep for more cloud filter work.
Change-ID: I0dc33ce0d4c207944336a07437640fef920c100c
Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This patch adds a new config for MPS2 platform.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 399 and 400 shares the same memory map and
features. Both are shipped with Cortex-M7 and have the same peripheral
as AN385/AN386, but with different location of PSRAM and Ethernet
controller.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 385 and 386 shares the same memory map and features
except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
is supplied with Cortex-M4.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
