iomem_is_exclusive() requires a CPU physical address, but on some arches we
supplied a PCI bus address instead.
On most arches, pci_resource_to_user(res) returns "res->start", which is a
CPU physical address. But on microblaze, mips, powerpc, and sparc, it
returns the PCI bus address corresponding to "res->start".
The result is that pci_mmap_resource() may fail when it shouldn't (if the
bus address happens to match an existing resource), or it may succeed when
it should fail (if the resource is exclusive but the bus address doesn't
match it).
Call iomem_is_exclusive() with "res->start", which is always a CPU physical
address, not the result of pci_resource_to_user().
Fixes: e8de1481fd ("resource: allow MMIO exclusivity for device drivers")
Suggested-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Arjan van de Ven <arjan@linux.intel.com>
Include the development base board, which is equipped with some
devices such as EEPROM.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The cifout clock is incorrect due to the manual error, we need to
fix it.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
DMA, GIC maintenance interrupt, PL022 SPI controller
- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
for consistency with how other Broadcom SoCs are doing this
- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
the standard PSCI 1.0 firmware interface
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXG8r9AAoJEIfQlpxEBwcEVIYP/0Q5uRJ7zysbVOBo0dm4CPwK
2dxmt1ANc6fB/LSuedIzCkAOXPBX1x4goF59pb5UHBBpV2/Y79HT6BMG2SVvjtNh
4FF3mqVLZ5B6KlJDkZb6JN29SG82OjGZrZLpSC8/89TXMadTLdbSq41hVjJ9sY9l
9feg1qmhO1pKfZIRWPxJnNzCyiJOtKBZSSZaUyejolZBMIIdf8uPUtiRqu/sNWvd
mz37YDdXFJomaoBdgUSKlwvChs+6LkzczSLRlcTHa9Wr7luXwftU1uXRHbzHDMHS
BUxvIbJe8ivwDjYdCB6l0PxIiigYm2mVIZt06BVYLbQMih5zmlOdrSW6c3e/CrIe
i9IBRHwR+l7uqs/u2b6dX7/wziH9jtZ2Hv0dK7+k/A8nktw4wWr5VZsYiMWZ/j0Q
ikfSRz26+p0LJ05PNTtmqSFhZ5sAcUQ599+guyNDl+8EbpVKHvTlHtmWxktO/w0v
3K0QwaIvxac0xR90XVBvhmY6b+/8uJoKqp6jqTymEZGOqinOvA9kcnNW6PDZHyxh
6LdEGg1APNou0/t1Uq7khlOfkRhhifUAV8dJVFqFsc/ZFOB1zZiLIiEmV5ckdZlR
iUFKArRzki4G6CG1JQ2bGIjun+JGVPCuQsdlVERJdeBC4WJn4JtT/SGlc0DlowK2
r/4BBv44ZLmRcLcm10+L
=6mn8
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
DMA, GIC maintenance interrupt, PL022 SPI controller
- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
for consistency with how other Broadcom SoCs are doing this
- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
the standard PSCI 1.0 firmware interface
* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2 secondary core enablement via PSCI
arm64: dts: Add ARM PL022 SPI DT nodes for NS2
arm64: dts: Move NS2 clock DT nodes to separate DT file
arm64: dts: Add maintenance interrupt for GIC in NS2 DT
arm64: dts: Add ARM PL330 DMA DT node for NS2
Sowmini Varadhan says:
====================
pskb_extract() helper function.
This patchset follows up on the discussion in
https://www.mail-archive.com/netdev@vger.kernel.org/msg105090.html
For RDS-TCP, we have to deal with the full gamut of
nonlinear sk_buffs, including all the frag_list variants.
Also, the parent skb has to remain unchanged, while the clone
is queued for Rx on the PF_RDS socket.
Patch 1 of this patchset adds a pskb_extract() function that
does all this without the redundant memcpy's in pskb_expand_head()
and __pskb_pull_tail().
v2: Marcelo Leitner review comments
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
rds-stress experiments with request size 256 bytes, 8K acks,
using 16 threads show a 40% improvment when pskb_extract()
replaces the {skb_clone(..); pskb_pull(..); pskb_trim(..);}
pattern in the Rx path, so we leverage the perf gain with
this commit.
Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
A pattern of skb usage seen in modules such as RDS-TCP is to
extract `to_copy' bytes from the received TCP segment, starting
at some offset `off' into a new skb `clone'. This is done in
the ->data_ready callback, where the clone skb is queued up for rx on
the PF_RDS socket, while the parent TCP segment is returned unchanged
back to the TCP engine.
The existing code uses the sequence
clone = skb_clone(..);
pskb_pull(clone, off, ..);
pskb_trim(clone, to_copy, ..);
with the intention of discarding the first `off' bytes. However,
skb_clone() + pskb_pull() implies pksb_expand_head(), which ends
up doing a redundant memcpy of bytes that will then get discarded
in __pskb_pull_tail().
To avoid this inefficiency, this commit adds pskb_extract() that
creates the clone, and memcpy's only the relevant header/frag/frag_list
to the start of `clone'. pskb_trim() is then invoked to trim clone
down to the requested to_copy bytes.
Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch set only includes a single change to
fix the compatible string for SATA controllers on
X-Gene v2 SOC platforms.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXFV/ZAAoJEB11UG/BVQ/gE/wP+QEZfjkYct5cpzbt2RmeX4Tx
3PbN5u00t013WrGfpkacM+l9n7ZNJLEuub//ptZ9ejvmdfqVInVsScMybBZq/1rY
CAsv2aGs+Crn8CxDbaiBu0uiWwccE+OrswWd5pmOsdqvqFSugYEHosmtte3tbgK5
3ehhb/WNXoGodaAdKLl3daDH056eozRJUYVgEr0w5pIVkMWOMYQUO7wibYlydG3N
DGex0jpY175eYl4il5YRtcX2AAK6PP3JjyjmuEkU/Ngy7tGZPtpUG2CHKp8eBbLF
oH1SZpM6Wnbw4iyTJNCrDxMe3unXRNEVprH5Y3r4LNrxrd2608Fx7OmvXUpm5gqK
GLOaT4gFjqDr14M3tmHy/LHDovoGbVKMgM3AIqTJBDtjC6XM6QqtcFStnR9WpHms
dPj8aPxAXoHFp8vdd/68LqxJ9yGZHfbiQg67kHGaNd3SV61LBLyrsSB50ENyUj4Q
ks2fBwpEMnrK8pil1zTK8PowIQ2hXa7BHfppiTGnsnLVJBzH0PIiB7q1r14ggHXu
AzwjiqByAL7++corvBQnj68UKdIlmKBlecXX3IpVhG+7QmJ1FR4Sdg3pPv5UNVAn
UVqu+nlVSStbdNVUnMwEwHseXpCZG9dAQrBVFasqgBInS0jJq6toCF7uMDzD+oQM
mzT8S9qZQEDfYDSc7Fjj
=Wnq5
-----END PGP SIGNATURE-----
Merge tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next into next/dt64
Merge "First part of X-Gene DTS changes queued for v4.7" from Duc Dang:
This patch set only includes a single change to
fix the compatible string for SATA controllers on
X-Gene v2 SOC platforms.
* tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
We don't need to many clocks enable after startup, to reduce some
power consumption.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXERKpAAoJEAvIV27ZiWZcrjQP/iaj3zzSDcdHwGGbZsPXK/bt
VHtqmtrWazXy5DIgA/4voHT3aYiHWVgmqCtl5kFs9X6SRDaqZXmMTAJPAiuBjs8s
HMArHopgV/cmpGbg/ex4PxQqhj0TEOS6kiTl6roYlWnbNvOvHDpePWbS44grDqT+
2q5hvm2xe9DVG3iEz5rlpBx42j+e7bH7LNiysToDXwb6PblKq+/o3PlkQKBQ7fyF
9eGCI1az6iMNdGNicuHjU4olri6XcqCAeccO3Nh0nnuXOfEip1dIngT2vLc9IXVV
J2L9xZ7oiJkgofAzve3sTkZbHsQIL9UmIiL1JNZycrQJyjjjk9VtUxuzD3yLOaPI
8GJpIkccoAGQdMwFsRDT7fQW1qmtSxs5mMzhkGfeD2gAjTcWA0H+Pn7hjb0AQHDf
wot1aKkGfoRl+PPF7j6DaHe4Gd2oU+6R89Z3e4ZzVlLzt11Hijm4yMs7h2sXKpAe
39+FglMPEHLW2RFNBXNz3Fu4dUcWIgTWHU333Jjvs0Wj7O7er8L0xwkA91PRH+E8
n86n7pYv2LnpDHxZ7yi5DYXNojIfxPIDyZgJK0NYgFi5E0iKCBJ9KNulzIWDqLve
Llm0x8xA3VPBbxXeF4OZQ4w1IeTmwGEXOSnIlGIUmaouoPFpyxt8Ex8FKPlEBblB
Ke+fFwAIZFYHnhJVXVHN
=MpZ0
-----END PGP SIGNATURE-----
Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64
Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu
- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220
* tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
arm64: dts: Add L2 cache topology to Hi6220
arm64: dts: register Hi6220's thermal zone for power allocator
arm64: dts: register Hi6220's thermal sensor
arm64: dts: add wifi nodes support for hi6220-hikey
arm64: dts: add dwmmc nodes for hi6220
arm64: dts: hikey: Add hi655x pmic dts node
arm64: dts: add LED nodes for hi6220-hikey
arm64: dts: hi6220: add pinctrl for uarts and enable them
arm64: dts: add Hi6220's stub clock node
arm64: dts: add mailbox node for Hi6220
arm64: dts: Add hi6220 usb node
arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
arm64: dts: add all hi6220 i2c nodes
arm64: dts: add Hi6220 spi configuration nodes
arm64: dts: add Hi6220 pinctrl configuration nodes
arm64: dts: Add Hi6220 gpio configuration nodes
arm64: dts: enable idle states for Hi6220
arm64: dts: add sp804 timer node for Hi6220
arm64: dts: Reserve memory regions for hi6220
This patch add some necessary frequencies for the RK3399 clock.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Just one update: Support for external expansion bus useful for
additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXERe6AAoJEABBurwxfuKYC3AP/AylITCQ6rtpULmu/zY/ghfi
lbMe1ffX8vo8S2G51ytO9Ko6j929t7d8lN69h/c18fhnWKNFv1NMKW2lJyVg4PlR
yqc2yPsQ0Ypr/f57zvnug38MBX8ugn9RGC0f075FNFIOdFqtnalziP8VTLuaJWj6
CXZBgUdKlEG0J077LkK+07W4OnLSvu9rt+qA+jyFrTxJNIK21y4WjPPhL13KDNjK
xSfvsy0HnMdjBe60PsW21mhkdX7ya5qaON1KA556oWEkFjPPbQ9Ur/sprZXbP3i1
MphyxJoZJd94Rkffvv4IjmbujVrYogjcoYM0NNtu50g9gDVE1sO62Ynv50AEBn31
zUEKiD0VmP9qrMWTkTxTSOzFgV+6Rk9DE90VQxJhzTU7pxQq8WFanGVKDHmWQjJg
egpTuzbR1sMd9CQAzIPMXMTSQZf6qrK/LZvb0/tVGt6/3fQ/Ru/urvl7UdUK3yn/
ehsox7yKJ9cEqFVlOakFlcBmzQ8B57f7eKzSQpu0lWkQ5CRSacWY2xqT/9DiIi3u
1BVpYnHFQyhBlBD00KFTSW7V4ZBi6493uXqugmmcaqGCTWaEA02qvUSi9dZhLJPs
UeU2I+lR5kQCYlL74jc0T4Mtw4fjIZv28K/WYgJ6TuheLoLcnim7b0+qHQ1YUKvX
77LHQ1nGTzXCL8QGrQtd
=ypy7
-----END PGP SIGNATURE-----
Merge tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
Pull "ARMv8 Juno DT updates for v4.7" from Sudeep Holla:
Just one update: Support for external expansion bus useful for
additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)
* tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Add external expansion bus to DT
A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXEP0aAAoJEN0jrNd/PrOhU0QQALq45NK5/CoX52YcSuAf/sT/
JzcZ7lPPncIP7pc9ya/9pJZ31i5OsTAawoQY0sRHhyXaDhsEOeKs1z6GOYMtkdqw
JL6sn4f/+p2X8+SEP6p37jUpyhSw7Dtz8b2R6tqYEpoBxztlDTZmSEzq1ix5GDkh
X5ZtaULpqnvn04cxD/MR/2aQRl271lB8aluJTCWllpWEawNyCm2UyytJdnAJK2tT
QN0GRs9gtliOuDeeJkCW7/BUY3ejKvqtEqMJSlCSHlgE6SL+WJ/8N0APewXgAKOq
puXu7NL53vlZgn9B6LyA4SyLZoL/Kfus1MnZyWC+p28bY9vVz+FGv0n6rylSh0Vp
ocGCgyrDob4Y3oio47UPUiQ6ffKsgS8+CTpkte1Gt43Ux1Fyjd1t6NDX1yNU4liY
vOTaVEzntEB1BRoSLLAOPWIkSdSmJ6B+/ZbWnezmjFl/2XUKSybBa8SoSBFXhXPw
lJc0ngj4ylk2QVS40fBItq3/vx4u4DFOg33tHxnhdZ1eQ38ZKwPQ+jH9YnruWZpj
qu4trci6GgQPnH/06lQf4FeRyJ56jD+8iQXwW3hAz5DEE8uGdkawFo7evFsIgbn5
ZHDsLhABhCiH1y1s4At71XxSN+Jg3LYsUEKggU4KD1gxD3oi/ELGT3jT44HXx0pv
Jqz/3/BG7tEkNcpBZebN
=2hlL
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding
A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.
* tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable cros-ec and charger on Smaug
arm64: tegra: Add pinmux for Smaug board
arm64: tegra: Add stdout-path for various boards
arm64: tegra: Remove unused #power-domain-cells property
arm64: tegra: Add gpio-keys nodes for Smaug
arm64: tegra: Enable power and volume keys on Jetson TX1
arm64: tegra: Add support for Google Pixel C
arm64: tegra: Replace legacy *,wakeup property with wakeup-source
arm64: tegra: Fix copy/paste typo in several DTS includes
arm64: tegra: Remove 0, prefix from unit-addresses
1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXDhKFAAoJEME3ZuaGi4PX3CIP/RYCTn6iRZfE+vA063syDsLB
yGQ5Ss0c2Dc8DkF4rdQCM7CDxeVqRwfXGvnTYi9xhRr36MCNuG/vRPjtPVCpdP1V
pwNeih9qMCKlsufjuSMQtPA8wBE2dd09vFk+fgfJGSy56/5KekT0dU6GrGMVjFIe
spgoGvA9Nz5tG6CIzlKnuAkivIBAdEflz4mQ0BOOKJYHatwda7lJp0obPpoa1Mbb
hkzbu88a9bIAA/rk0FXXQwl/hKuiiTqGZYnWL1A0mDLe0g7SP1pl2imb7vXmnJyR
lDeWPklPFC1oG2iKHYFTggGrXYsSZIgggA09gO7imv1rWXyWrw1/DErkofL3cQIX
sbmFieDLsP7ksadLJ9tXukIQiSDaXuhRArBnEbtHoLny+9GzehE3bAy1VMtnJISt
lXgMF7I5+GPqUwZYU0aX6YFeIYDOq0otPkIb9SoBkQ2LWGRAA0kbMqQ+z44Axdze
CV+rZxl+Bm2d0Bp5pOaVT7eIRj4w+fc3Nak7vcmGfgCxADnejUmYlv2ia/BNLTYv
Q12uTCqgm8tiQusvGY1NOvhtrLx+w/NahvoJkP427HcQ5mKhoqrFRrrBdJa9rLtc
VrM/3tGxT6P/UzvTtrIV0iu54Z83AZtchAV9qxWLJROqMtj5w2fnR/pDL+A6plM7
RJBLNqLHWpox+6kIYgIy
=lzL+
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Merge "Samsung Device Tree ARM64 updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7.
* tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: Add nodes for pdma0 and pdma1 for exynos7
arm64: dts: exynos: Add TMU node for exynos7
We export some clock IDs for the reference drivers need them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rga clock supplying the working clock on the rk3399 is actually
called rga-core in the manual. As the clock id has neither been
assigned nor released with a full kernel release, we can still change
the id to the more appropriate naming.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the id for the general gpu soft-reset, that got documented only in
newer TRM versions.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This works on the same implementation principle as
codel*.h, i.e. there's a generic header with
structures and macros and a implementation header
carrying function definitions to include in given,
e.g. driver or module.
The fairness logic comes from
net/sched/sch_fq_codel.c but is generalized so it
is more flexible and easier to re-use.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Michal Kazior says:
====================
codel: make it reuseable beyond qdiscs
There's an ongoing effort in fixing wireless
bufferbloat. As part of that fq_codel is being
ported into mac80211. To prevent code duplication
codel.h needs to be slightly modified before it
can be used in mac80211 (or other drivers FWIW).
For more background please see:
https://www.spinics.net/lists/linux-wireless/msg149976.html
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
It was impossible to include codel.h for the
purpose of having access to codel_params or
codel_vars structure definitions and using them
for embedding in other more complex structures.
This splits allows codel.h itself to be treated
like any other header file while codel_qdisc.h and
codel_impl.h contain function definitions with
logic that was previously in codel.h.
This copies over copyrights and doesn't involve
code changes other than adding a few additional
include directives to net/sched/sch*codel.c.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This strips out qdisc specific bits from the code
and makes it slightly more reusable. Codel will be
used by wireless/mac80211 in the future.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
ip6_route_output looks into different fields in the passed flowi6 structure,
yet cxgbi passes garbage in nearly all those fields. Zero the structure out
first.
Fixes: fc8d0590d9 ("libcxgbi: Add ipv6 api to driver")
Signed-off-by: Jiri Benc <jbenc@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commit 751a587ac9 ("route: fix breakage after moving lwtunnel state")
moved lwtstate to the end of dst_entry for 32bit archs. This makes it share
the cacheline with __refcnt which had an unkown effect on performance. For
this reason, the pointer was kept in place for 64bit archs.
However, later performance measurements showed this is of no concern. It
turns out that every performance sensitive path that accesses lwtstate
accesses also struct rtable or struct rt6_info which share the same cache
line.
Thus, to get rid of a few #ifdefs, move the field to the end of the struct
also for 64bit.
Signed-off-by: Jiri Benc <jbenc@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Yuval Mintz says:
====================
qed*: driver updates
[Was previous termed 'eeprom access et al.', but seemed a bit
inappropriate given we've dropped the eeprom patch for now.
Still waiting for some inputs on that one, BTW]
This patch series contains some ethtool-related enhancements.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
The APIs for making this sort of configuration [e.g., via ethtool] are
already present in qede, but the current configuration flow in qed doesn't
respect it.
Signed-off-by: Sudarsana Reddy Kalluru <sudarsana.kalluru@qlogic.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There's some inconsistency in current logic determining whether the
link settings of a given interface can be changed; I.e., in all modes
other than the so-called `deault' mode the interfaces are forbidden from
changing the configuration - but even this rule is not applied to all
user APIs that may change the configuration.
Instead, let the core-module [qed] decide whether an interface can change
the configuration by supporting a new API function. We also revise the
current rule, allowing all interfaces to change their configurations while
laying the infrastructure for future modes where an interface would be
blocked from making such a configuration.
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Adds a getter for the interfaces private flags.
The only parameter currently supported is whether the interface is a
coupled function [required for supporting 100g].
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There's a difference in statsitics' names starting at qed and
propagating to qede, where egress counters indicate ranges while ingress
counters indiciate high-end.
Align all statistcs to follow the same conventions - name indicates range.
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The gate bits of the i2c4 and i2c8 are incorrect due to the manual
error, we need to fix them.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
We should call consume_skb(skb) when skb is properly consumed,
or kfree_skb(skb) when skb must be dropped in error case.
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We now have proper per-listener but also per network namespace counters
for SYN packets that might be dropped.
We replace the kfree_skb() by consume_skb() to be drop monitor [1]
friendly, and remove an obsolete comment.
FastOpen SYN packets can carry payload in them just fine.
[1] perf record -a -g -e skb:kfree_skb sleep 1; perf report
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Hello,
So, this ended up a lot simpler than I originally expected. I tested
it lightly and it seems to work fine. Petr, can you please test these
two patches w/o the lru drain drop patch and see whether the problem
is gone?
Thanks.
------ 8< ------
If charge moving is used, memcg performs relabeling of the affected
pages from its ->attach callback which is called under both
cgroup_threadgroup_rwsem and thus can't create new kthreads. This is
fragile as various operations may depend on workqueues making forward
progress which relies on the ability to create new kthreads.
There's no reason to perform charge moving from ->attach which is deep
in the task migration path. Move it to ->post_attach which is called
after the actual migration is finished and cgroup_threadgroup_rwsem is
dropped.
* move_charge_struct->mm is added and ->can_attach is now responsible
for pinning and recording the target mm. mem_cgroup_clear_mc() is
updated accordingly. This also simplifies mem_cgroup_move_task().
* mem_cgroup_move_task() is now called from ->post_attach instead of
->attach.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Michal Hocko <mhocko@kernel.org>
Debugged-and-tested-by: Petr Mladek <pmladek@suse.com>
Reported-by: Cyril Hrubis <chrubis@suse.cz>
Reported-by: Johannes Weiner <hannes@cmpxchg.org>
Fixes: 1ed1328792 ("sched, cgroup: replace signal_struct->group_rwsem with a global percpu_rwsem")
Cc: <stable@vger.kernel.org> # 4.4+
Since e93ad19d05 ("cpuset: make mm migration asynchronous"), cpuset
kicks off asynchronous NUMA node migration if necessary during task
migration and flushes it from cpuset_post_attach_flush() which is
called at the end of __cgroup_procs_write(). This is to avoid
performing migration with cgroup_threadgroup_rwsem write-locked which
can lead to deadlock through dependency on kworker creation.
memcg has a similar issue with charge moving, so let's convert it to
an official callback rather than the current one-off cpuset specific
function. This patch adds cgroup_subsys->post_attach callback and
makes cpuset register cpuset_post_attach_flush() as its ->post_attach.
The conversion is mostly one-to-one except that the new callback is
called under cgroup_mutex. This is to guarantee that no other
migration operations are started before ->post_attach callbacks are
finished. cgroup_mutex is one of the outermost mutex in the system
and has never been and shouldn't be a problem. We can add specialized
synchronization around __cgroup_procs_write() but I don't think
there's any noticeable benefit.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: <stable@vger.kernel.org> # 4.4+ prerequisite for the next patch
This reverts the following three commits:
70af921db6799977d9aaf1705ec197
The feature was ill conceived, has terrible semantics, and has added
nothing but regressions to the already fragile ipv6 stack.
Fixes: f1705ec197 ("net: ipv6: Make address flushing on ifdown optional")
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix the misuse of goto statement in ks_pcie_get_irq_controller_info() as
simple return is more appropriate for this function. While at it add an
error log for absence of interrupt controller node.
[bhelgaas: drop "ret" altogether since we always know the return value]
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
This device is a package containing a MPU6050-like sensor and an AK8975
magnetometer. The magnetometer component is supported by the existing
ak8975 driver.
This patch also rephrases the Kconfig descriptions.
Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This can be used to distinguish mpu6500. This is a warning rather than
an error because the differences are mostly irrelevant and it's nice to
avoid breaking users with slightly incorrect ACPI/DT.
Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Jeff Kirsher says:
====================
10GbE Intel Wired LAN Driver Updates 2016-04-25
This series contains updates to ixgbe and ixgbevf.
Emil provides several patches, starting with the consolidation of the
logic behind configuring spoof checking. Fixed an issue which was
causing link issues for backplane devices because x550em_a/x devices
did not have a default value for mac->ops.setup_link. Refactored the
ethtool stats to bring the logic closer to how ixgbe handles stats and
sets up per-queue stats for ixgbevf.
Mark adds a new register to wait for previous register writes to complete
before issuing a register read, which is needed when slower links are
in use. Fixed the flow control setup for x550em_a, the incorrect
fc_setup function was being used.
Don added a workaround for empty SFP+ cage crosstalk, since on some
systems the crosstalk could lead to link flap on empty SFP+ cages.
Jake converts ixgbe and ixgbevf to use the BIT() macro.
Alex Duyck adds support for partial GSO segmentation in the case of
tunnels for ixgbe and ixgbevf. Then preps for HyperV by moving the API
negotiation into mac_ops.
Arnd Bergmann provides a fix for the ARM compile warnings in linux-next
by converting the use of a udelay() to msleep().
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller
- Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
Power Management support, switching sdhci-bcm2835 for sdhci-iproc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXG8pNAAoJEIfQlpxEBwcEipUQAMqVGtqqdxEEGa0nwGGabpms
oxKUkAPgflzYWoPy28WoCoaRGceNz+aP1H204nqJqXhHbUKeJaTPTu6TwMMMx2K5
vBsGQan7flOuPEaGEsRTb5bxG6DoTxa9FdfMFmekUWwEaxvmTwvjqyh62P9AwNOH
IKKdHOCIqJmMOcvzr8Ptr2Z2+2wOojzteyo7U5WZ0oqg/+UIKRnnQqX/k+OE8swj
iX7u48fhtymPk/wDCks51IsV9PdJLIITqg73Dtxp7ltY1tvPDMUdsZyWOxo3A8b7
B8251VD/njgITbFOZUDn7X0QdH0NPwuZzIcp3Mdcz/ZPy++uJbotKSHOKFsnZXuU
f5DfR8UleJ8IadOUpLVDG3mr5tX7UyxogN35cmA9X394T9qKgaq9626namcGWS/1
LfSD+Tg/AQQUA4sK8rhk7qXSTO0VLKTP314l/TyV2L5qMeZPsoabAllYhC5/XcXI
2nwsqbUxvyUAt2asiVtPOA5sFHCkyT7Cq55mxYbqOEdqteSJm2iqWRLBh90C2F6X
c0JpdFZs9Ag5LOjRr9k6cDb9XhWdhdIk9Xpq1KPVsQBq7F8giNgIq21nsup8FYr4
eokJHLnM6lfGzaNOnlg6sCE6Aqt9g63OFCvTIR9ylJTWvptK+ZwWqQdL9Sp0IjvI
A5D+RGyAqRc6zWDECeKq
=QxkI
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig
Merge "This pull request contains defconfig changes for Broadcom ARM-based SoCs"
from Florian Fainelli:
- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller
- Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
Power Management support, switching sdhci-bcm2835 for sdhci-iproc
* tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux:
ARM: bcm2835: Enable NFS root support.
ARM: bcm2835: Enable the VC4 graphics driver in the defconfig
ARM: bcm2835: Enable CONFIG_PM.
ARM: bcm2835: Switch BCM2835 to sdhci-iproc.c for MMC
ARM: multi_v7_defconfig: Build in DWC2 USB support
ARM: multi_v7_defconfig: Switch BCM2835 to sdhci-iproc.c for MMC
ARM: multi_v7_defconfig: Add more BCM2835 support
- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
defcongig files
- Attach mvebu_*_defconfig to the mvebu maintainers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlcPzQsACgkQCwYYjhRyO9UpUwCghNZsWe0jSWCZyVbmLS4qCGT/
X3oAn1wc1CeLHFDroMVcCw3aBaTLofUP
=LxX6
-----END PGP SIGNATURE-----
Merge tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "mvebu defconfig for 4.7 (part 1)" from Gregory CLEMENT
- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
defcongig files
- Attach mvebu_*_defconfig to the mvebu maintainers
* tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu_v5_defconfig: Switching to the new Marvell's cryptographic engine driver
ARM: multi_v7_defconfig: Enabling the new Marvell's cryptographic engine driver
MAINTAINERS: attach arch/arm/configs/mvebu_*_defconfig to relevant maintainers
ARM: mvebu_v7_defconfig: Enabling the new Marvell's cryptographic engine driver