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691,473 commits

Author SHA1 Message Date
Bjorn Helgaas
ca620723d4 PCI: Supply CPU physical address (not bus address) to iomem_is_exclusive()
iomem_is_exclusive() requires a CPU physical address, but on some arches we
supplied a PCI bus address instead.

On most arches, pci_resource_to_user(res) returns "res->start", which is a
CPU physical address.  But on microblaze, mips, powerpc, and sparc, it
returns the PCI bus address corresponding to "res->start".

The result is that pci_mmap_resource() may fail when it shouldn't (if the
bus address happens to match an existing resource), or it may succeed when
it should fail (if the resource is exclusive but the bus address doesn't
match it).

Call iomem_is_exclusive() with "res->start", which is always a CPU physical
address, not the result of pci_resource_to_user().

Fixes: e8de1481fd ("resource: allow MMIO exclusivity for device drivers")
Suggested-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Arjan van de Ven <arjan@linux.intel.com>
2016-04-25 15:58:26 -05:00
Masahiro Yamada
fb89cf36b6 arm64: dts: uniphier: add reference clock node for PH1-LD20
Add a master clock node generated by a 25MHz crystal oscillator.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25 22:57:54 +02:00
Masahiro Yamada
b455f0a1cc arm64: dts: uniphier: use Daughter board on PH1-LD20 reference board
Include the development base board, which is equipped with some
devices such as EEPROM.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-04-25 22:57:04 +02:00
Jiri Olsa
6404436a63 perf tools: Make the x86 clean quiet
Turn current clean output:

  $ make clean
  rm -f arch/x86/include/generated/asm/syscalls_64.c
    CLEAN    libbpf
    CLEAN    libapi

into:

  $ make clean
    CLEAN    x86
    CLEAN    libapi
    CLEAN    libbpf

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: TJ <linux@iam.tj>
Link: http://lkml.kernel.org/r/1461615438-27894-1-git-send-email-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-04-25 17:56:15 -03:00
Xing Zheng
fd8bc82933 clk: rockchip: fix the rk3399 cifout clock
The cifout clock is incorrect due to the manual error, we need to
fix it.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:54:51 +02:00
Arnd Bergmann
0a45e16a54 This pull request contains Broadcom ARM64-based SoC Device Tree changes:
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
   DMA, GIC maintenance interrupt, PL022 SPI controller
 
 - Anup also re-orgnanizes the clock Device Tree fragments into a separate file
   for consistency with how other Broadcom SoCs are doing this
 
 - Luke switches the SMP enable-method and reboot from a spin-table + syscon to
   the standard PSCI 1.0 firmware interface
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Merge tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64

Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:

- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
  DMA, GIC maintenance interrupt, PL022 SPI controller

- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
  for consistency with how other Broadcom SoCs are doing this

- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
  the standard PSCI 1.0 firmware interface

* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
  arm64: dts: NS2 secondary core enablement via PSCI
  arm64: dts: Add ARM PL022 SPI DT nodes for NS2
  arm64: dts: Move NS2 clock DT nodes to separate DT file
  arm64: dts: Add maintenance interrupt for GIC in NS2 DT
  arm64: dts: Add ARM PL330 DMA DT node for NS2
2016-04-25 22:54:20 +02:00
David S. Miller
5a5f0792e9 Merge branch 'pskb_extract'
Sowmini Varadhan says:

====================
pskb_extract() helper function.

This patchset follows up on the discussion in
 https://www.mail-archive.com/netdev@vger.kernel.org/msg105090.html

For RDS-TCP, we have to deal with the full gamut of
nonlinear sk_buffs, including all the frag_list variants.
Also, the parent skb has to remain unchanged, while the clone
is queued for Rx on the PF_RDS socket.

Patch 1 of this patchset adds a pskb_extract() function that
does all this without the redundant memcpy's in pskb_expand_head()
and __pskb_pull_tail().

v2: Marcelo Leitner review comments
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:54:15 -04:00
Sowmini Varadhan
947d2756cd RDS: TCP: Call pskb_extract() helper function
rds-stress experiments with request size 256 bytes, 8K acks,
using 16 threads show a 40% improvment when pskb_extract()
replaces the {skb_clone(..); pskb_pull(..); pskb_trim(..);}
pattern in the Rx path, so we leverage the perf gain with
this commit.

Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:54:14 -04:00
Sowmini Varadhan
6fa01ccd88 skbuff: Add pskb_extract() helper function
A pattern of skb usage seen in modules such as RDS-TCP is to
extract `to_copy' bytes from the received TCP segment, starting
at some offset `off' into a new skb `clone'. This is done in
the ->data_ready callback, where the clone skb is queued up for rx on
the PF_RDS socket, while the parent TCP segment is returned unchanged
back to the TCP engine.

The existing code uses the sequence
	clone = skb_clone(..);
	pskb_pull(clone, off, ..);
	pskb_trim(clone, to_copy, ..);
with the intention of discarding the first `off' bytes. However,
skb_clone() + pskb_pull() implies pksb_expand_head(), which ends
up doing a redundant memcpy of bytes that will then get discarded
in __pskb_pull_tail().

To avoid this inefficiency, this commit adds pskb_extract() that
creates the clone, and memcpy's only the relevant header/frag/frag_list
to the start of `clone'. pskb_trim() is then invoked to trim clone
down to the requested to_copy bytes.

Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:54:14 -04:00
Arnd Bergmann
11a138e479 First part of X-Gene DTS changes queued for v4.7.
This patch set only includes a single change to
 fix the compatible string for SATA controllers on
 X-Gene v2 SOC platforms.
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Merge tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next into next/dt64

Merge "First part of X-Gene DTS changes queued for v4.7" from Duc Dang:

This patch set only includes a single change to
fix the compatible string for SATA controllers on
X-Gene v2 SOC platforms.

* tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next:
  arm64: dts: apm: Fix compatible string for X-Gene 2 SATA controller DTS node
2016-04-25 22:53:01 +02:00
Xing Zheng
50961e8314 clk: rockchip: drop unnecessary CLK_IGNORE_UNUSED flags from rk3399
We don't need to many clocks enable after startup, to reduce some
power consumption.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:52:26 +02:00
Arnd Bergmann
04136309a2 ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7
- Reserve memory regions for Hi6220
 - Add sp804 timer node for Hi6220
 - Add cpu and cluster level's low power state for Hi6220
 - Add gpio configuration nodes for Hi6220
 - Add pinctrl configuration nodes for Hi6220
 - Add spi related nodes for Hi6220
 - Add i2c nodes for Hi6220
 - Add i2c nodes to work with mezzanine boards
 - Add usb nodes for Hi6220
 - Add mailobx node for Hi6220
 - Add SRAM node and stub clock node for Hi6220
 - Add pinctrl nodes for uarts and enable them
 - Add LED nodes for hi6220-hikey board
 - Add hi655x pmic node for Hi6220
 - Add dwmmc nodes for Hi6220
 - Add wifi nodes support for Hi6220-Hikey board
 - Register thermal sensor for Hi6220
 - Register Hi6220's thermal zone for power allocator
 - Add L2 cache topology for Hi6220
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Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64

Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu

- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220

* tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add L2 cache topology to Hi6220
  arm64: dts: register Hi6220's thermal zone for power allocator
  arm64: dts: register Hi6220's thermal sensor
  arm64: dts: add wifi nodes support for hi6220-hikey
  arm64: dts: add dwmmc nodes for hi6220
  arm64: dts: hikey: Add hi655x pmic dts node
  arm64: dts: add LED nodes for hi6220-hikey
  arm64: dts: hi6220: add pinctrl for uarts and enable them
  arm64: dts: add Hi6220's stub clock node
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: Add hi6220 usb node
  arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
  arm64: dts: add all hi6220 i2c nodes
  arm64: dts: add Hi6220 spi configuration nodes
  arm64: dts: add Hi6220 pinctrl configuration nodes
  arm64: dts: Add Hi6220 gpio configuration nodes
  arm64: dts: enable idle states for Hi6220
  arm64: dts: add sp804 timer node for Hi6220
  arm64: dts: Reserve memory regions for hi6220
2016-04-25 22:51:50 +02:00
Xing Zheng
aa2897ceb7 clk: rockchip: add some frequencies on the rk3399 PLL table
This patch add some necessary frequencies for the RK3399 clock.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:51:21 +02:00
Arnd Bergmann
408e8fc8fc ARMv8 Juno DT updates for v4.7
Just one update: Support for external expansion bus useful for
 additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)
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Merge tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64

Pull "ARMv8 Juno DT updates for v4.7" from Sudeep Holla:

Just one update: Support for external expansion bus useful for
additional hardware e.g.LogicTile Express daughterboards (Brian Starkey)

* tag 'juno-for-v4.7/dt-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Add external expansion bus to DT
2016-04-25 22:50:23 +02:00
Xing Zheng
3f92a05440 clk: rockchip: assign more necessary rk3399 clock ids
Assign newly added clock ids.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:49:13 +02:00
Arnd Bergmann
a845167df0 arm64: tegra: Changes for v4.7-rc1
A couple of cleanups and fixes to various device trees, enable power and
 volume keys on Jetson TX1, use stdout-path to define the serial port (so
 it doesn't have to be specified on the kernel command-line) and add
 Google Pixel C (a.k.a. Smaug) support.
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Merge tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Changes for v4.7-rc1" from Thierry Reding

A couple of cleanups and fixes to various device trees, enable power and
volume keys on Jetson TX1, use stdout-path to define the serial port (so
it doesn't have to be specified on the kernel command-line) and add
Google Pixel C (a.k.a. Smaug) support.

* tag 'tegra-for-4.7-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Enable cros-ec and charger on Smaug
  arm64: tegra: Add pinmux for Smaug board
  arm64: tegra: Add stdout-path for various boards
  arm64: tegra: Remove unused #power-domain-cells property
  arm64: tegra: Add gpio-keys nodes for Smaug
  arm64: tegra: Enable power and volume keys on Jetson TX1
  arm64: tegra: Add support for Google Pixel C
  arm64: tegra: Replace legacy *,wakeup property with wakeup-source
  arm64: tegra: Fix copy/paste typo in several DTS includes
  arm64: tegra: Remove 0, prefix from unit-addresses
2016-04-25 22:48:51 +02:00
Heiko Stuebner
de87985e42 Merge branch 'v4.7-shared/clkids' into v4.7-clk/next 2016-04-25 22:48:19 +02:00
Arnd Bergmann
318085c748 Samsung Device Tree ARM64 updates and improvements for v4.7:
1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7.
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Merge tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Merge "Samsung Device Tree ARM64 updates and improvements for v4.7" from Krzysztof Kozlowski:

1. Add PL330 DMA controller and Thermal Management Unit to Exynos 7.

* tag 'samsung-dt64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: Add nodes for pdma0 and pdma1 for exynos7
  arm64: dts: exynos: Add TMU node for exynos7
2016-04-25 22:47:43 +02:00
Xing Zheng
55df458439 clk: rockchip: export some necessary rk3399 clock ids
We export some clock IDs for the reference drivers need them.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:47:22 +02:00
Xing Zheng
003e6eb71e clk: rockchip: rename rga clock-id on rk3399
The rga clock supplying the working clock on the rk3399 is actually
called rga-core in the manual. As the clock id has neither been
assigned nor released with a full kernel release, we can still change
the id to the more appropriate naming.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:47:06 +02:00
Xing Zheng
f73b5042b9 clk: rockchip: add general gpu soft-reset on rk3399
Add the id for the general gpu soft-reset, that got documented only in
newer TRM versions.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 22:46:53 +02:00
Michal Kazior
557fc4a098 fq: add fair queuing framework
This works on the same implementation principle as
codel*.h, i.e. there's a generic header with
structures and macros and a implementation header
carrying function definitions to include in given,
e.g. driver or module.

The fairness logic comes from
net/sched/sch_fq_codel.c but is generalized so it
is more flexible and easier to re-use.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:45:53 -04:00
David S. Miller
05d82c4250 Merge branch 'reusable-codel'
Michal Kazior says:

====================
codel: make it reuseable beyond qdiscs

There's an ongoing effort in fixing wireless
bufferbloat. As part of that fq_codel is being
ported into mac80211. To prevent code duplication
codel.h needs to be slightly modified before it
can be used in mac80211 (or other drivers FWIW).

For more background please see:

  https://www.spinics.net/lists/linux-wireless/msg149976.html
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:44:28 -04:00
Michal Kazior
d068ca2ae2 codel: split into multiple files
It was impossible to include codel.h for the
purpose of having access to codel_params or
codel_vars structure definitions and using them
for embedding in other more complex structures.

This splits allows codel.h itself to be treated
like any other header file while codel_qdisc.h and
codel_impl.h contain function definitions with
logic that was previously in codel.h.

This copies over copyrights and doesn't involve
code changes other than adding a few additional
include directives to net/sched/sch*codel.c.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:44:27 -04:00
Michal Kazior
79bdc4c862 codel: generalize the implementation
This strips out qdisc specific bits from the code
and makes it slightly more reusable. Codel will be
used by wireless/mac80211 in the future.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:44:27 -04:00
Phil Sutter
e425974fea macsec: Convert to using IFF_NO_QUEUE
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:21:44 -04:00
Jiri Benc
3d6d30d60a cxgbi: fix uninitialized flowi6
ip6_route_output looks into different fields in the passed flowi6 structure,
yet cxgbi passes garbage in nearly all those fields. Zero the structure out
first.

Fixes: fc8d0590d9 ("libcxgbi: Add ipv6 api to driver")
Signed-off-by: Jiri Benc <jbenc@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:20:49 -04:00
Jiri Benc
0868e2538e route: move lwtunnel state to a single place
Commit 751a587ac9 ("route: fix breakage after moving lwtunnel state")
moved lwtstate to the end of dst_entry for 32bit archs. This makes it share
the cacheline with __refcnt which had an unkown effect on performance. For
this reason, the pointer was kept in place for 64bit archs.

However, later performance measurements showed this is of no concern. It
turns out that every performance sensitive path that accesses lwtstate
accesses also struct rtable or struct rt6_info which share the same cache
line.

Thus, to get rid of a few #ifdefs, move the field to the end of the struct
also for 64bit.

Signed-off-by: Jiri Benc <jbenc@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 16:20:09 -04:00
David S. Miller
6a025a50b5 Merge branch 'qed-next'
Yuval Mintz says:

====================
qed*: driver updates

[Was previous termed 'eeprom access et al.', but seemed a bit
inappropriate given we've dropped the eeprom patch for now.
Still waiting for some inputs on that one, BTW]

This patch series contains some ethtool-related enhancements.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:59:17 -04:00
Sudarsana Reddy Kalluru
a43f235f12 qed: add support for link pause configuration.
The APIs for making this sort of configuration [e.g., via ethtool] are
already present in qede, but the current configuration flow in qed doesn't
respect it.

Signed-off-by: Sudarsana Reddy Kalluru <sudarsana.kalluru@qlogic.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:59:16 -04:00
Yuval Mintz
fe7cd2bfda qed*: Conditions for changing link
There's some inconsistency in current logic determining whether the
link settings of a given interface can be changed; I.e., in all modes
other than the so-called `deault' mode the interfaces are forbidden from
changing the configuration - but even this rule is not applied to all
user APIs that may change the configuration.

Instead, let the core-module [qed] decide whether an interface can change
the configuration by supporting a new API function. We also revise the
current rule, allowing all interfaces to change their configurations while
laying the infrastructure for future modes where an interface would be
blocked from making such a configuration.

Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:59:16 -04:00
Yuval Mintz
f3e72109f0 qede: Add support for ethtool private flags
Adds a getter for the interfaces private flags.
The only parameter currently supported is whether the interface is a
coupled function [required for supporting 100g].

Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:59:15 -04:00
Yuval Mintz
d4967cf38f qed*: Align statistics names
There's a difference in statsitics' names starting at qed and
propagating to qede, where egress counters indicate ranges while ingress
counters indiciate high-end.
Align all statistcs to follow the same conventions - name indicates range.

Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:59:15 -04:00
Xing Zheng
f3d40914d3 clk: rockchip: fix the gate bit for i2c4 and i2c8 on rk3399
The gate bits of the i2c4 and i2c8 are incorrect due to the manual
error, we need to fix them.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-25 21:52:32 +02:00
Eric Dumazet
960a26282f net: better drop monitoring in ip{6}_recv_error()
We should call consume_skb(skb) when skb is properly consumed,
or kfree_skb(skb) when skb must be dropped in error case.

Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:48:10 -04:00
Eric Dumazet
0aea76d35c tcp: SYN packets are now simply consumed
We now have proper per-listener but also per network namespace counters
for SYN packets that might be dropped.

We replace the kfree_skb() by consume_skb() to be drop monitor [1]
friendly, and remove an obsolete comment.
FastOpen SYN packets can carry payload in them just fine.

[1] perf record -a -g -e skb:kfree_skb sleep 1; perf report

Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:48:10 -04:00
Arnaldo Carvalho de Melo
a213b92e15 perf evlist: Decode perf_event_attr->branch_sample_type
While trying to use --call-graph lbr in 'perf trace', since we only are
interested in the callchain for userspace, up to the callchain, I found
that 'perf evlist' is not decoding the branch_sample_type field, fix it.

Before:

  # perf record --call-graph lbr usleep 1
  # perf evlist -v
  cycles:ppp: size: 112, { sample_period, sample_freq }: 4000,
  sample_type: IP|TID|TIME|CALLCHAIN|CPU|PERIOD|BRANCH_STACK,
  disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1,
  precise_ip: 3, sample_id_all: 1, exclude_guest: 1, mmap2: 1,
  comm_exec: 1, branch_sample_type: 51201
                ^^^^^^^^^^^^^^^^^^^^^^^^^

After:

  # perf evlist -v
  cycles:ppp: size: 112, { sample_period, sample_freq }: 4000,
  sample_type: IP|TID|TIME|CALLCHAIN|CPU|PERIOD|BRANCH_STACK,
  disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1,
  precise_ip: 3, sample_id_all: 1, exclude_guest: 1, mmap2: 1,
  comm_exec: 1, branch_sample_type: USER|CALL_STACK|NO_FLAGS|NO_CYCLES
                ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Milian Wolff <milian.wolff@kdab.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-hozai7974u0ulgx13k96fcaw@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-04-25 16:48:01 -03:00
Tejun Heo
264a0ae164 memcg: relocate charge moving from ->attach to ->post_attach
Hello,

So, this ended up a lot simpler than I originally expected.  I tested
it lightly and it seems to work fine.  Petr, can you please test these
two patches w/o the lru drain drop patch and see whether the problem
is gone?

Thanks.
------ 8< ------
If charge moving is used, memcg performs relabeling of the affected
pages from its ->attach callback which is called under both
cgroup_threadgroup_rwsem and thus can't create new kthreads.  This is
fragile as various operations may depend on workqueues making forward
progress which relies on the ability to create new kthreads.

There's no reason to perform charge moving from ->attach which is deep
in the task migration path.  Move it to ->post_attach which is called
after the actual migration is finished and cgroup_threadgroup_rwsem is
dropped.

* move_charge_struct->mm is added and ->can_attach is now responsible
  for pinning and recording the target mm.  mem_cgroup_clear_mc() is
  updated accordingly.  This also simplifies mem_cgroup_move_task().

* mem_cgroup_move_task() is now called from ->post_attach instead of
  ->attach.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Michal Hocko <mhocko@kernel.org>
Debugged-and-tested-by: Petr Mladek <pmladek@suse.com>
Reported-by: Cyril Hrubis <chrubis@suse.cz>
Reported-by: Johannes Weiner <hannes@cmpxchg.org>
Fixes: 1ed1328792 ("sched, cgroup: replace signal_struct->group_rwsem with a global percpu_rwsem")
Cc: <stable@vger.kernel.org> # 4.4+
2016-04-25 15:45:14 -04:00
Tejun Heo
5cf1cacb49 cgroup, cpuset: replace cpuset_post_attach_flush() with cgroup_subsys->post_attach callback
Since e93ad19d05 ("cpuset: make mm migration asynchronous"), cpuset
kicks off asynchronous NUMA node migration if necessary during task
migration and flushes it from cpuset_post_attach_flush() which is
called at the end of __cgroup_procs_write().  This is to avoid
performing migration with cgroup_threadgroup_rwsem write-locked which
can lead to deadlock through dependency on kworker creation.

memcg has a similar issue with charge moving, so let's convert it to
an official callback rather than the current one-off cpuset specific
function.  This patch adds cgroup_subsys->post_attach callback and
makes cpuset register cpuset_post_attach_flush() as its ->post_attach.

The conversion is mostly one-to-one except that the new callback is
called under cgroup_mutex.  This is to guarantee that no other
migration operations are started before ->post_attach callbacks are
finished.  cgroup_mutex is one of the outermost mutex in the system
and has never been and shouldn't be a problem.  We can add specialized
synchronization around __cgroup_procs_write() but I don't think
there's any noticeable benefit.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Michal Hocko <mhocko@kernel.org>
Cc: <stable@vger.kernel.org> # 4.4+ prerequisite for the next patch
2016-04-25 15:45:14 -04:00
Bjorn Helgaas
7f768544c2 Merge branches 'pci/enumeration', 'pci/hotplug', 'pci/misc', 'pci/ntb', 'pci/thunderbolt' and 'pci/virtualization' into next
* pci/enumeration:
  x86/PCI: Refine PCI support check in pcibios_init()

* pci/hotplug:
  PCI: acpiphp_ibm: Avoid uninitialized variable reference

* pci/misc:
  PCI: Fix spelling errors

* pci/ntb:
  PCI: Add DMA alias quirk for mic_x200_dma
  PCI: Add support for multiple DMA aliases
  PCI: Move informational printk to pci_add_dma_alias()
  PCI: Add pci_add_dma_alias() to abstract implementation

* pci/thunderbolt:
  thunderbolt: Support 1st gen Light Ridge controller
  thunderbolt: Fix typos and magic number
  PCI: Add Intel Thunderbolt device IDs

* pci/virtualization:
  PCI: Work around Intel Sunrise Point PCH incorrect ACS capability
  PCI: Reverse standard ACS vs device-specific ACS enabling
  PCI: Mark Intel i40e NIC INTx masking as broken
2016-04-25 14:35:26 -05:00
David S. Miller
841645b5f2 ipv6: Revert optional address flusing on ifdown.
This reverts the following three commits:

70af921db6
799977d9aa
f1705ec197

The feature was ill conceived, has terrible semantics, and has added
nothing but regressions to the already fragile ipv6 stack.

Fixes: f1705ec197 ("net: ipv6: Make address flushing on ifdown optional")
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:33:55 -04:00
Murali Karicheri
1e9f8dcf89 PCI: keystone: Remove unnecessary goto statement
Fix the misuse of goto statement in ks_pcie_get_irq_controller_info() as
simple return is more appropriate for this function.  While at it add an
error log for absence of interrupt controller node.

[bhelgaas: drop "ret" altogether since we always know the return value]
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
2016-04-25 14:23:54 -05:00
Crestez Dan Leonard
fbced0e946 iio: inv_mpu6050: Add explicit support for MPU9150
This device is a package containing a MPU6050-like sensor and an AK8975
magnetometer. The magnetometer component is supported by the existing
ak8975 driver.

This patch also rephrases the Kconfig descriptions.

Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-25 20:19:38 +01:00
Crestez Dan Leonard
bf1eb91274 iio: inv_mpu6050: Add spi_device_id for INV_MPU6500
Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-25 20:19:29 +01:00
Crestez Dan Leonard
cec0154556 iio: inv_mpu6050: Check WHO_AM_I register on probe
This can be used to distinguish mpu6500. This is a warning rather than
an error because the differences are mostly irrelevant and it's nice to
avoid breaking users with slightly incorrect ACPI/DT.

Signed-off-by: Crestez Dan Leonard <leonard.crestez@intel.com>
Acked-by: Ge Gao <ggao@invensense.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-04-25 20:19:15 +01:00
Arnd Bergmann
87411bbcb4 Defconfig ARM64 changes for Exynos based boards for v4.7:
1. Enable the PL330 DMA driver.
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Merge tag 'samsung-defconfig64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/arm64

Merge "Defconfig ARM64 changes for Exynos based boards for v4.7" from Krzysztof Kozlowski:
1. Enable the PL330 DMA driver.

* tag 'samsung-defconfig64-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: defconfig: Enable PL330 DMA controller
2016-04-25 21:17:59 +02:00
Arnd Bergmann
be36ad26b4 ARM: Keystone HOTPLUG and PSCI config update for 4.7
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Merge tag 'keystone_config_for_4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/defconfig

Merge "ARM: Keystone HOTPLUG and PSCI config update for 4.7" from Santosh Shilimkar

* tag 'keystone_config_for_4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: configs: keystone: Add CPU Hotplug related options
2016-04-25 21:12:32 +02:00
David S. Miller
1bc7fe64b6 Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says:

====================
10GbE Intel Wired LAN Driver Updates 2016-04-25

This series contains updates to ixgbe and ixgbevf.

Emil provides several patches, starting with the consolidation of the
logic behind configuring spoof checking.  Fixed an issue which was
causing link issues for backplane devices because x550em_a/x devices
did not have a default value for mac->ops.setup_link.  Refactored the
ethtool stats to bring the logic closer to how ixgbe handles stats and
sets up per-queue stats for ixgbevf.

Mark adds a new register to wait for previous register writes to complete
before issuing a register read, which is needed when slower links are
in use.  Fixed the flow control setup for x550em_a, the incorrect
fc_setup function was being used.

Don added a workaround for empty SFP+ cage crosstalk, since on some
systems the crosstalk could lead to link flap on empty SFP+ cages.

Jake converts ixgbe and ixgbevf to use the BIT() macro.

Alex Duyck adds support for partial GSO segmentation in the case of
tunnels for ixgbe and ixgbevf.  Then preps for HyperV by moving the API
negotiation into mac_ops.

Arnd Bergmann provides a fix for the ARM compile warnings in linux-next
by converting the use of a udelay() to msleep().
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2016-04-25 15:12:06 -04:00
Arnd Bergmann
ccb0f688ea This pull request contains defconfig changes for Broadcom ARM-based SoCs:
- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
   switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller
 
 - Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
   Power Management support, switching sdhci-bcm2835 for sdhci-iproc
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Merge tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux into next/defconfig

Merge "This pull request contains defconfig changes for Broadcom ARM-based SoCs"
from Florian Fainelli:

- Eric enables more BCM2835 peripherals in multi_v7_defconfig: watchdog, I2S,
  switches from the sdhci-bcm2835 to the sdhci-iproc driver, DWC2 USB controller

- Eric also enables more BCM2835 peripherals in bcm2835_defconfig: VC4, NFS root
  Power Management support, switching sdhci-bcm2835 for sdhci-iproc

* tag 'arm-soc/for-4.7/defconfig' of http://github.com/Broadcom/stblinux:
  ARM: bcm2835: Enable NFS root support.
  ARM: bcm2835: Enable the VC4 graphics driver in the defconfig
  ARM: bcm2835: Enable CONFIG_PM.
  ARM: bcm2835: Switch BCM2835 to sdhci-iproc.c for MMC
  ARM: multi_v7_defconfig: Build in DWC2 USB support
  ARM: multi_v7_defconfig: Switch BCM2835 to sdhci-iproc.c for MMC
  ARM: multi_v7_defconfig: Add more BCM2835 support
2016-04-25 21:11:13 +02:00
Arnd Bergmann
dbb2bc9118 mvebu defconfig for 4.7 (part 1)
- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
   defcongig files
 - Attach mvebu_*_defconfig to the mvebu maintainers
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Merge tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu into next/defconfig

Merge "mvebu defconfig for 4.7 (part 1)" from Gregory CLEMENT

- Use the new cryto engine(mv_cesa) in the mvebu and multi-arm
  defcongig files
- Attach mvebu_*_defconfig to the mvebu maintainers

* tag 'mvebu-defconfig-4.7-1' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu_v5_defconfig: Switching to the new Marvell's cryptographic engine driver
  ARM: multi_v7_defconfig: Enabling the new Marvell's cryptographic engine driver
  MAINTAINERS: attach arch/arm/configs/mvebu_*_defconfig to relevant maintainers
  ARM: mvebu_v7_defconfig: Enabling the new Marvell's cryptographic engine driver
2016-04-25 21:10:07 +02:00