Commit graph

982,081 commits

Author SHA1 Message Date
Stephen Boyd
33b52f7cc9 This time we only have a single minor rounding fix for the legacy
Allwinner clock support.
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Merge tag 'sunxi-clk-for-5.8-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner

Pull an Allwinner clk driver fix from Maxime Ripard:

 - a single minor rounding fix for the legacy Allwinner clock support

* tag 'sunxi-clk-for-5.8-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi: Fix incorrect usage of round_down()
2020-05-21 15:47:37 -07:00
Stephen Boyd
fe95d2e92e clk/samsung updates for 5.8
- Regression fixes for exynos542x and exynos5433 SoCs,
  - use of fallthrough; attribute for s3c24xx.
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Merge tag 'clk-v5.8-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-samsung

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Regression fixes for exynos542x and exynos5433 SoCs
 - use of fallthrough; attribute for s3c24xx

* tag 'clk-v5.8-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1
  ARM/SAMSUNG EXYNOS ARM ARCHITECTURES: Use fallthrough;
  clk: samsung: Fix CLK_SMMU_FIMCL3 clock name on Exynos542x
  clk: samsung: Mark top ISP and CAM clocks on Exynos542x as critical
2020-05-21 15:43:32 -07:00
Stephen Boyd
571a6b4755 clk: renesas: Updates for v5.8 (take two)
- A minor fix for the currently unused suspend/resume handling on
     RZ/A1 and RZ/A2,
   - Two more conversions of DT bindings to json-schema.
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Merge tag 'clk-renesas-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

  - A minor fix for the currently unused suspend/resume handling on
    RZ/A1 and RZ/A2
  - Two more conversions of Renesas DT bindings to json-schema

* tag 'clk-renesas-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  dt-bindings: clock: renesas: mstp: Convert to json-schema
  dt-bindings: clock: renesas: div6: Convert to json-schema
  clk: renesas: cpg-mssr: Fix STBCR suspend/resume handling
2020-05-21 15:37:54 -07:00
Navid Emamdoost
c54d481d71 apparmor: Fix use-after-free in aa_audit_rule_init
In the implementation of aa_audit_rule_init(), when aa_label_parse()
fails the allocated memory for rule is released using
aa_audit_rule_free(). But after this release, the return statement
tries to access the label field of the rule which results in
use-after-free. Before releasing the rule, copy errNo and return it
after release.

Fixes: 52e8c38001 ("apparmor: Fix memory leak of rule on error exit path")
Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Xiyu Yang
c6b39f0707 apparmor: Fix aa_label refcnt leak in policy_update
policy_update() invokes begin_current_label_crit_section(), which
returns a reference of the updated aa_label object to "label" with
increased refcount.

When policy_update() returns, "label" becomes invalid, so the refcount
should be decreased to keep refcount balanced.

The reference counting issue happens in one exception handling path of
policy_update(). When aa_may_manage_policy() returns not NULL, the
refcnt increased by begin_current_label_crit_section() is not decreased,
causing a refcnt leak.

Fix this issue by jumping to "end_section" label when
aa_may_manage_policy() returns not NULL.

Fixes: 5ac8c355ae ("apparmor: allow introspecting the loaded policy pre internal transform")
Signed-off-by: Xiyu Yang <xiyuyang19@fudan.edu.cn>
Signed-off-by: Xin Tan <tanxin.ctf@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Xiyu Yang
a0b845ffa0 apparmor: fix potential label refcnt leak in aa_change_profile
aa_change_profile() invokes aa_get_current_label(), which returns
a reference of the current task's label.

According to the comment of aa_get_current_label(), the returned
reference must be put with aa_put_label().
However, when the original object pointed by "label" becomes
unreachable because aa_change_profile() returns or a new object
is assigned to "label", reference count increased by
aa_get_current_label() is not decreased, causing a refcnt leak.

Fix this by calling aa_put_label() before aa_change_profile() return
and dropping unnecessary aa_get_current_label().

Fixes: 9fcf78cca1 ("apparmor: update domain transitions that are subsets of confinement at nnp")
Signed-off-by: Xiyu Yang <xiyuyang19@fudan.edu.cn>
Signed-off-by: Xin Tan <tanxin.ctf@gmail.com>
Signed-off-by: John Johansen <john.johansen@canonical.com>
2020-05-21 15:25:51 -07:00
Arnd Bergmann
ccffeae7af Merge branch 'v5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/fixes
* 'v5.7-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: cmdq: return send msg error code
  arm64: dts: mt8173: fix vcodec-enc clock

Link: https://lore.kernel.org/r/33a0556a-e2a3-7f0b-b09b-4516642a4bfe@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22 00:09:09 +02:00
Arnd Bergmann
ed9dc1df9f i.MX fixes for 5.7, round 2:
One imx6q-bx50v3 device tree change to fix an issue, attempting atomic
 modeset while using HDMI and display port at the same time causes LDB
 clock programming to destroy the programming of HDMI.
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Merge tag 'imx-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.7, round 2:

One imx6q-bx50v3 device tree change to fix an issue, attempting atomic
modeset while using HDMI and display port at the same time causes LDB
clock programming to destroy the programming of HDMI.

* tag 'imx-fixes-5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts/imx6q-bx50v3: Set display interface clock parents

Link: https://lore.kernel.org/r/20200521150719.GB24084@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-22 00:08:40 +02:00
Alan Swanson
78b7dfd9ce drm/amdgpu: resize VRAM BAR for CPU access on gfx10
Try to resize BAR0 to let CPU access all of VRAM on Navi. Syncs
code with previous gfx generations from commit d6895ad39f
("drm/amdgpu: resize VRAM BAR for CPU access v6").

Signed-off-by: Alan Swanson <reiver@improbability.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:01 -04:00
Alex Deucher
d3a3763432 drm/amdgpu: drop navi pcie bw callback
It's not implemented yet so just drop it so the sysfs
pcie bw file returns an appropriate error instead of
garbage.

Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-By: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:01 -04:00
Alex Deucher
d08d692ebb drm/amdgpu: improve error handling in pcie_bw
1. Initialize the counters to 0 in case the callback
   fails to initialize them.
2. The counters don't exist on APUs so return an error
   for them.
3. Return an error if the callback doesn't exist.

Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-By: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 18:00:00 -04:00
Philip Yang
f7646585a3 drm/amdkfd: fix restore worker race condition
In free memory of gpu path, remove bo from validate_list to make sure
restore worker don't access the BO any more, then unregister bo MMU
interval notifier. Otherwise, the restore worker will crash in the
middle of validating BO user pages if MMU interval notifer is gone.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-21 17:59:45 -04:00
Arnd Bergmann
fec6111ae3 ARM64: hisilicon: defconfig updates for 5.8
- Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as
   loadable modules to support UACCE use case for the D06CS board
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Merge tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi into arm/defconfig

ARM64: hisilicon: defconfig updates for 5.8

- Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as
  loadable modules to support UACCE use case for the D06CS board

* tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi:
  arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs

Link: https://lore.kernel.org/r/5EBE4217.6000900@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:56:22 +02:00
Arnd Bergmann
93d2fa6a03 arm64: defconfig: Amlogic updates for v5.8
- enable meson gx audio as module
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Merge tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/defconfig

arm64: defconfig: Amlogic updates for v5.8
- enable meson gx audio as module

* tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: defconfig: enable meson gx audio as module

Link: https://lore.kernel.org/r/5ec6f4f6.1c69fb81.3fe34.b693@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:54:22 +02:00
Arnd Bergmann
72a790ac7c Qualcomm ARM64 defconfig updates for v5.8
This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180
 TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem
 and camera clock drivers and removes the now depricated GLINK_SSR entry.
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Merge tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig

Qualcomm ARM64 defconfig updates for v5.8

This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180
TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem
and camera clock drivers and removes the now depricated GLINK_SSR entry.

* tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: enable Qualcomm IPA and RMNet modules
  arm64: defconfig: Enable Qualcomm SC7180 pinctrl and gcc
  arm64: defconfig: Remove QCOM_GLINK_SSR
  arm64: defconfig: Enable SM8250 GCC driver
  arm64: defconfig: Enable Qualcomm CAMCC, CAMSS and CCI drivers

Link: https://lore.kernel.org/r/20200519052502.1249888-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:53:07 +02:00
Arnd Bergmann
88b1542b06 AT91 defconfig for 5.8
- Add PIOBU and MCP16502 regulator to sama5 defconfig
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Merge tag 'at91-5.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig

AT91 defconfig for 5.8

 - Add PIOBU and MCP16502 regulator to sama5 defconfig

* tag 'at91-5.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: configs: at91: sama5: enable MCP16502 regulator
  ARM: configs: at91: sama5: enable SAMA5D2_PIOBU

Link: https://lore.kernel.org/r/20200518213254.GA26598@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:52:41 +02:00
Arnd Bergmann
6e15f0a9c4 Two patches to enable the new cpufreq support on the H6 for the arm64
defconfig to enable the audio codec in sunxi_defconfig.
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Merge tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig

Two patches to enable the new cpufreq support on the H6 for the arm64
defconfig to enable the audio codec in sunxi_defconfig.

* tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: configs: Enable sun50i cpufreq nvmem
  ARM: configs: sunxi: Add sun8i analog codec

Link: https://lore.kernel.org/r/9fd4d403-f6c8-420d-8b03-62e8485a0b3d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:52:11 +02:00
Arnd Bergmann
c0feb184a7 Renesas ARM defconfig updates for v5.8 (take two)
- Enable support for the new RZ/G1H SoC in the shmobile and multi_v7
     defconfigs.
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Merge tag 'renesas-arm-defconfig-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig

Renesas ARM defconfig updates for v5.8 (take two)

  - Enable support for the new RZ/G1H SoC in the shmobile and multi_v7
    defconfigs.

* tag 'renesas-arm-defconfig-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: multi_v7_defconfig: Enable r8a7742 SoC
  ARM: shmobile: defconfig: Enable r8a7742 SoC

Link: https://lore.kernel.org/r/20200515100547.14671-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:50:18 +02:00
Arnd Bergmann
66fa76a7db Samsung defconfig changes for v5.8
1. Enable drivers for Exynos3250 Rinato Bluetooth,
 2. Build WiFi mac80211 framework as module so it will get loaded the
    same time as regulatory data.
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Merge tag 'samsung-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/defconfig

Samsung defconfig changes for v5.8

1. Enable drivers for Exynos3250 Rinato Bluetooth,
2. Build WiFi mac80211 framework as module so it will get loaded the
   same time as regulatory data.

* tag 'samsung-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: exynos_defconfig: Compile MAC80211/CFG80211 as modules
  ARM: exynos_defconfig: Enable serial bus and BCM HCIUART drivers

Link: https://lore.kernel.org/r/20200512122922.5700-1-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:45:08 +02:00
Arnd Bergmann
016eae21a3 This pull request contains Broadcom ARM-based SoCs defconfig file
updates for v5.8, please pull the following:
 
 - Nicolas enables the fixed-regulator in bcm2835_defconfig which is need
   to control the Raspberry Pi 4 SD car power supply
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Merge tag 'arm-soc/for-5.8/defconfig' of https://github.com/Broadcom/stblinux into arm/defconfig

This pull request contains Broadcom ARM-based SoCs defconfig file
updates for v5.8, please pull the following:

- Nicolas enables the fixed-regulator in bcm2835_defconfig which is need
  to control the Raspberry Pi 4 SD car power supply

* tag 'arm-soc/for-5.8/defconfig' of https://github.com/Broadcom/stblinux:
  ARM: bcm2835_defconfig: Enable fixed-regulator

Link: https://lore.kernel.org/r/20200511210522.28243-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:44:04 +02:00
Arnd Bergmann
929379dd0f Renesas ARM defconfig updates for v5.8
- Refresh shmobile_defconfig for v5.7-rc1.
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Merge tag 'renesas-arm-defconfig-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig

Renesas ARM defconfig updates for v5.8

  - Refresh shmobile_defconfig for v5.7-rc1.

* tag 'renesas-arm-defconfig-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: defconfig: Refresh for v5.7-rc1

Link: https://lore.kernel.org/r/20200430084849.1457-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:43:09 +02:00
Arnd Bergmann
962abbc084 Ux500 defconfig changes for functionality merged in the
v5.7 merge window:
 - Enable drivers for the Golden and Skomer mobile phones.
 - Enable drivers for the HREF520 reference design.
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Merge tag 'ux500-defconfig-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/defconfig

Ux500 defconfig changes for functionality merged in the
v5.7 merge window:
- Enable drivers for the Golden and Skomer mobile phones.
- Enable drivers for the HREF520 reference design.

* tag 'ux500-defconfig-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: defconfig: u8500: Enable new drivers for ux500
  ARM: defconfig: u8500: Enable new drivers for samsung-golden

Link: https://lore.kernel.org/r/CACRpkdaxT8dc=mhAd51+KtQ0K4Uj5tttt36bYJLqP_hNfWXP8w@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:42:35 +02:00
Arnd Bergmann
9eddc06a3b Merge branch 'mmp/fixes' into arm/dt
These were queued for v5.7 as bugfixes, merge them
here as well to resolve the conflicts.

* mmp/fixes:
  ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
  ARM: dts: mmp3-dell-ariel: Fix the SPI devices
  ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:37:22 +02:00
Arnd Bergmann
1a55b4232d Merge branch 'mmp/fixes' into arm/fixes
These three fixes should make it into linux-5.7 and
also into the branch for other mmp dt changes for v5.8,
so I created a branch for them.

* mmp/fixes:
  ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
  ARM: dts: mmp3-dell-ariel: Fix the SPI devices
  ARM: dts: mmp3: Use the MMP3 compatible string for /clocks

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:36:22 +02:00
Lubomir Rintel
24cf6eef79 ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy
"usb-nop-xceiv" is good enough if we don't lose the configuration done
by the firmware, but we'd really prefer a real driver.

Unfortunately, the PHY core is odd in that when the node is compatible
with "usb-nop-xceiv", it ignores the other compatible strings. Let's
just remove it.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:23 +02:00
Lubomir Rintel
233cbffaa0 ARM: dts: mmp3-dell-ariel: Fix the SPI devices
I've managed to get about everything wrong while digging these out of
OEM's board file.

Correct the bus numbers, the exact model of the NOR flash, polarity of
the chip selects and align the SPI frequency with the data sheet.

Tested that it works now, with a slight fix to the PXA SSP driver.

Link: https://lore.kernel.org/r/20200419171157.672999-16-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:23 +02:00
Lubomir Rintel
ec7d12faf8 ARM: dts: mmp3: Use the MMP3 compatible string for /clocks
Clocks are in fact slightly different on MMP3. In particular, PLL2 is
fixed to a different frequency, there's an extra PLL3, and the GPU
clocks are configured differently.

Link: https://lore.kernel.org/r/20200419171157.672999-15-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Cc: <stable@vger.kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:34:22 +02:00
Lubomir Rintel
ed365a4a84 ARM: dts: mmp3: Add the fifth SD HCI
There's one extra SDHCI on MMP3, used by the internal SD card on OLPC
XO-4. Add it to the device tree.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:33:38 +02:00
Lubomir Rintel
dd95b542b7 ARM: dts: berlin*: Fix up the SDHCI node names
The node name preferred by mmc-controller.yaml binding spec is "mmc":

  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab0800: $nodename:0:
      'sdhci@ab0800' does not match '^mmc(@.*)?$'
  berlin2-sony-nsz-gs7.dt.yaml: sdhci@ab1000: $nodename:0:
      'sdhci@ab1000' does not match '^mmc(@.*)?$'
  berlin2cd-google-chromecast.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2cd-valve-steamlink.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab0000: $nodename:0:
      'sdhci@ab0000' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab0800: $nodename:0:
      'sdhci@ab0800' does not match '^mmc(@.*)?$'
  berlin2q-marvell-dmp.dt.yaml: sdhci@ab1000: $nodename:0:
      'sdhci@ab1000' does not match '^mmc(@.*)?$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:46 +02:00
Lubomir Rintel
bbbea1f2a9 ARM: dts: mmp3: Fix USB & USB PHY node names
There are better generic ones and the validation is going to complain:

  mmp3-dell-ariel.dt.yaml: hsic@f0001000: $nodename:0: 'hsic@f0001000'
      does not match '^usb(@.*)?'
  mmp3-dell-ariel.dt.yaml: hsic@f0002000: $nodename:0: 'hsic@f0002000'
      does not match '^usb(@.*)?'
  ...

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:45 +02:00
Lubomir Rintel
7df3a1ee12 ARM: dts: mmp3: Fix L2 cache controller node name
The current one makes validation unhappy:

  mmp3-dell-ariel.dt.yaml: l2-cache-controller@d0020000: $nodename:0:
      'l2-cache-controller@d0020000' does not match
      '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:45 +02:00
Lubomir Rintel
4989fd577d ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  mmp3-dell-ariel.dt.yaml: rtc@d4010000: interrupts: [[1, 0]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:44 +02:00
Lubomir Rintel
2e7167d17b ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  pxa168-aspenite.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short
  pxa910-dkb.dt.yaml: rtc@d4010000: interrupts: [[5, 6]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:44 +02:00
Lubomir Rintel
c911cadfab ARM: dts: pxa910: Fix the gpio interrupt cell number
gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:43 +02:00
Lubomir Rintel
55d26c3844 ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property
This way the device tree validator learns that each cell of the property
constitutes a separate item. Otherwise it gets unnecessairly upset:

  pxa300-raumfeld-speaker-s.dt.yaml: gpio@40e00000: interrupts:
      [[8, 9, 10]] is too short

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr.>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:43 +02:00
Lubomir Rintel
51d6bba661 ARM: dts: pxa168: Fix the gpio interrupt cell number
gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:42 +02:00
Lubomir Rintel
4fade3403e ARM: dts: pxa168: Add missing address/size cells to i2c nodes
This makes the nodes compatible with the generic i2c binding without the
board DTS files having to supply the necessary properties themselves.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:42 +02:00
Lubomir Rintel
a857caa9d9 ARM: dts: dove: Fix interrupt controller node name
The current ones makes validation unhappy:

  dove-d3plug.dt.yaml: main-interrupt-ctrl@20200: $nodename:0:
      'main-interrupt-ctrl@20200' does not match
      '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:41 +02:00
Lubomir Rintel
6656e16353 ARM: dts: kirkwood: Fix interrupt controller node name
The current ones makes validation unhappy:

  kirkwood-lsxhl.dt.yaml: main-interrupt-ctrl@20200: $nodename:0:
    'main-interrupt-ctrl@20200' does not match
    '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:31:41 +02:00
Stanislav Lisovskiy
82ea174dc5 drm/i915: Remove unneeded hack now for CDCLK
No need to bump up CDCLK now, as it is now correctly
calculated, accounting for DBuf BW as BSpec says.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-8-stanislav.lisovskiy@intel.com
2020-05-21 14:16:43 -07:00
Arnd Bergmann
9440d8acb5 RGA node for rk322x, wifi node for rk3229-xms6 and some cleanups.
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Merge tag 'v5.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

RGA node for rk322x, wifi node for rk3229-xms6 and some cleanups.

* tag 'v5.8-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add rga node for rk322x
  ARM: dts: remove disable-wp from rk3229-xms6 emmc
  ARM: dts: enable WLAN for Mecer Xtreme Mini S6
  ARM: dts: rockchip: remove identical #include from rk3288.dtsi
  ARM: dts: rockchip: rename and label gpio-led subnodes

Link: https://lore.kernel.org/r/3735080.6Cexqc3t0Y@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:16:37 +02:00
Stanislav Lisovskiy
cd19154608 drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
According to BSpec max BW per slice is calculated using formula
Max BW = CDCLK * 64. Currently when calculating min CDCLK we
account only per plane requirements, however in order to avoid
FIFO underruns we need to estimate accumulated BW consumed by
all planes(ddb entries basically) residing on that particular
DBuf slice. This will allow us to put CDCLK lower and save power
when we don't need that much bandwidth or gain additional
performance once plane consumption grows.

v2: - Fix long line warning
    - Limited new DBuf bw checks to only gens >= 11

v3: - Lets track used Dbuf bw per slice and per crtc in bw state
      (or may be in DBuf state in future), that way we don't need
      to have all crtcs in state and those only if we detect if
      are actually going to change cdclk, just same way as we
      do with other stuff, i.e intel_atomic_serialize_global_state
      and co. Just as per Ville's paradigm.
    - Made dbuf bw calculation procedure look nicer by introducing
      for_each_dbuf_slice_in_mask - we often will now need to iterate
      slices using mask.
    - According to experimental results CDCLK * 64 accounts for
      overall bandwidth across all dbufs, not per dbuf.

v4: - Fixed missing const(Ville)
    - Removed spurious whitespaces(Ville)
    - Fixed local variable init(reduced scope where not needed)
    - Added some comments about data rate for planar formats
    - Changed struct intel_crtc_bw to intel_dbuf_bw
    - Moved dbuf bw calculation to intel_compute_min_cdclk(Ville)

v5: - Removed unneeded macro

v6: - Prevent too frequent CDCLK switching back and forth:
      Always switch to higher CDCLK when needed to prevent bandwidth
      issues, however don't switch to lower CDCLK earlier than once
      in 30 minutes in order to prevent constant modeset blinking.
      We could of course not switch back at all, however this is
      bad from power consumption point of view.

v7: - Fixed to track cdclk using bw_state, modeset will be now
      triggered only when CDCLK change is really needed.

v8: - Lock global state if bw_state->min_cdclk is changed.
    - Try getting bw_state only if there are crtcs in the commit
      (need to have read-locked global state)

v9: - Do not do Dbuf bw check for gens < 9 - triggers WARN
      as ddb_size is 0.

v10: - Lock global state for older gens as well.

v11: - Define new bw_calc_min_cdclk hook, instead of using
       a condition(Manasi Navare)

v12: - Fixed rebase conflict

v13: - Added spaces after declarations to make checkpatch happy.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520150058.16123-1-stanislav.lisovskiy@intel.com
2020-05-21 14:16:16 -07:00
Stanislav Lisovskiy
8435576b3f drm/i915: Introduce for_each_dbuf_slice_in_mask macro
We quite often need now to iterate only particular dbuf slices
in mask, whether they are active or related to particular crtc.

v2: - Minor code refactoring
v3: - Use enum for max slices instead of macro

Let's make our life a bit easier and use a macro for that.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-6-stanislav.lisovskiy@intel.com
2020-05-21 14:14:56 -07:00
Stanislav Lisovskiy
cf129762ba drm/i915: Plane configuration affects CDCLK in Gen11+
So lets support it.

v2: - Fixed "from" field which got corrupted for some weird reason

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520145945.15997-1-stanislav.lisovskiy@intel.com
2020-05-21 14:14:27 -07:00
Arnd Bergmann
f0c59fd97c New soc variant the rk3326 which is essentially a px30 with only one
display controller and a new board using it, the Odroid Advance Go.
 sdcard regulator for the rockpro64 and a lot of devicetree fixes
 making the dt-binding check a lot happier.
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Merge tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

New soc variant the rk3326 which is essentially a px30 with only one
display controller and a new board using it, the Odroid Advance Go.
sdcard regulator for the rockpro64 and a lot of devicetree fixes
making the dt-binding check a lot happier.

* tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
  arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on rk3326-odroid-go2
  arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position on rk3399
  arm64: dts: rockchip: add bus-width properties to mmc nodes for px30
  arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc emmc node
  arm64: dts: rockchip: rename and label gpio-led subnodes
  arm64: dts: rockchip: fix defines in pd_vio node for rk3399
  arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-orangepi
  arm64: dts: rockchip: fix rtl8211e nodename for rk3399-orangepi
  arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-nanopi4
  arm64: dts: rockchip: fix rtl8211e nodename for rk3399-nanopi4
  arm64: dts: rockchip: fix rtl8211f nodename for rk3328 Beelink A1
  arm64: dts: rockchip: fix phy nodename for rk3328
  include: dt-bindings: rockchip: remove unused defines
  arm64: dts: rockchip: replace RK_FUNC defines in rk3326-odroid-go2
  arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399
  arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts
  arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts
  arm64: dts: rockchip: add Odroid Advance Go
  dt-bindings: Add binding for Hardkernel Odroid Go Advance
  arm64: dts: rockchip: add core devicetree for rk3326
  ...

Link: https://lore.kernel.org/r/1970481.V9vR1fIhX2@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:14:11 +02:00
Stanislav Lisovskiy
9877c37e05 drm/i915: Check plane configuration properly
Checking with hweight8 if plane configuration had
changed seems to be wrong as different plane configs
can result in a same hamming weight.
So lets check the bitmask itself.

v2: Fixed "from" field which got corrupted for some weird reason

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520145827.15887-1-stanislav.lisovskiy@intel.com
2020-05-21 14:14:03 -07:00
Stanislav Lisovskiy
4f0b4352bd drm/i915: Extract cdclk requirements checking to separate function
In Gen11+ whenever we might exceed DBuf bandwidth we might need to
recalculate CDCLK which DBuf bandwidth is scaled with.
Total Dbuf bw used might change based on particular plane needs.

Thus to calculate if cdclk needs to be changed it is not enough
anymore to check plane configuration and plane min cdclk, per DBuf
bw can be calculated only after wm/ddb calculation is done and
all required planes are added into the state. In order to keep
all min_cdclk related checks in one place let's extract it into
separate function, checking and modifying any_ms.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-3-stanislav.lisovskiy@intel.com
2020-05-21 14:13:06 -07:00
Stanislav Lisovskiy
c93b9b2c79 drm/i915: Decouple cdclk calculation from modeset checks
We need to calculate cdclk after watermarks/ddb has been calculated
as with recent hw CDCLK needs to be adjusted accordingly to DBuf
requirements, which is not possible with current code organization.

Setting CDCLK according to DBuf BW requirements and not just rejecting
if it doesn't satisfy BW requirements, will allow us to save power when
it is possible and gain additional bandwidth when it's needed - i.e
boosting both our power management and perfomance capabilities.

This patch is preparation for that, first we now extract modeset
calculation from modeset checks, in order to call it after wm/ddb
has been calculated.

v2: - Extract only intel_modeset_calc_cdclk from intel_modeset_checks
      (Ville Syrjälä)

v3: - Clear plls after intel_modeset_calc_cdclk

v4: - Added r-b from previous revision to commit message

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-2-stanislav.lisovskiy@intel.com
2020-05-21 14:12:32 -07:00
Arnd Bergmann
87b990ab62 mvebu dt64 for 5.8 (part 1)
Armada 3720 based SoC:
 
 + Fix PCIe support allowing to use Compex wifi cards
 
 + Turris MOX board:
   - fix SFP binding
   - forbid SDR104 on SDIO to pass electromagnetic interference certifications
 
 + uDPU board: add i2c recovery support
 
 Armada 8040 based SoC: SolidRun 8040: update phy interface
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Merge tag 'mvebu-dt64-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.8 (part 1)

Armada 3720 based SoC:

+ Fix PCIe support allowing to use Compex wifi cards

+ Turris MOX board:
  - fix SFP binding
  - forbid SDR104 on SDIO to pass electromagnetic interference certifications

+ uDPU board: add i2c recovery support

Armada 8040 based SoC: SolidRun 8040: update phy interface

* tag 'mvebu-dt64-5.8-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: armada-3720-turris-mox: fix SFP binding
  arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposes
  arm64: dts: add uDPU i2c bus recovery
  arm64: dts: marvell: drop i2c timeout-ms property
  arm64: dts: marvell: armada-37xx: Move PCIe max-link-speed property
  arm64: dts: marvell: armada-37xx: Move PCIe comphy handle property
  arm64: dts: marvell: armada-37xx: Set pcie_reset_pin to gpio function
  arm64: dts: update SolidRun Armada 8040 phy interface types

Link: https://lore.kernel.org/r/878shmeffd.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:10:18 +02:00
Arnd Bergmann
65ad1cafe7 mvebu dt for 5.8 (part 1)
Add LCP panel support on ReadyNAS NV+v2
 Add new board: Check Point L-50, kirkwood based SoC router
 Remove unused property 'timeout-ms' in i2c nodes
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Merge tag 'mvebu-dt-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt for 5.8 (part 1)

Add LCP panel support on ReadyNAS NV+v2
Add new board: Check Point L-50, kirkwood based SoC router
Remove unused property 'timeout-ms' in i2c nodes

* tag 'mvebu-dt-5.8-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: kirkwood: ReadyNAS NV+v2: Add LCD panel
  ARM: dts: kirkwood: Add Check Point L-50 board
  ARM: dts: marvell: drop i2c timeout-ms property

Link: https://lore.kernel.org/r/87blmiefgw.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-21 23:09:19 +02:00