Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl7DqaoACgkQAEG6vDF+
4phj+xAAw0pYfFBqH89qx7dl+BgKl4SMpue0WlhUgiZhbBS2RgrlGTW5TfBb6IVa
boU30Vw4rOdPozy7xizC0JnHsoD8PTxWKbA2t6s3VtTra3iGU0gT7wua/rzQ9pC2
yrk7mTMpa6j5FUdTNSkQwr3x5g95K5haTZV2kRZFBNHzgjZmh02BhGmfQ1TX+sbw
4vEde0xi1dOi9/A78gIWSUbvpdniFrYBkOAbMN8bo37KoCvnuvm2OU6t0UF6nj3h
51eKZjWbxxxh5Jj2DyFZzOaEW9T2vIeW6aqoNEinvz9blSUBmX8Dx8n2YZbUVr/O
ZsnfMXwU3SeRlIt4avNguGk0+xQuHAzy+Jls+A/ypTUL1vX8kTwO7Gs6gOZHsQ9n
DwFhoWesk86EQyzBy3t1mmvWU7Ic2YMjfW6WjmWxgccuTfTEbSZ6VAA/TQWQtvop
6xUtUbLJr1yuBshVsoJyO/yR1MoAnVKsOjB+AbiTW+nqs4oAoQ4q6TLti/z20G/k
l3cTdKVC97cqhXa9hEuIP5wTTBJ7uQJ0boR7fvdrfk0doRvEAI5Xh/OyCWKi2SUH
6nqUEtDoXFfUBfqLEj/uETQzHCo2CQPIyubJB0XhWkT+52/0Gi6KHzq6GvNrb7gt
tx27VizSRz1f1nbZ6jYi0MMnyGBjnRw+HIDBuiUU7kgFIGkJheI=
=Z5QL
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno/Vexpress/Fast Models updates for v5.8
Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.
* tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Fix SCPI shared mem node name
arm64: dts: vexpress: Fix VExpress LED names
arm64: dts: juno: Fix GPU interrupt order
arm64: dts: fvp/juno: Fix bus node names
arm64: dts: fvp: Fix SMMU DT node
arm64: dts: fvp/juno: Fix serial node names
arm64: dts: juno: Use proper DT node name for USB
arm64: dts: fvp: Fix ITS node names and #msi-cells
arm64: dts: fvp: Fix GIC child nodes
arm64: dts: juno: Fix GIC child nodes
arm64: dts: fvp: Fix GIC compatible names
arm64: dts: juno: Fix mem-timer
arm64: dts: juno: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed clocks out of bus node
arm64: dts: vexpress: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed devices out of bus node
arm64: dts: fvp/juno: Fix node address fields
Link: https://lore.kernel.org/r/20200519094702.GA32975@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Changing base clock frequency directly impacts TSC Hz but not CPUID.16h
value. An overclocked CPU supporting CPUID.16h and with partial CPUID.15h
support will set TSC KHZ according to "best guess" given by CPUID.16h
relying on tsc_refine_calibration_work to give better numbers later.
tsc_refine_calibration_work will refuse to do its work when the outcome is
off the early TSC KHZ value by more than 1% which is certain to happen on
an overclocked system.
Fix this by adding a tsc_early_khz command line parameter that makes the
kernel skip early TSC calibration and use the given value instead.
This allows the user to provide the expected TSC frequency that is closer
to reality than the one reported by the hardware, enabling
tsc_refine_calibration_work to do meaningful error checking.
[ tglx: Made the variable __initdata as it's only used on init and
removed the error checking in the argument parser because
kstrto*() only stores to the variable if the string is valid ]
Signed-off-by: Krzysztof Piecuch <piecuch@protonmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/O2CpIOrqLZHgNRkfjRpz_LGqnc1ix_seNIiOCvHY4RHoulOVRo6kMXKuLOfBVTi0SMMevg6Go1uZ_cL9fLYtYdTRNH78ChaFaZyG3VAyYz8=@protonmail.com
Remove the loop used to free CardBus resources and replace it with
a yenta_free_res() helper used to release bridge resources explicitly.
Link: https://lore.kernel.org/r/20200520183411.1534621-3-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Use bridge resource definitions instead of using the PCI_BRIDGE_RESOURCES
constant with an integer offeset.
Link: https://lore.kernel.org/r/20200520183411.1534621-2-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Except for Endpoints, we enable PTM at enumeration-time. Previously we did
not account for the fact that Switch Downstream Ports are not permitted to
have a PTM capability; their PTM behavior is controlled by the Upstream
Port (PCIe r5.0, sec 7.9.16). Since Downstream Ports don't have a PTM
capability, we did not mark them as "ptm_enabled", which meant that
pci_enable_ptm() on an Endpoint failed because there was no PTM path to it.
Mark Downstream Ports as "ptm_enabled" if their Upstream Port has PTM
enabled.
Fixes: eec097d431 ("PCI: Add pci_enable_ptm() for drivers to enable PTM on endpoints")
Reported-by: Aditya Paluri <Venkata.AdityaPaluri@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7DYUQbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FWxgP/RgO73BTFzapqi2GO/lC
Jsc/lE9gNpmkuM9kluPrYvDIdDjEgfAehajCmBgkk2nyJnmN0XWSyJWzrAHstaUd
6TKYww43mPtCjPH7mk18DCINTK0yVrrpdpbgy2FQm5/heCQFPsZFWtLPJ23t8wQn
fBJV/JzHjzeaEKf97QPgdTILt/hPSob5PVSdVT+VDC9jp/vnVEAVlc6+58rsH5sZ
eRsGeoA0hUuaKZb7vji8afzyQzjs8Qra+56yhP13eFOtR0Ww1UOvESLWHFzUI91T
yx9qjEDqF4Rw44MWxAxRpwQUU06PiwcIO0Z4ziZ5/FCr+Tseo+yo21B59i+9p112
ihJsQNN18oxAAtyuzv+OxcD3+H7qODvxR0fCdeAWZajeP994P79I4Ddejs+V0KN2
SZmJQmn8Ba8zMPJA7EZAug1IFrNfJ/xOu6KAv6bXpUYc8a5vRyQNqKgBIokry3V+
SDDrHOxu3XhPGR6YmkorJ6EfWdOm1iPs/o5b2GkJZLww6Vd89tIbNsMIDlVCVWaO
R0gImZcpJpO9CLmQvnfKmE9yozIoadCS6lkfaCKuGm+usi5uPFXJqE5AcJ+Yj3/4
fi+MksJOrVwKRpuxr2lMM4GpOVqo7yUZ1iCveNn/GAfw3OVtsef0zL4vk0o4gYvd
Bg0AVo61nTwJ7ef/i8mdlLT8
=ds6R
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.8
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
* tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (68 commits)
arm64: dts: qcom: sc7180: Correct the pdc interrupt ranges
arm64: dts: qcom: sc7180: add IPA information
arm64: dts: qcom: sc7180: Fix ETMv4 power management patch
arm64: dts: qcom: sc7180: Add A618 gpu dt blob
dt-bindings: arm-smmu: Add sc7180 compatible string
arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
arm64: dts: qcom: msm8916: move gpu opp table to gpu node
arm64: dts: qcom: msm8916: avoid using _ in node names
arm64: dts: qcom: c630: Specify UFS device reset
arm64: dts: qcom: c630: Add WiFi node
arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel
arm64: dts: qcom: db820c: Fix invalid pm8994 supplies
arm64: dts: qcom: db820c: Add pmi8994 RPM regulators
arm64: dts: qcom: msm8916: Disable coresight by default
arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area
arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen
arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator
arm64: dts: qcom: msm8916: Add blsp_i2c5
...
Link: https://lore.kernel.org/r/20200519052528.1249950-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board: Microchip SAMA5D2 Industrial Connectivity Platform
- All SoCs are now converted to the new PMC device tree binding
- sama5d2 flexcom nodes are now fully described in sama5d2.dtsi
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEycoQi/giopmpPgB12wIijOdRNOUFAl7CpJMACgkQ2wIijOdR
NOWrAg//cH5TaJ+B/m4oHxfHgLg9qXXdKkLcCYB17YZLMKGbioaye1zBYWyCDJzb
Wz0AS5XNw9xgxA8U/p/okUV/t+TTWkL1/r98MqlBc7aPxk3UIiGVVlKD0rKLu0mW
/OsQwdeR/OyuBfLsspzoqHfhN3N/RZk1nlN2NbykTkHnKuY4CWpsewnJstpA7vl6
TTQgbbbs2VD5H3Fxo2tbSl03Iqbk3rPSzdtsSae4B7Ta4hO0r1xY04C3qe/bboh9
jautvydBnbSrqzbdcyHPh8XzF+TEyrPZzMuz9AD9sY6Zeqap69Aha6OYRe9cspNQ
05rMhvQaWhlvsmR5jAV0lHjnz+nA3sJ81QmBbaH9YOMgr0GhM940pNtjND7yOm1Q
jO20/NWJs8/POv1vIxAE8bKmAnk1ukV8HwcIn5gDaMVJWRuoqYqkCaZ0WfItcx7q
gdkC+k9pUWWscYQy8aZMhN7aqpC+wdLSlrdQ519R1HcpZMJ1K8oIz9h8/Fotgytx
b+KmgEFze6hQ9leZ2GJffDPZbknMsdcHdePk9j1dRyN6f0m33WVvNV4a5HVEmN0A
7ceVzT/5Mvp+pK4aAGPtxtNfKSLSFxyMgteGP+PjMRvnQmFwdQkuLRNb3qBR5XAI
sO+FoBRkgTBe4s+ztmioHBQERmynrbvX/p//FBho9+7y0m9Tt2o=
=EQfX
-----END PGP SIGNATURE-----
Merge tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.8
- New board: Microchip SAMA5D2 Industrial Connectivity Platform
- All SoCs are now converted to the new PMC device tree binding
- sama5d2 flexcom nodes are now fully described in sama5d2.dtsi
* tag 'at91-5.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (35 commits)
ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs
ARM: dts: at91: Configure I2C SCL gpio as open drain
ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function
ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases
ARM: dts: at91: sama5d2_xplained: Add alias for DBGU
ARM: dts: at91: sama5d2: Add missing flexcom definitions
ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions
ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function
ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function
ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions
ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART
ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions
ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0
ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP
...
Link: https://lore.kernel.org/r/20200518212844.GA26356@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7APygXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH61dQ/6AmOSIyRASzUakYIsINERDP2e
OEFRy8aEDo6WG6Ww6Fc93cxb0EigzVEdZV67hTyF6/OuWfzM6UM+TI40ZqBEAbcV
4O/keVh7mT7mSU5Qbx0RkJaimPzIXX6h9otGL5cFlGkCkx4HIrg+WaF44n7mibFI
y4gSTnMQSVHSQk2aU5CNnEyybYk/7L5WoPrciykNpOXKw+LCcZ6dwzyA5uA9PcFy
XTnjoIwdPRSnYKw8MNVGGLe56HS2luWs0Yr4zv1sVZNczNNGcZ3HOTI1m4lrYW2A
aCtLMTYiu+ujTq59fyJ9FocL+2gzwWYcRpr3RbE/ykwnWeDrm4S2hCDd3NpvyqRh
/EYFYzvbPle3+uGlyWu3RNWscoo8J+C/tm3tksiObOmoZ8K8InY2QjaSnqHFPRfQ
lqdNFhsi5mPPpAz1aQYtNFTwAcSZndNQFOGFYdxZZerjIOWw+I45x0O06yVtYN/9
PQSqOoMDlt2Tpyzr9CC7Fso/+e6Z7KsezC3xQhUgvUCJ9CUMmyAn2WgJx9DsVCWi
N+2e1sbaimUf/Ee5i6qDRjDlnTIXulMOZQFYrj30QKuFOqSzduvfW9L5dFSH+/aR
FvtpAogUreYoXvY6frNaHUaUHuo9yOgP/DIIdzAmwL5/Frgb19keQc/RFSGNh+7C
d38+03KUniYJ3Kl1gCw=
=tN8C
-----END PGP SIGNATURE-----
Merge tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
MT2712:
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
* tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8173: Add capacity-dmips-mhz attributes
arm64: dts: mt2712: use non-empty ranges for usb-phy
arm64: dts: mt8173: fix mdp aliases property name
arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
arm64: dts: mediatek: Add I2C support for MT6797 SoC
dt-bindings: i2c: Document I2C controller binding for MT6797 SoC
arm64: dts: mt8173: fix cooling device range
arm64: dts: mediatek: add mt8173 elm and hana board
arm64: dts: mt8173: fix unit name warnings
arm64: dts: mt8173: add uart aliases
dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana
arm64: dts: mt8183: adjust cpuidle target residency
arm64: dts: mt8173: Add gce setting in mmsys and display node
arm64: dts: mt7622: add built-in Wi-Fi device nodes
Link: https://lore.kernel.org/r/2794a8db-c14f-ac34-9e28-9f3700db6c4c@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add proximity sensor and magnetometer to the Samsung Golden
devicetree.
- Add magnetometer and touchscreen to the Samsung Skomer
devicetree.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl7BoYoACgkQQRCzN7AZ
XXM2gA/+N9ni+nocsba5LkXSukYyZnww6ymCjjmlmrhfDkvmKFv1XOqar6zy/oBP
kAvJMvGrHH/17i/3S5CPEDugahKHkc1wD0AvidpTPfF6nomW1JkXZKloK2Cu4DU0
pmAzvpuozIjDzoO+BZKvu33qS5DlT3fjrAQLRmlRjfcf90EkdwTSFy4yQw9WJUwe
C/0w0b3anaGlA9iHuaE8PRzoU7mCPkTe2EJZcCrxyJHGR9shXv2VF9dpDRaE5GUl
LxlpBUuh4sXdivRzs2IAsQ4WNYudXN4o2JpcKTRAGLnygAA6C7vqke4V/QADzjEi
uPU4PPW2mCR8ntKMWTfOq6/pV0Il+Mkqinljbf3ae2NHJtmfrO+HhNk8NLU89gHz
ir2oc5lbLfIYlddeL3OSt1iuBrvTi0+aI0EwPadQlOpomZ7glIOwqPsszwUrsv3q
M12DAJCpyW5DxzXsdTDTvGlA9ph+/gkLiAv7inL5PCQUuOacyfVDADk6juRgCbNB
BnFfl6HxEyiDBFQ2lSiVUq4pq2E65waoBSwdZ3b8ttFmmcuk0INCM9ts3xOANJzQ
Su4+XKZrxRA8VbC1RMm1Hbz8W8AujNZhn32U5jN1CcpXQq5gwtdswANj9gXJu53o
SY2xDrDVSP/O+SlhCCZOEAiVNP5jDCsb/p/SEfhfzU+jBXU7k1k=
=UOo9
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS updates for the v5.8 kernel series:
- Add proximity sensor and magnetometer to the Samsung Golden
devicetree.
- Add magnetometer and touchscreen to the Samsung Skomer
devicetree.
* tag 'ux500-dts-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: Add touchscreen to the Skomer
ARM: dts: ux500: samsung-skomer: Add magnetometer
ARM: dts: ux500: samsung-golden: Add magnetometer
ARM: dts: ux500: samsung-golden: Add proximity sensor
Link: https://lore.kernel.org/r/CACRpkdbukO33SxAZ_yn-1N8=hq3hF5OBOtP_V0fbjRT-fAa87A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Leave the FPGA bridges disabled in base dtsi
- Add fpga2hps and fpga2sdram bridges on base Cyclone5/Arria5 dtsi
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAl6+6cMUHGRpbmd1eWVu
QGtlcm5lbC5vcmcACgkQGZQEC4GjKPQy2w/+KAzDC9PsZ+cx8qcb0t8BmB3N424G
tIIHXD+dITnJomeu+W9Z/BHBTwHTfEnH2jaVjCpIb7bQtm8u2abf/cNz7PLdza5+
6CX+uRWlerq42vWZuJAlT0PmTe1bi03+if7YRW09AlmR8z0LZ5kkyaJWhauPVC/V
8eIvGEoOc75d9r8f+M2w+Q+mq3skIVFJuQyY5pFQCzS2QAgKO6K6gYzj5vTTnDrH
9hZ13tPWTg7GioqoeApfzd2tOTdjADTS33C24/gwroWJuN9VxJnArTwhyfU5mWbQ
SRQKNcPHxJIcITV9vvCY+B6dUG6PqAJzxH3lh2aA3ktpkPMqjLxg1tssrJFUgTK8
NrrmNQ4cw75v0Y9Q0KSsNxiToTABnROTEpPkuNARq3uk3kEjyzxX/9Jp7e/eW/7k
VnOU5x7OgyI8L6AoEmRlnkF4EBmsLrCMlwPBLcoLLNJz+VZ4qiNpShEzlfesqW6Q
1/1FL9xBMH86djma0WT54fZnCWSiIDjORKQ3zbIrNJqkA9CK2Do0X7KCzhsbPHKn
3J9cPxrGBJ+4cprQZj1Uc1rce33JaYQytryNXbfAQat37Sp50sEe1YrtmiMmY/ab
TnzaIGqludJBZr+czrCPq35kjf8WoUfVGuyTT8/zKUsKxl2HYIAEvEs4ebCnLZ+X
a8UTu+xKVlHk/tw=
=UMA8
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_update_for_v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.8
- Leave the FPGA bridges disabled in base dtsi
- Add fpga2hps and fpga2sdram bridges on base Cyclone5/Arria5 dtsi
* tag 'socfpga_dts_update_for_v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
ARM: dts: socfgpa: set bridges status to disabled
Link: https://lore.kernel.org/r/20200515193029.11318-2-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXr7NHgAKCRDj7w1vZxhR
xbhGAQCDavHkpjvq4Hwk/znoS0Y6NvW1JQUyKUWH8K6ah1ZkFwEA5gC0Ac9cbDAk
Q5fZeYl7mPbEL9DI0RphVqHmY2ezXw0=
=WR5/
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
* tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (23 commits)
arm64: dts: allwinner: h6: Add IOMMU
arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
arm64: dts: allwinner: h6: add voltage range to OPP table
arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells
arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64
arm64: dts: allwinner: Sort Pine H64 device-tree nodes
arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
arm64: dts: allwinner: h6: Add thermal trip points/cooling map
arm64: dts: allwinner: h6: Add clock to CPU cores
arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo module
arm64: dts: allwinner: h6: orangepi: Disable OTG mode
arm64: dts: allwinner: h6: orangepi: Add gpio power supply
ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarity
arm64: dts: allwinner: h6: Add msgbox node
arm64: dts: allwinner: a64: Add msgbox node
ARM: dts: sunxi: h3/h5: Add msgbox node
ARM: dts: sunxi: a83t: Add msgbox node
ARM: dts: sun8i-h3: add opp table for mali gpu
...
Link: https://lore.kernel.org/r/cfa66bd9-f74c-4614-9ea5-9ef8546cc571.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a bit of cleanup and CPU frequency scaling support for the
Tegra30 Beaver board.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl6+pQYTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoR+VD/9wS9fQMI3b56vWJa8EKMiIV6XlvDJ/
HGR0ZOcCH25pHcgMrvg/pAa3TISA2dCGnGxd3Ax+5bU9JvVfC7GujiYwa/IaUkZI
7alUKUe4sTG498hfix2XNDcYcnHm4UnPen2/3ehugRe8BW9v1fnQHwrz5NM/RbzX
+EsFA142e74NJ4BcCDsgUHOIU4yWlOVZZi1zP/NbwpNJO4eGV9cXGXVlQfhmtPqZ
Gz+fe4kUPgUDdTijng8eRpoJXytmki/C6grL0bITtkQ0G4AZIWd9pBts3KO4m+bf
tGuOMWfXBQm0HuiNB+5dMj4Twmj4h+U94SUVDw9hBhnYb0cYGhEdFhwfzCxqr+iC
XqY8NsXiKFWnsZUBWDGL5LOIV7qdQnBChizACLLf2qZ5adlRRanPdQRxkFko12pK
EG27dhN5YtRR1eRtNMmeEQIWZBVj6V1Vg2Mm5EReHO8r/GJ06Ic3lh4MMnk/LCL5
lYWbrlOTUrJl2LHMDM0N1fAJg97BLr9ni0VX1+E8bb3bQXyiDbzhEV2rLt4adEDF
0NEY12+/g0XKfxZ0QeC0DjyafHk7WmbO5pHr0FsB5ngc9RB8bfR+8yPvR2E0aiRW
DuKz6Bp4zXgMLQ7Rk72jU5HVNN7DRGPQ4wN3D9XK9wA1RnFVcspPlWTRMEkdzvrW
b+rrQnhnUQ22eg==
=55XZ
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.8-rc1
This contains a bit of cleanup and CPU frequency scaling support for the
Tegra30 Beaver board.
* tag 'tegra-for-5.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra30: beaver: Add CPU Operating Performance Points
ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
ARM: tegra: Kill off "simple-panel" compatibles
Link: https://lore.kernel.org/r/20200515145311.1580134-11-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds bindings for the CSI TPG clock on Tegra210, moves various
clocks from the clock and reset controller to the PMC where their
controls really are, adds bindings for the external memory controller
and video capture controller on Tegra210, as well as CPU frequency
scaling on Tegra20 and Tegra30.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl6+oyATHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoQEBEACKzY70taxOuZRNhlA+/daMDtiSGijV
0dXXTXLmFVxXv742UqQsIXdGwiw7Dg/Gm+3B2j+wgQQbVNCvhUGIjlDXydnKhamd
kkJENp4qqzICfO8PX/Nm2PsKTjKpAzDd3SUTEZS4c8EmeF2hnvycK6t1a/H4pAjw
RwrREIw8q+iv42+mvGIJfLPrrn66jevboSLUXP5EkkXey6rRP+BMh1UrGobX60b6
fLiAx+EHd/Pl9X8QLvHwN3RCk7uuTDfx8VeKToOz+3v82JO2eBnU94GLWsSLcHgo
vSJestoBwDQlUyzpTdFWmm9E0ndwd2OSfbueM+/2Sy1L2CEcxOrNJegmGtE79FKx
zmogIkW4TNshHBajgXcSkJdwHrcKK9znnKCWJylCWQojtz2oQtXoNL54yTsJGu2F
/J1hHZWrgdb5SGb7rOJaf1xe7lqzsygJ442tz+Bd3D3U+tW6I8Qz8ZZIxFg4Riog
4X7gnKN/FrYHJlokD/mPp+S+zeu1z5/q00bk9T2MkvOi+58AZEL0qxbQygPt4JKU
hCHm4aUf6IYmuczD54DM4EWzurZcFNQdbH5q6VJgNjBUahoUdRkeeURJmV4kK9DM
TxY2y6oy1WzkdDIMdw/Oj4FmUhUYaswhzZPJkeXFWJu/VPn15gXcmuNylRSQYGkH
HKjoGRPBgy4lsA==
=sMK0
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.8-rc1
This adds bindings for the CSI TPG clock on Tegra210, moves various
clocks from the clock and reset controller to the PMC where their
controls really are, adds bindings for the external memory controller
and video capture controller on Tegra210, as well as CPU frequency
scaling on Tegra20 and Tegra30.
* tag 'tegra-for-5.8-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: i2c: tegra: Document Tegra210 VI I2C
dt-bindings: tegra: Add VI and CSI bindings
dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
dt-bindings: clock: tegra: Remove PMC clock IDs
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Link: https://lore.kernel.org/r/20200515145311.1580134-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Intel kernel build robot recently pointed out that I missed the
register keyword on this one when I refactored the code to remove local
register variables (which aren't supported by LLVM). GCC's manual
indicates that global register variables must have the register keyword,
As far as I can tell lacking the register keyword causes GCC to ignore
the __asm__ and treat this as a regular variable, but I'm not sure how
that didn't show up as some sort of failure.
Fixes: 52e7c52d2d ("RISC-V: Stop relying on GCC's register allocator's hueristics")
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
shpchp_unconfigure_device() always returned 0, so there's no reason for a
return value. In addition, remove_board() checked the return value for
possible error which is unnecessary.
Convert shpchp_unconfigure_device() to a void function and remove the
return value check. This addresses the following Coccinelle warning:
drivers/pci/hotplug/shpchp_pci.c:66:5-7: Unneeded variable: "rc". Return "0" on line 86
Link: https://lore.kernel.org/r/20200521190457.1066600-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use "true" instead of 1 to initialize "bool use_dma_mrpc". This resolves
the following Coccinelle warning:
drivers/pci/switch/switchtec.c:28:12-24: WARNING: Assignment of 0/1 to bool variable
Link: https://lore.kernel.org/r/20200521200439.1076672-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAl7BzV8eHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGg8EH/A2pXMTxtc96RI4S
sttEsUQqbakFS0Z/2tQPpMGr/qW2e5eHgsTX/a3SiUeZiIXk6f4lMFkMuctzBf7p
X77cNEDwGOEdbtCXTsMcmKSde7sP2zCXsPB8xTWLyE6rnaFRgikwwkeqgkIKhp1h
bvOQV0t9HNGvxGAM0iZeOvQAvFl4vd7nS123/MYbir9cugfQUSJRueQ4BiCiJqVE
6cNA7/vFzDJuFGszzIrJ7HXn/IdQMMWHkvTDjgBw0GZw1mDbGFbfbZwOeTz1ojCt
smUQ4tIFxBa/VA5zx7dOy2P2keHbSVf4VLkZRPcceT7OqVS65ETmFDp+qt5NdWM5
vZ8+7/0=
=CyYH
-----END PGP SIGNATURE-----
Merge tag 'v5.7-rc6' into rdma.git for-next
Linux 5.7-rc6
Conflict in drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c
resolved by deleting dr_cq_event, matching how netdev resolved it.
Required for dependencies in the following patches.
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
Fix kernel-doc of the "srv" parameter to pcie_pme_resume() and
pcie_pme_remove(). Building with W=1 produced these warnings:
drivers/pci/pcie/pme.c:414: warning: Function parameter or member 'srv' not described in 'pcie_pme_resume'
drivers/pci/pcie/pme.c:437: warning: Function parameter or member 'srv' not described in 'pcie_pme_remove'
Link: https://lore.kernel.org/r/1589612414-61682-1-git-send-email-f.fangjian@huawei.com
Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Fix a couple of build warnings.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-----BEGIN PGP SIGNATURE-----
iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAl6+tzkPHG1zdEByZWRo
YXQuY29tAAoJECgfDbjSjVRpV5QH/jx6Jj16Hzwy6YV9caV4QeySWgZrI3y8fWTK
YlKdzmBE3YNJDwdV6EM5lT6hmJNGf392cF8akGk339IemiYJaHPFLt409ubLvfhZ
ejo0zY7NStOd2DZJfPQdissME7bgiLRpNDvaXRofJwZ87yK7nSNbPWVYp0Jz0Rie
BFnx5XOSqyTkOovylHZajHfodl5eHtdAOYI1+6SZH6gA1YKrhdDqB0gdyejXg4EQ
Ijg0oiDovU/bLfvaF+8jZZJvNsy8mouFidF5NJhCzBewQwx49tl2tLVNOQP/PwGF
Yf8DN7zH8yw+hsUbruj5lFKILvY7Rn2RXhp7ikTaUPYnSKUcYgo=
=uvKy
-----END PGP SIGNATURE-----
Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
Pull virtio fixes from Michael Tsirkin:
"Fix a couple of build warnings"
* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
vhost: missing __user tags
vdpasim: remove unused variable 'ret'
Since there will be some changes to how iio_priv_to_dev() is implemented,
it could be that the helper becomes a bit slower, as it will be hidden away
in the IIO core.
But even without that rework, this looks like it can pass the 'indio_dev'
object to ping_read() and obtain the state struct via iio_priv() which is a
preferred practice than going back-n-forth (getting the state-struct, then
using iio_priv_to_dev() to get the indio_dev object back).
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This also removes unused iio_dev pointers.
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Proximity sensor driver based on light/vcnl4000.c code.
For now supports only the single on-demand measurement.
The VCNL3020 is a fully integrated proximity sensor. Fully
integrated means that the infrared emitter is included in the
package. It has 16-bit resolution. It includes a signal
processing IC and features standard I2C communication
interface. It features an interrupt function.
Datasheet: http://www.vishay.com/docs/84150/vcnl3020.pdf
Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Mostly standard i2c driver with some additional led-current option
for vcnl3020.
Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Fix sparse warning:
drivers/xen/pvcalls-back.c:30:3: warning:
symbol 'pvcalls_back_global' was not declared. Should it be static?
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200410115620.33024-1-yuehaibing@huawei.com
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Commit a926f81d2f ("xen/cpuhotplug: Replace cpu_up/down() with
device_online/offline()") replaced cpu_down() with device_offline()
call which requires that the CPU has been registered before. This
registration, however, happens later from topology_init() which
is called as subsys_initcall(). setup_vcpu_hotplug_event(), on the
other hand, is invoked earlier, during arch_initcall().
As result, booting a PV(H) guest with vcpus < maxvcpus causes a crash.
Move setup_vcpu_hotplug_event() (and therefore setup_cpu_watcher()) to
late_initcall(). In addition, instead of performing all offlining steps
in setup_cpu_watcher() simply call disable_hotplug_cpu().
Fixes: a926f81d2f (xen/cpuhotplug: Replace cpu_up/down() with device_online/offline()"
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/1588976923-3667-1-git-send-email-boris.ostrovsky@oracle.com
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
dev_pm_ops is never modified, so mark it const to allow the compiler to
put it in read-only memory.
Before:
text data bss dec hex filename
2457 1668 256 4381 111d drivers/xen/platform-pci.o
After:
text data bss dec hex filename
2681 1444 256 4381 111d drivers/xen/platform-pci.o
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Link: https://lore.kernel.org/r/20200509134755.15038-1-rikard.falkeborn@gmail.com
Reviewed-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
backend_connect() can fail, so switch the device to connected only if
no error occurred.
Fixes: 0a9c75c2c7 ("xen/pvcalls: xenbus state handling")
Cc: stable@vger.kernel.org
Signed-off-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20200511074231.19794-1-jgross@suse.com
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This loop in the error handling code should start a "i - 1" and end at
"i == 0". Currently it starts a "i" and ends at "i == 1". The result
is that it removes one attribute that wasn't created yet, and leaks the
zeroeth attribute.
Fixes: 4e01847c38 ("drm/amdgpu: optimize amdgpu device attribute code")
Acked-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The current codebase makes use of one-element arrays in the following
form:
struct something {
int length;
u8 data[1];
};
struct something *instance;
instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);
but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.
Also, make use of the new struct_size() helper to properly calculate the
size of struct smu10_voltage_dependency_table.
This issue was found with the help of Coccinelle and, audited and fixed
_manually_.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
When disconnect fe from be, something such as unstable clock may cause
garbage occurs.
[How]
Send set avmute at the beginning of disable stream and send reset avmute
at the end of enable stream.
Signed-off-by: Jinze Xu <jinze.xu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
When "max bpc" is set to enable deep color, some modes are removed from
the list if they fail validation on max bpc. These modes should be kept
if they validates fine with lower bpc.
[How]
- Retry with lower bpc in mode validation.
- Same in atomic commit to apply working bpc, not necessarily max bpc.
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Save the correct num vmid during resource creation and fix RN gpuvm
level from 1 to 16 vmid entries.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
The minimum plane size we can support in DML is 16x16. If we try to pass
a 16x16 plane with dynamic pipe split then validation will fail since it
tries to split it into two pipes, each 8x8.
Some userspace doesn't check that the commit fails and because the
commit fails the old state is retained, resulting in corruption.
[How]
Add a workaround to avoid pipe split if any plane is 16x16 or smaller.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
We dropped the delay after changed the cursor functions locking the
entire pipe to locking just the CURSOR registers to fix page flip
stuttering - this introduced cursor stuttering instead, and an underflow
issue.
The cursor update can be delayed indefinitely if the cursor update
repeatedly happens right around VUPDATE.
The underflow issue can happen if we do a viewport update on a pipe
on the same frame where a cursor update happens around VUPDATE - the
old cursor registers are retained which can be in an invalid position.
This can cause a pipe hang and indefinite underflow.
[How]
The complex, ideal solution to the problem would be a software
triple buffering mechanism from the DM layer to program only one cursor
update per frame just before VUPDATE.
The simple workaround until we have that infrastructure in place is
this change - bring back the delay until VUPDATE before locking, but
with some corrections to the calculations.
This didn't work for all timings before because the calculation for
VUPDATE was wrong - it was using the offset from VSTARTUP instead and
didn't correctly handle the case where VUPDATE could be in the back
porch.
Add a new hardware sequencer function to use the existing helper to
calculate the real VUPDATE start and VUPDATE end - VUPDATE can last
multiple lines after all.
Change the udelay to incorporate the width of VUPDATE as well.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
DP training sequence to set SCRAMBLING_DISABLE bit properly based on
training pattern - per DP Spec.
[How]
Update dpcd_pattern.v1_4.SCRAMBLING_DISABLE with 1 for TPS1, TPS2, TPS3,
but not for TPS4.
Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
During the rework for removing the FPU issues, I found the following
warning:
[..] dml_common_defs.o: warning: objtool: dml_round()+0x9: FPU
instruction outside of kernel_fpu_{begin,end}()
This file has a single function that does not need to be in a specific
file. This commit drop dml_common_defs file, and move dml_round function
to dml_inline_defs.
CC: Christian König <christian.koenig@amd.com>
CC: Alexander Deucher <Alexander.Deucher@amd.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Tony Cheng <tony.cheng@amd.com>
CC: Harry Wentland <hwentlan@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Current odm/mpc combine logic to detect which pipes need to split
logically is flawed leading to incorrect pipe merge/split operations
being taken.
This change cleans up the logic and fixes the logical errors.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
Assigning a different DSC resource than the one previosly used is
currently not handled. This causes black screen on mode change when more
than one monitor is connected on some ASICs.
[how]
- Acquire the previously used DSC if available
- Make sure re-program is triggered if new DSC is used
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Only ras supportted need to set MP1 state to prepare for unload before
reloading SMU FW.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Since the PCI bus number retrieved by PCI_BUS_NUM(pdev->devfn)
is wrong.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Under xgmi setup,some sysfs fail to create for the second time of kmd
driver loading. It's due to sysfs nodes are not removed appropriately
in the last unlod time.
Changes of this patch:
1. remove sysfs for dev_attr_xgmi_error
2. remove sysfs_link adev->dev->kobj with target name.
And it only needs to be removed once for a xgmi setup
3. remove sysfs_link hive->kobj with target name
In amdgpu_xgmi_remove_device:
1. amdgpu_xgmi_sysfs_rem_dev_info needs to be run per device
2. amdgpu_xgmi_sysfs_destroy needs to be run on the last node of
device.
v2: initialize array with memset
Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The prompts will contain pci address(segment/bus/port/function),
severity(warn or error) and some keywords(GPU, amdgpu). Also this
address the issue that pci bus retrieved by PCI_BUS_NUM(adev->pdev->devfn)
is wrong.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Testing on a Polaris11 gpu with DCE-11.2 suggests that it
seems to work fine there, so optimistically enable it for
DCE-11 and later.
v2: drop DCE 11.0 hunk. Carrizo (DCE 11.0) has a HW bug where FP16
scaling doesn't work. The upscale and downscale factors were
intended to block those FP16 cases and reject the commit but
nobody ever added those to atomic check. Once those are added
to atomic check, this can be re-enabled.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Expose support for DRM_FORMAT_ABGR16161616F and
DRM_FORMAT_XBGR16161616F to the DRM core, complementing
the already existing xRGB ordered fp16 formats.
These are especially useful for creating presentable
swapchains in Vulkan for VK_FORMAT_R16G16B16A16_SFLOAT.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
