Commit graph

982,081 commits

Author SHA1 Message Date
Gregory CLEMENT
15f794bd97
spi: Fix NULL pointer when setting SPI_CS_HIGH for GPIO CS
Even if the flag use_gpio_descriptors is set, it is possible that
cs_gpiods was not allocated, which leads to a kernel crash.

Reported-by: "kernelci.org bot" <bot@kernelci.org>
Fixes: 3e5ec1db8b ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Link: https://lore.kernel.org/r/20191024141309.22434-1-gregory.clement@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: <stable@vger.kernel.org>
2019-10-25 11:10:25 +01:00
Andy Shevchenko
6fb7427d84
spi: pxa2xx: Introduce temporary variables to increase readability
The current conditional for PCI ID matching is hard to read.
Introduce couple of temporary variables to increase readability
of the code.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20191021103625.4250-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:09:53 +01:00
Pierre-Louis Bossart
4c02a7bd43
ASoC: SOF: Intel: only support INFO_BATCH for legacy platforms
The current position update is not precise enough for PulseAudio to
work reliably with the timer-based scheduling on Baytrail,
Cherrytrail, Broadwell.

Disable the NO_PERIOD_WAKEUP capability and use BATCH to signal that
the position is only reliable and updated during period_elapsed
events.

This will be reverted when the firmware provides a more accurate
position for those platforms.

Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191024210318.30068-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:08:04 +01:00
Pierre-Louis Bossart
27e322fabd
ASoC: SOF: define INFO_ flags in dsp_ops
Currently the INFO_ flags such as PAUSE/NO_PERIOD_WAKEUP are defined
in the SOF PCM core, which doesn't scale. To account for platform
variations, these flags need to be set in DSP ops.

This patch only moves the definitions and does not change any
functionality.

Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191024210318.30068-2-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:07:45 +01:00
Ben Dooks
8c05f6af7b
ASoC: tegra: disable rx_fifo after disable stream
We see odd FIFO overruns with this, we assume the best thing to do is
to disable the RX I2S frontend first, and then disable the FIFO that
is using it.

This also fixes an issue where using multi-word frames (TDM) have
partial samples stuck in the FIFO which then get read out when the
next capture is started.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20191018154833.7560-5-ben.dooks@codethink.co.uk
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:07:33 +01:00
Edward Cragg
0793256368
ASoC: tegra: add a TDM configuration callback
Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform'
driver.

Signed-off-by: Edward Cragg <edward.cragg@codethink.co.uk>
[ben.dooks@codethink.co.uk: merge fix for power management]
[ben.dooks@codethink.co.uk: add review change for fsync of 1 clock]
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20191018154833.7560-2-ben.dooks@codethink.co.uk
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:07:24 +01:00
Geert Uytterhoeven
16c3323532
ASoC: pxa: poodle: Spelling s/enpoints/endpoints/, s/connetion/connection/
Fix misspelling of "endpoints" and "connection".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191024153130.31082-1-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:07:15 +01:00
Geert Uytterhoeven
c19255659b
ASoC: Spelling s/configr/configur/
Fix misspellings of "configuration" and "configure".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191024151603.29043-1-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:06:57 +01:00
Kuninori Morimoto
4baabbf932
ASoC: soc-dpcm: tidyup for_each_dpcm_xx() macro
for_each_dpcm_xx() macro is using "dpcm" as parameter (1),
but, it is also struct member (2).

	#define for_each_dpcm_fe(be, stream, dpcm) \
	list_for_each_entry(dpcm, &(be)->dpcm[stream]...)
	                    ^^^^(1)      ^^^^(2)

Thus, it will be compile error if user not used "dpcm" as parameter

	for_each_dpcm_fe(be, stream, dp)
	                             ^^
This patch fixup it.

Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87tv7x7idx.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:06:35 +01:00
Edward Cragg
f3ee99087c
ASoC: tegra: Allow 24bit and 32bit samples
The tegra3 audio can support 24 and 32 bit sample sizes so add the
option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

Signed-off-by: Edward Cragg <edward.cragg@codethink.co.uk>
[ben.dooks@codethink.co.uk: fixup merge of 24 and 32bit]
[ben.dooks@codethink.co.uk: add pm calls around ytdm config]
[ben.dooks@codethink.co.uk: drop debug printing to dev_dbg]
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20191018154833.7560-3-ben.dooks@codethink.co.uk
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:06:27 +01:00
Curtis Malainey
6442793abf
ASoC: rt5677-spi: fix sparse warnings
Fix bugs reported by kbuild test robot

Fixes: a0e0d13542 ("ASoC: rt5677: Add a PCM device for streaming hotword via SPI")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Link: https://lore.kernel.org/r/20191024184026.183913-1-cujomalainey@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:06:08 +01:00
Colin Ian King
f8a6043570
ASoC: rt5677: Add missing null check for failed allocation of rt5677_dsp
The allocation of rt5677_dsp can potentially fail and return null, so add
a null check and return -ENOMEM on a memory allocation failure.

Addresses-Coverity: ("Dereference null return")
Fixes: a0e0d13542 ("ASoC: rt5677: Add a PCM device for streaming hotword via SPI")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20191024124610.18182-1-colin.king@canonical.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:05:47 +01:00
Andy Shevchenko
67d33aecd0 pinctrl: cherryview: Allocate IRQ chip dynamic
Keeping the IRQ chip definition static shares it with multiple instances
of the GPIO chip in the system. This is bad and now we get this warning
from GPIO library:

"detected irqchip that is shared with multiple gpiochips: please fix the driver."

Hence, move the IRQ chip definition from being driver static into the struct
intel_pinctrl. So a unique IRQ chip is used for each GPIO chip instance.

This patch is heavily based on the attachment to the bug by Christoph Marz.

BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=202543
Fixes: 6e08d6bbeb ("pinctrl: Add Intel Cherryview/Braswell pin controller support")
Depends-on: 83b9dc1131 ("pinctrl: cherryview: Associate IRQ descriptors to irqdomain")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2019-10-25 12:54:10 +03:00
Hans de Goede
6025e2fae3 ACPI: LPSS: Add dmi quirk for skipping _DEP check for some device-links
The iGPU / GFX0 device's _PS0 method on the ASUS T200TA depends on the
I2C1 controller (which is connected to the embedded controller). But unlike
in the T100TA/T100CHI this dependency is not listed in the _DEP of the GFX0
device.

This results in the dev_WARN_ONCE(..., "Transfer while suspended\n") call
in i2c-designware-master.c triggering and the AML code not working as it
should.

This commit fixes this by adding a dmi based quirk mechanism for devices
which miss a _DEP, and adding a quirk for the LNXVIDEO depending on the
I2C1 device on the Asus T200TA.

Fixes: 2d71ee0ce7 ("ACPI / LPSS: Add a device link from the GPU to the BYT I2C5 controller")
Tested-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: 4.20+ <stable@vger.kernel.org> # 4.20+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:47:47 +02:00
Hans de Goede
b3b3519c04 ACPI: LPSS: Add LNXVIDEO -> BYT I2C1 to lpss_device_links
Various Asus Bay Trail devices (T100TA, T100CHI, T200TA) have an embedded
controller connected to I2C1 and the iGPU (LNXVIDEO) _PS0/_PS3 methods
access it, so we need to add a consumer link from LNXVIDEO to I2C1 on
these devices to avoid suspend/resume ordering problems.

Fixes: 2d71ee0ce7 ("ACPI / LPSS: Add a device link from the GPU to the BYT I2C5 controller")
Tested-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: 4.20+ <stable@vger.kernel.org> # 4.20+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:46:01 +02:00
Hans de Goede
cc18735f20 ACPI: LPSS: Add LNXVIDEO -> BYT I2C7 to lpss_device_links
So far on Bay Trail (BYT) we only have been adding a device_link adding
the iGPU (LNXVIDEO) device as consumer for the I2C controller for the
PMIC for I2C5, but the PMIC only uses I2C5 on BYT CR (cost reduced) on
regular BYT platforms I2C7 is used and we were not adding the device_link
sometimes causing resume ordering issues.

This commit adds LNXVIDEO -> BYT I2C7 to the lpss_device_links table,
fixing this.

Fixes: 2d71ee0ce7 ("ACPI / LPSS: Add a device link from the GPU to the BYT I2C5 controller")
Tested-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: 4.20+ <stable@vger.kernel.org> # 4.20+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:45:41 +02:00
Hans de Goede
cefe6aac29 ACPI / PMIC: Add Cherry Trail Crystal Cove PMIC OpRegion driver
We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
Cove Plus" PMIC and talks about Cherry Trail, so presuambly that one
could be used to get register info for the regulators if we need to
implement regulator support in the future.

For now the sole purpose of this driver is to make
intel_soc_pmic_exec_mipi_pmic_seq_element work on devices with a
CHT Crystal Cove PMIC.

Specifically this fixes the following MIPI PMIC sequence related errors
on e.g. an Asus T100HA:

[  178.211801] intel_soc_pmic_exec_mipi_pmic_seq_element: No PMIC registered
[  178.211897] [drm:intel_dsi_dcs_init_backlight_funcs [i915]] *ERROR* mipi_exec_pmic failed, error: -6

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:43:08 +02:00
Hans de Goede
ed852cde25 ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver
Our current Crystal Cove OpRegion driver is only valid for the
Crystal Cove PMIC variant found on Bay Trail (BYT) boards,
Cherry Trail (CHT) based boards use another variant.

At least the regulator registers are different on CHT and these registers
are one of the things controlled by the custom PMIC OpRegion.

Commit 4d9ed62ab1 ("mfd: intel_soc_pmic: Export separate mfd-cell
configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT
devices by removing the "crystal_cove_pmic" MFD cell on CHT devices.

This commit renames the intel_pmic_crc.c driver and the cell to be
prefixed with "byt" to indicate that this code is for BYT devices only.

This is a preparation patch for adding a separate PMIC OpRegion
driver for the CHT variant of the Crystal Cove PMIC (sometimes called
Crystal Cove Plus in Android kernel sources).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:43:08 +02:00
Hans de Goede
a0fcfed138 ACPI / PMIC: Do not register handlers for unhandled OpRegions
For some model PMIC's used on Intel boards we do not know how to
handle the power or thermal opregions because we have no documentation.

For example in the intel_pmic_chtwc.c driver thermal_table_count is 0,
which means that our PMIC_THERMAL_OPREGION_ID handler will always fail
with AE_BAD_PARAMETER, in this case it is better to simply not register
the handler at all.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 11:43:08 +02:00
Christian König
ea7d8c675e drm/ttm: stop exporting ttm_mem_io_* functions
Those are not supposed to be used by drivers.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Link: https://patchwork.freedesktop.org/patch/333290/
2019-10-25 11:40:51 +02:00
Christian König
51ea742c87 drm/qxl: stop using TTM to call driver internal functions
The ttm_mem_io_* functions were intended to be internal to TTM and
shouldn't have been used in a driver. They were exported in commit
afe6804c04 just for QXL.

Instead call the qxl_ttm_io_mem_reserve() function directly and
completely drop the free call since that is a dummy on QXL.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Link: https://patchwork.freedesktop.org/patch/333289/
2019-10-25 11:40:51 +02:00
Christian König
ef38321897 drm/ttm: use the parent resv for ghost objects v3
This way the TTM is destroyed with the correct dma_resv object
locked and we can even pipeline imported BO evictions.

v2: Limit this to only cases when the parent object uses a separate
    reservation object as well. This fixes another OOM problem.
v3: fix init and try_lock on the wrong object

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Link: https://patchwork.freedesktop.org/patch/337499/
2019-10-25 11:40:51 +02:00
Christian König
97588b5b9a drm/ttm: remove pointers to globals
As the name says global memory and bo accounting is global. So it doesn't
make to much sense having pointers to global structures all around the code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Thomas Hellström <thellstrom@vmware.com>
Link: https://patchwork.freedesktop.org/patch/332879/
2019-10-25 11:40:51 +02:00
Christian König
9165fb879f drm/ttm: always keep BOs on the LRU
This allows blocking for BOs to become available
in the memory management.

Amdgpu is doing this for quite a while now during CS. Now
apply the new behavior to all drivers using TTM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Thomas Hellstrom <thellstrom@vmware.com>
Link: https://patchwork.freedesktop.org/patch/332878/
2019-10-25 11:40:50 +02:00
Christian König
7fb03cc3e0 drm/ttm, drm/vmwgfx: move cpu_writers handling into vmwgfx
This feature is only used by vmwgfx and superfluous for everybody else.

Signed-off-by: Christian König <christian.koenig@amd.com>
Co-developed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Tested-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/333650/
2019-10-25 11:40:28 +02:00
Rafael J. Wysocki
a1bb46c36c ACPI: processor: Add QoS requests for all CPUs
The _PPC change notifications from the platform firmware are per-CPU,
so acpi_processor_ppc_init() needs to add a frequency QoS request
for each CPU covered by a cpufreq policy to take all of them into
account.

Even though ACPI thermal control of CPUs sets frequency limits
per processor package, it also needs a frequency QoS request for each
CPU in a cpufreq policy in case some of them are taken offline and
the frequency limit needs to be set through the remaining online
ones (this is slightly excessive, because all CPUs covered by one
cpufreq policy will set the same frequency limit through their QoS
requests, but it is not incorrect).

Modify the code in accordance with the above observations.

Fixes: d15ce41273 ("ACPI: cpufreq: Switch to QoS requests instead of cpufreq notifier")
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-25 11:33:48 +02:00
Eugen Hristev
1860523df3 ARM: dts: at91: sama5d4_xplained: add digital filter for i2c
Add property for digital filter for i2c0 node sama5d4_xplained

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1568189911-31641-10-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-10-25 11:31:21 +02:00
Eugen Hristev
2789034c1b ARM: dts: at91: sama5d2_xplained: add analog and digital filter for i2c
Add property for analog and digital filter for i2c1 and i2c2 nodes
for sama5d2_xplained

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1568189911-31641-9-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-10-25 11:30:36 +02:00
Marek Szyprowski
e9323b664c clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume
Properly save and restore all top PLL related configuration registers
during suspend/resume cycle. So far driver only handled EPLL and RPLL
clocks, all other were reset to default values after suspend/resume cycle.
This caused for example lower G3D (MALI Panfrost) performance after system
resume, even if performance governor has been selected.

Reported-by: Reported-by: Marian Mihailescu <mihailescu2m@gmail.com>
Fixes: 773424326b ("clk: samsung: exynos5420: add more registers to restore list")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2019-10-25 11:20:00 +02:00
Abhishek Shah
9415743e4c PCI: iproc: Invalidate PAXB address mapping before programming it
Invalidate PAXB inbound/outbound address mapping on probe before
programming it.

Kernel relies on outbound/inbound windows VALID bit in OARR registers to
detect if a window was programmed and if it is set it does not overwrite
it.

This causes issues on soft reboot (eg kexec) since the host controller
does not go through a HW reset on softboot so the kernel detects valid
outbound/inbound windows configuration and is not able to reprogramme
it as expected.

Therefore, in order to make sure outbound/inbound windows are
reprogrammed on soft reboot (eg kexec), invalidate memory windows on
each probe to fix the issue.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-10-25 10:18:00 +01:00
Peng Fan
7858d31bef clk: imx: imx8mq: mark sys1/2_pll as fixed clock
According Architecture definition guide, SYS1_PLL is fixed at
800MHz, SYS2_PLL is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:07:08 +08:00
Peng Fan
3f44344868 clk: imx: imx8mn: mark sys_pll1/2 as fixed clock
According Architecture definition guide, SYS_PLL1 is fixed at
800MHz, SYS_PLL2 is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:07:05 +08:00
Peng Fan
c332481f62 clk: imx: imx8mm: mark sys_pll1/2 as fixed clock
According Architecture definition guide, SYS_PLL1 is fixed at
800MHz, SYS_PLL2 is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:06:47 +08:00
Leonard Crestez
e8688fe8df clk: imx8mn: Define gates for pll1/2 fixed dividers
On imx8mn there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate. Only one of these gates (the one "dividing" by
one) is currently defined and it's incorrectly set as the parent of all
the fixed-factor dividers.

Add the other 8 gates to the clock tree between sys_pll1/2_bypass and
the fixed dividers.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:03:19 +08:00
Leonard Crestez
3e4947acad clk: imx8mm: Define gates for pll1/2 fixed dividers
On imx8mm there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate. Only one of these gates (the one "dividing" by
one) is currently defined and it's incorrectly set as the parent of all
the fixed-factor dividers.

Add the other 8 gates to the clock tree between sys_pll1/2_bypass and
the fixed dividers.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:03:16 +08:00
Leonard Crestez
b04383b6a5 clk: imx8mq: Define gates for pll1/2 fixed dividers
On imx8mq there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate but these gates are not currently defined in
the clock tree.

Add them between sys1/2_pll_out and the fixed dividers.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 17:03:00 +08:00
Yuantian Tang
7eb3894b2f arm64: dts: ls1028a: fix a compatible issue
The I2C multiplexer used on ls1028aqds is PCA9547, not PCA9847.
If the wrong compatible was used, this chip will not be able to
be probed correctly and hence fail to work.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Fixes: 8897f3255c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 16:59:22 +08:00
Borislav Petkov
0f42c1ad44 x86/ftrace: Get rid of function_hook
History lesson courtesy of Steve:

"When ftrace first was introduced to the kernel, it used gcc's
mcount profiling mechanism. The mcount mechanism would add a call to
"mcount" at the start of every function but after the stack frame was
set up. Later, in gcc 4.6, gcc introduced -mfentry, that would create a
call to "__fentry__" instead of "mcount", before the stack frame was
set up. In order to handle both cases, ftrace defined a macro
"function_hook" that would be either "mcount" or "__fentry__" depending
on which one was being used.

The Linux kernel no longer supports the "mcount" method, thus there's
no reason to keep the "function_hook" define around. Simply use
"__fentry__", as there is no ambiguity to the name anymore."

Drop it everywhere.

Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Jiri Slaby <jslaby@suse.cz>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: x86@kernel.org
Link: http://lkml.kernel.org/r/20191018124800.0a7006bb@gandalf.local.home
2019-10-25 10:52:22 +02:00
Lukasz Majewski
0f3a10687b ARM: dts: Disable DMA support on the BK4 vf610 device's fsl_lpuart
This change disables the DMA support (RX/TX) on the NXP's fsl_lpuart
driver - the PIO mode is used instead. This change is necessary for better
robustness of BK4's device use cases with many potentially interrupted
short serial transfers.

Without it the driver hangs when some distortion happens on UART lines.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25 16:52:13 +08:00
Yin Fengwei
fa583f71a9 ACPI: processor_idle: Skip dummy wait if kernel is in guest
In function acpi_idle_do_entry(), an ioport access is used for
dummy wait to guarantee hardware behavior. But it could trigger
unnecessary VMexit if kernel is running as guest in virtualization
environment.

If it's in virtualization environment, the deeper C state enter
operation (inb()) will trap to hypervisor. It's not needed to do
dummy wait after the inb() call. So we could just remove the
dummy io port access to avoid unnecessary VMexit.

And keep dummy io port access to maintain timing for native
environment.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-10-25 10:33:20 +02:00
Kalle Valo
03029ed42f Patches intended for v5.5
* Revamp the debugging infrastructure;
 * Some udpdates to FW API commands;
 * Fix max amsdu value calculation;
 * Small updates in the debugging infra;
 * Some new helper functions;
 * A few clean-ups;
 * Other small fixes and improvements;
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEF3LNfgb2BPWm68smoUecoho8xfoFAl2yoD8ACgkQoUecoho8
 xfqsTRAArazf4iCYEpGv+bDDdVFIoEdr71Sgg2j+je3hCPRNs3goudByQZW15mt5
 C7QresPbmKmc+49ReMBM/YxDP2WUm7pRrug10MoPTGA4a7ELtVldAAY+zA7t8c/l
 9kMNpdE5iWu5gWRO14odHAmpd9sOb0dOZh/42hqF/e6Lv08jDAo8rR12Wdv6ldA8
 tVJ72Lv7sT9Vc7GxvK2y7oU4+DQXSKi5e5XThswAHqxpGwzpO94+rSnudfPgyNA1
 Ffau2rEULU9cbN7fcZ7/4LTLsU/WHvxjJBPW7GPxph5VbCz2lFRsrMGL9tL9e+4r
 ufRYJG7u7eLuZ234mnaQ5si7DkmDU6iV+hxMqto0y7v/ZifUDVlR6xVB/8RCSv+2
 IwzAoqYrTbMlaS3Kg7Ur8xCmBcidbkvrERDkjOY+RqKPnW+1PnnkRw0R4hTCdl13
 AKRQVUI4Z9B+eK4DYaxUECx6nmDsSxnWPSrRBZM/fB6xMBRlfoxEWzsSG7Vswxub
 JAh0u5UGBl67j4mLlcJPXBkCIQ7jv5bIF/emNT5RqGcFfevvAKQ0M03DDDEoZ0zL
 bvMnRI+5kRTXb9NYWCCsENYI+YzAOhyvknU8yBeG8oS+5qRelwAQ+2yDBdE/zg2j
 EgSLAPy0KLM5QgNDcMLx7DbjlcuK2cjrCWpCgLidLS721RKsvHg=
 =IarC
 -----END PGP SIGNATURE-----

Merge tag 'iwlwifi-next-for-kalle-2019-10-18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-next

Patches intended for v5.5

* Revamp the debugging infrastructure;
* Some udpdates to FW API commands;
* Fix max amsdu value calculation;
* Small updates in the debugging infra;
* Some new helper functions;
* A few clean-ups;
* Other small fixes and improvements;
2019-10-25 10:42:15 +03:00
Yan-Hsuan Chuang
5c70e97142 rtw88: fix GENMASK_ULL for u64
This fixes compile warning:

    In file included from include/linux/bitops.h:5:0,
                     from include/linux/kernel.h:12,
                     from include/asm-generic/bug.h:19,
                     from arch/mips/include/asm/bug.h:42,
                     from include/linux/bug.h:5,
                     from include/net/mac80211.h:16,
                     from drivers/net/wireless/realtek/rtw88/main.h:8,
                     from drivers/net/wireless/realtek/rtw88/main.c:5:
    drivers/net/wireless/realtek/rtw88/main.c: In function 'rtw_update_rate_mask':
      include/linux/bits.h:23:11: warning: right shift count is negative
      [-Wshift-count-negative]
       (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
               ^
    drivers/net/wireless/realtek/rtw88/main.c:622:17: note: in expansion of macro 'GENMASK'
      u64 cfg_mask = GENMASK(63, 0);
                     ^~~~~~~

Reported-by: kbuild test robot <lkp@intel.com>
Fixes: f39e9bd49a ("rtw88: add set_bitrate_mask support")
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-10-25 10:38:43 +03:00
Bhanusree
c6a5f8daff drm/gpu: Fix Memory barrier without comment Issue
-Issue found using checkpatch.pl
-Insert comments for memory barrier usage

Signed-off-by: Bhanusree <bhanusreemahesh@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1571984858-4644-1-git-send-email-bhanusreemahesh@gmail.com
2019-10-25 09:35:06 +02:00
Bhanusree
e109c6db52 drm/gpu: Fix Missing blank line after declarations
-Insert a blank line after the declarations.
-Issue found using checkpatch.pl

Signed-off-by: Bhanusree <bhanusreemahesh@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1571984833-4596-1-git-send-email-bhanusreemahesh@gmail.com
2019-10-25 09:34:46 +02:00
Tova Mussai
65b9425ce9 iwlwifi: rx: use new api to get band from rx mpdu
The FW introduce new API to get the band from the rx mpdu,
use this new API.

Signed-off-by: Tova Mussai <tova.mussai@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:28 +03:00
Tova Mussai
e878325a80 iwlwifi: nvm: create function to convert channel index to nl80211_band
Create function to convert channel index to nl80211_band
and use it.

Signed-off-by: Tova Mussai <tova.mussai@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:26 +03:00
Tova Mussai
d558b7f834 iwlwifi: mvm: Invert the condition for OFDM rate
OFDM rate used for all bands except to band 2.4 which use CCK rate.
Inverting the condition help that in future we won't need to expand the
condition for more bands.

Signed-off-by: Tova Mussai <tova.mussai@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:24 +03:00
Tova Mussai
3717f91a81 iwlwifi: mvm: create function to convert nl80211 band to phy band
Create the function and use it.

Signed-off-by: Tova Mussai <tova.mussai@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:21 +03:00
Shahar S Matityahu
6abe1e2e39 iwlwifi: dbg_ini: use vzalloc to allocate dumping memory regions
During dump flow, the driver allocates spaces to store the memory
regions that will be included in the dump. These regions can be very
large so in order to avoid allocation failure, use vzalloc instead.
The kmalloc uses GFP_KERNEL and the driver does not make any use of the
fact that the memory is contiguous so the same functionality is
maintained.

Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:19 +03:00
Shahar S Matityahu
3b445ed9b7 iwlwifi: dbg_ini: add user trigger support
Allow to fire user trigger in ini mode

Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
2019-10-25 10:10:17 +03:00