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982,081 commits

Author SHA1 Message Date
Bart Van Assche
dd93b14370 scsi: qla2xxx: Fix a recently introduced kernel warning
According to the firmware documentation a status type 0 IOCB can be
followed by one or more status continuation type 0 IOCBs. Hence do not
complain if the completion function is not called from inside the status
type 0 IOCB handler.

WARNING: CPU: 10 PID: 425 at drivers/scsi/qla2xxx/qla_isr.c:2784
qla2x00_status_entry.isra.7+0x484/0x17b0 [qla2xxx]
CPU: 10 PID: 425 Comm: kworker/10:1 Tainted: G            E     5.3.0-rc4-next-20190813-autotest-autotest #1
Workqueue: qla2xxx_wq qla25xx_free_rsp_que [qla2xxx]
Call Trace:
 qla2x00_status_entry.isra.7+0x1484/0x17b0 [qla2xxx] (unreliable)
 qla24xx_process_response_queue+0x7d8/0xbd0 [qla2xxx]
 qla25xx_free_rsp_que+0x1a0/0x220 [qla2xxx]
 process_one_work+0x25c/0x520
 worker_thread+0x8c/0x5e0
 kthread+0x154/0x1a0
 ret_from_kernel_thread+0x5c/0x7c

Cc: Himanshu Madhani <hmadhani@marvell.com>
Cc: Abdul Haleem <abdhalee@linux.vnet.ibm.com>
Reported-by: Abdul Haleem <abdhalee@linux.vnet.ibm.com>
Signed-off-by: Bart Van Assche <bvanassche@acm.org>
Tested-by: Abdul Haleem <abdhalee@linux.vnet.ibm.com>
Reviewed-by: Lee Duncan <lduncan@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-29 17:52:39 -04:00
Stanley Chu
b557217c84 scsi: ufs: fix broken hba->outstanding_tasks
Currently bits in hba->outstanding_tasks are cleared only after their
corresponding task management commands are successfully done by
__ufshcd_issue_tm_cmd().

If timeout happens in a task management command, its corresponding bit in
hba->outstanding_tasks will not be cleared until next task management
command with the same tag used successfully finishes.

This is wrong and can lead to some issues, like power issue.  For example,
ufshcd_release() and ufshcd_gate_work() will do nothing if
hba->outstanding_tasks is not zero even if both UFS host and devices are
actually idle.

Solution is referred from error handling of device commands: bits in
hba->outstanding_tasks shall be cleared regardless of their execution
results.

Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-29 17:47:23 -04:00
Colin Ian King
e8fd0b9f6f scsi: fcoe: remove redundant call to skb_transport_header
Pointer fh is being assigned a return value from the call to
skb_transport_header however this value is never read and fh is being
re-assigned immediately afterwards with a new value.  Since there are
side-effects from calling skb_transport_header the call is redundant and
can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-29 17:44:25 -04:00
Anil Varughese
e55f24ffa9 scsi: ufs: Disable local LCC in .link_startup_notify() in Cadence UFS
Some UFS devices have issues if LCC is enabled. So we are setting
PA_LOCAL_TX_LCC_Enable to 0 before link startup which will make sure that
both host and device TX LCC are disabled once link startup is completed.

Signed-off-by: Anil Varughese <aniljoy@cadence.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-29 17:42:52 -04:00
Stephen Boyd
c8a144b250 Input: i8042 - enable wakeup on a stable struct device
We don't know when the device will be added with device_add() in
serio_add_port() because serio_add_port() is called from a workqueue
that this driver schedules by calling serio_register_port(). The best we
can know is that the device will definitely not have been added yet when
the start callback is called on the serio device.

While it hasn't been shown to be a problem, proactively move the wakeup
enabling calls to the start hook so that we don't race with the
workqueue calling device_add(). This will avoid racy situations where
code tries to add wakeup sysfs attributes for this device from
dpm_sysfs_add() but the path in device_set_wakeup_capable() has already
done so.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2019-08-29 14:42:11 -07:00
Colin Ian King
5f6b4e1e09 scsi: bfa: remove redundant assignment to variable error
Variable error is being initialized with a value that is never read and
error is being re-assigned a little later on. The assignment is redundant
and hence can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-29 17:41:24 -04:00
Manasi Navare
66d9cec8a6 drm/i915/display: Move the commit_tail() disable sequence to separate function
Create a new function intel_commit_modeset_disables() consistent
with the naming in drm atomic helpers and similar to the enable function.
This helps better organize the disable sequence in atomic_commit_tail()

No functional change

v4:
* Do not create a function pointer, just a function (Maarten)
v3:
* Rebase (Manasi)
v2:
* Create a helper for old_crtc_state disables (Lucas)

Suggested-by: Daniel Vetter <daniel.vetter@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190828224701.422-1-manasi.d.navare@intel.com
2019-08-29 14:15:29 -07:00
Manasi Navare
0c84127102 drm/i915/display: Rename update_crtcs() to commit_modeset_enables()
This patch has no functional changes. This just renames the update_crtcs()
hooks to commit_modeset_enables() to match the drm_atomic helper naming
conventions.

v2:
* Rebase on drm-tip

Suggested-by: Daniel Vetter <daniel.vetter@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190827221735.29351-2-manasi.d.navare@intel.com
2019-08-29 14:15:29 -07:00
Matthew Auld
31444afb46 drm/i915: s/for_each_sgt_dma/for_each_sgt_daddr/
The sg_table for our backing store might contain addresses from
stolen-memory or in the future local-memory, at which point this is no
longer a dma-iterator. As a consequence we should now break on NULL
iter.sgp, instead of dmap == 0 which is considered an invalid dma
address.

As a bonus, gcc much prefers this construct,

  Function                                     old     new   delta
  gen8_ggtt_insert_entries                     211     192     -19
  gen6_ggtt_insert_entries                     292     262     -30
  i915_error_object_create                     996     954     -42

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190829201919.21493-1-matthew.auld@intel.com
2019-08-29 21:59:16 +01:00
Roman Li
e1c14c4339 drm/amdgpu: Enable DC on Renoir
Enable DC support for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:34 -05:00
Roman Li
542816ff16 drm/amd/display: Add DCN2.1 changes to DML
Hook up the DML changes for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:34 -05:00
Roman Li
f82effc4e5 drm/amd/display: Correct order of RV family clk managers for Renoir
Need to check for renoir first.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
07842d54b9 drm/amd/display: add Renoir to kconfig
Add a kconfig option to enable renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
25f9955b15 drm/amd/display: build dcn21 blocks
Enable the building of dcn21 support.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
aa91916770 drm/amd/display: add dcn21 core DC changes
Add missing parameters, to make dcn21 compile
without errors

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
dd44a63386 drm/amd/display: add dal_asic_id for renoir
Add the rev id for renoir.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
1b2c7b2c6d drm/amd/display: call update_bw_bounding_box
call update_bw_bounding_box in DC construct

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
30221ad875 drm/amd/display: Handle Renoir in amdgpu_dm (v2)
Hook up renoir support to KMS.

v2: squash in "Fixes for Renoir in amdgpu_dm"

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
e22ece54ee drm/amd/display: Handle Renoir in DC
add Renoir DCN version in DC and handle it

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
aad37f2606 drm/amd/display: Fix register names
rename VM_CONTEXT0 to  MMVM_CONTEXT0 as that is the name defined in
the register files

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
b04641a3f4 drm/amd/display: Add Renoir DML
DML provides the display configuration validation as provided
by the hw teams.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
64ce485c48 drm/amd/display: Add Renoir GPIO
Misc display related configuration details.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
6f4e6361c3 drm/amd/display: Add Renoir resource (v2)
Manages the renoir display resources (crtcs, phys, plls, etc.).

v2: rebase (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
4edb6fc918 drm/amd/display: Add Renoir clock manager
Controls display clocks and interfaces with powerplay for
clock and power requirements.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
6f451b60e0 drm/amd/display: Add Renoir Hubbub (v2)
Controls the display hw's interface to memory.

v2: rebase (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
35b82ba8f2 drm/amd/display: Add Renoir hubbub registers list
These are the registers used to program the hubbub hw.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
eced51f9ba drm/amd/display: Add hubp block for Renoir (v2)
This provides the interface to memory for the display hw.

v2: minor cleanup (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
1e768c5b0f drm/amd/display: Add Renoir irq_services (v2)
Provides the interface to configure display interrrupts on renoir.

v2: rebase fix (Alex)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
82f9146832 drm/amd/display: Add pp_smu functions for Renoir
This defines the interface for communicating requirements
between DC and powerplay.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:33 -05:00
Bhawanpreet Lakha
ab61831227 drm/amd/display: Add Renoir hw_seq register list
These are the registers used to for the hw sequences
for modesetting.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Bhawanpreet Lakha
ff54ecb095 drm/amd/display: Add Renoir clock registers list
These are the registers used to program the clock hw.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Bhawanpreet Lakha
b593bce59b drm/amd/display: Add Renoir registers (v3)
add registers for dcn, clk, and renoir ip offsets

v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Prike Liang
eee3258e8f drm/amd/powerplay: add the interface for getting ultimate frequency v3
add the get_dpm_ultimate_freq for supporting different swSMU.
-v2:
        Handle the unsupported clock type and read smc message failed case and return error code.
        Move the smu12 uclk frequency retrieved logic to renoir ppt.
-v3:
        Use goto clause to handle invalidate clk index.
        Add the limited tag for smu_get_dpm_uclk to avoid other likewise interface introduced.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Prike Liang
296ae1038d drm/amd/powerplay: enable populate DPM clocks table for swSMU APU
Should populate DPM clocks tables during hw init,otherwise will
suffer from invalidate table.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Prike Liang
ffe61cd642 drm/amd/powerplay: regards the APU always enable the dpm feature mask
There is no driver message to enable/disable feature mask for APU.
For the sake of APU reusing swSMU interface and assume APU supports all
the feature.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Prike Liang
334ffd0daa drm/amdgpu: Initialize and update SDMA power gating
Init SDMA HW base configuration and enable idle INT for rn.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Tianci.Yin
12842d02c7 drm/amdgpu/psp: keep TMR in visible vram region for SRIOV
Fix compute ring test failure in sriov scenario.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Tianci.Yin
994dcfaa7e drm/amdgpu: keep the stolen memory in visible vram region
stolen memory should be fixed in visible region.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Colin Ian King
92ead9fa6f drm/amdgpu: fix spelling mistake "jumpimng" -> "jumping"
There is a spelling mistake in a DRM_DEBUG_DRIVER debug message.
Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Alex Deucher
53fd9b5ae8 drm/amdgpu/virtual_dce: drop error message in hw_init
No need to add new asic cases.  This is a sw display
implementation, so just drop the error message so when
we add new asics, all we have to do is add the virtual
dce IP module.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Jean Delvare
77efe48a72 drm/amdgpu/si: fix ASIC tests
Comparing adev->family with CHIP constants is not correct.
adev->family can only be compared with AMDGPU_FAMILY constants and
adev->asic_type is the struct member to compare with CHIP constants.
They are separate identification spaces.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Fixes: 62a3755341 ("drm/amdgpu: add si implementation v10")
Cc: Ken Wang <Qingqing.Wang@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Jean Delvare
1cdd229bec drm/amd/amdgpu: hide voltage and power sensors on SI and KV parts
The driver does not support these sensors yet and there is no point in
creating sysfs attributes which will always return an error.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Monk Liu
e352625796 drm/amdgpu: introduce vram lost for reset (v2)
for SOC15/vega10 the BACO reset & mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer

v2:
cover NV as well

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Xiaojie Yuan
514ad79103 drm/amd/powerplay: enable jpeg powergating for navi1x
jpeg pg depends on vcn pg

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Xiaojie Yuan
5ef3b8acdc drm/amdgpu: enable athub powergating for navi12
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Xiaojie Yuan
c1653ea05b drm/amdgpu: enable vcn powergating for navi12
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:31 -05:00
Hawking Zhang
317f9cc97b drm/amdgpu: correct in_suspend setting for navi series
in_suspend flag should be set in amdgpu_device_suspend/resume in pairs,
instead of gfx10 ip suspend/resume function.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:26 -05:00
Dan Williams
7b60422cb7 libnvdimm/security: Consolidate 'security' operations
The security operations are exported from libnvdimm/security.c to
libnvdimm/dimm_devs.c, and libnvdimm/security.c is optionally compiled
based on the CONFIG_NVDIMM_KEYS config symbol.

Rather than export the operations across compile objects, just move the
__security_store() entry point to live with the helpers.

Acked-by: Jeff Moyer <jmoyer@redhat.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/156686730515.184120.10522747907309996674.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2019-08-29 13:51:57 -07:00
Dan Williams
bc4f2199ca libnvdimm/security: Tighten scope of nvdimm->busy vs security operations
An attempt to freeze DIMMs currently runs afoul of default blocking of
all security operations in the entry to the 'store' routine for the
'security' sysfs attribute.

The blanket blocking of all security operations while the DIMM is in
active use in a region is too restrictive. The only security operations
that need to be aware of the ->busy state are those that mutate the
state of data, i.e. erase and overwrite.

Refactor the ->busy checks to be applied at the entry common entry point
in __security_store() rather than each of the helper routines to enable
freeze to be run regardless of busy state.

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jeff Moyer <jmoyer@redhat.com>
Link: https://lore.kernel.org/r/156686729996.184120.3458026302402493937.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2019-08-29 13:51:57 -07:00
Dan Williams
d78c620a2e libnvdimm/security: Introduce a 'frozen' attribute
In the process of debugging a system with an NVDIMM that was failing to
unlock it was found that the kernel is reporting 'locked' while the DIMM
security interface is 'frozen'. Unfortunately the security state is
tracked internally as an enum which prevents it from communicating the
difference between 'locked' and 'locked + frozen'. It follows that the
enum also prevents the kernel from communicating 'unlocked + frozen'
which would be useful for debugging why security operations like 'change
passphrase' are disabled.

Ditch the security state enum for a set of flags and introduce a new
sysfs attribute explicitly for the 'frozen' state. The regression risk
is low because the 'frozen' state was already blocked behind the
'locked' state, but will need to revisit if there were cases where
applications need 'frozen' to show up in the primary 'security'
attribute. The expectation is that communicating 'frozen' is mostly a
helper for debug and status monitoring.

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reported-by: Jeff Moyer <jmoyer@redhat.com>
Reviewed-by: Jeff Moyer <jmoyer@redhat.com>
Link: https://lore.kernel.org/r/156686729474.184120.5835135644278860826.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2019-08-29 13:49:13 -07:00