Commit graph

1,399,042 commits

Author SHA1 Message Date
Dmitry Baryshkov
99447ef003 dt-bindings: clock: qcom,sm8650-dispcc: replace with symlink
The display clock controller indices for SM8650 and SM8550 are
completely equal. Replace the header file for qcom,sm8650-dispcc with
the symlink to the qcom,sm8550-dispcc header file.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240717-dispcc-sm8550-fixes-v2-7-5c4a3128c40b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 22:05:25 -05:00
Raymond Hackley
ccf683fa0c arm64: dts: qcom: msm8916-samsung-fortuna: Add touch keys
Touch keys feature on fortuna phones are provided by Zinitix touchscreen.
Add property linux,keycodes to enable touch keys.

Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240724143230.3804-1-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 22:02:10 -05:00
Ankit Sharma
717ca334af arm64: dts: qcom: sa8775p: Add capacity and DPC properties
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy Model which in turn is used by EAS to take
placement decisions.

Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
Link: https://lore.kernel.org/r/20240731111951.6999-1-quic_anshar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 22:01:29 -05:00
Barnabás Czémán
359c8c8491 arm64: dts: qcom: pm8950: Add resin node
Add pm8950 resin node as a feature of the PMIC it should be declared
in pm8950.dtsi, disabled by default. Like all other optional components
it can then by enabled and configured in the board-specific device tree
part.

Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20240730-pm8950_resin-v1-1-26de4d933f95@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 22:00:33 -05:00
Satya Priya Kakitapalli
f75537a42a arm64: dts: qcom: Add camera clock controller for sm8150
Add device node for camera clock controller on Qualcomm
SM8150 platform.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-9-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:59:41 -05:00
Bjorn Andersson
0e1b56c060 Merge branch '20240731062916.2680823-7-quic_skakitap@quicinc.com' into arm64-for-6.12
Merge SM8150 camera clock controller binding from topic branch, to gain
access to constants introduced by this.
2024-07-31 21:57:22 -05:00
Satya Priya Kakitapalli
ea73b7acef clk: qcom: Add camera clock controller driver for SM8150
Add support for the camera clock controller for camera clients
to be able to request for camcc clocks on SM8150 platform.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240731062916.2680823-8-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:57:02 -05:00
Taniya Das
0c31f6a3ab clk: qcom: clk-alpha-pll: Add support for Regera PLL ops
Regera PLL ops are required to control the Regera PLL from clock
controller drivers, hence add the Regera PLL ops and configure
function.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-6-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:57:02 -05:00
Satya Priya Kakitapalli
f4973130d2 clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL
The Zonda PLL has a 16 bit signed alpha and in the cases where the alpha
value is greater than 0.5, the L value needs to be adjusted accordingly.
Thus update the logic to handle the signed alpha val.

Fixes: f21b6bfecc ("clk: qcom: clk-alpha-pll: add support for zonda pll")
Cc: stable@vger.kernel.org
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-5-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:56:09 -05:00
Satya Priya Kakitapalli
85e8ee59df clk: qcom: clk-alpha-pll: Fix zonda set_rate failure when PLL is disabled
Currently, clk_zonda_pll_set_rate polls for the PLL to lock even if the
PLL is disabled. However, if the PLL is disabled then LOCK_DET will
never assert and we'll return an error. There is no reason to poll
LOCK_DET if the PLL is already disabled, so skip polling in this case.

Fixes: f21b6bfecc ("clk: qcom: clk-alpha-pll: add support for zonda pll")
Cc: stable@vger.kernel.org
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-4-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:56:09 -05:00
Satya Priya Kakitapalli
4ad1ed6ef2 clk: qcom: clk-alpha-pll: Fix the trion pll postdiv set rate API
Correct the pll postdiv shift used in clk_trion_pll_postdiv_set_rate
API. The shift value is not same for different types of plls and
should be taken from the pll's .post_div_shift member.

Fixes: 548a909597 ("clk: qcom: clk-alpha-pll: Add support for Trion PLLs")
Cc: stable@vger.kernel.org
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240731062916.2680823-3-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:56:09 -05:00
Satya Priya Kakitapalli
2c4553e6c4 clk: qcom: clk-alpha-pll: Fix the pll post div mask
The PLL_POST_DIV_MASK should be 0 to (width - 1) bits. Fix it.

Fixes: 1c3541145c ("clk: qcom: support for 2 bit PLL post divider")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240731062916.2680823-2-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:56:09 -05:00
Bjorn Andersson
a689c2961f Merge branch '20240731062916.2680823-7-quic_skakitap@quicinc.com' into clk-for-6.12
Merge SM8150 camera clock controller binding through topic branch, to
allow this to be shared with DeviceTree source branches as well.
2024-07-31 21:53:59 -05:00
Satya Priya Kakitapalli
44933cd06e dt-bindings: clock: qcom: Add SM8150 camera clock controller
Add device tree bindings for the camera clock controller on
Qualcomm SM8150 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240731062916.2680823-7-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:53:47 -05:00
Bjorn Andersson
c1ece392ed arm64: dts: qcom: sc8180x-lenovo-flex-5g: Enable USB multiport controller
The Lenovo Flex 5G has a camera attached to the multiport USB
controller, enable the controller and the four phys to enable this.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-7-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:52:31 -05:00
Bjorn Andersson
e12953d3b1 arm64: dts: qcom: sc8180x-primus: Enable the two MP USB ports
The SC8180X Primus comes with an AUX card with two USB ports, fed by the
two multiport ports.

Enable the involved nodes and define two always-on regulators to enable
VBUS for these ports.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-6-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:52:31 -05:00
Bjorn Andersson
96aab8ff59 arm64: dts: qcom: sc8180x: Add USB MP controller and phys
The SC8180X platform comes with a multiport DWC3 controller with two
ports, each connected to a pair of HighSpeed and QMP SuperSpeed PHYs.

Describe these blocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-5-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:52:31 -05:00
Bjorn Andersson
82a40c7b06 arm64: dts: qcom: sc8180x: Align USB nodes with binding
Add the pwr_event interrupt and rearrange the order of the other
interrupts to match the binding.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-4-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:52:30 -05:00
Bjorn Andersson
c8d8e936bc arm64: dts: qcom: sc8180x-pmics: Add second PMC8180 GPIO
The SC8180X comes with two PMC8180 PMICs, with the GPIO block being used
to control VBUS supply of the second USB multiport port.

Rename the GPIO controller in the first PMC8180 to match the schematics
and define this second controller.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-3-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:52:30 -05:00
Bjorn Andersson
9ed1dd650d Merge branch '20240730-sc8180x-usb-mp-v2-1-a7dc4265b553@quicinc.com' into arm64-for-6.12
Merge the sc8180x Global Clock Controller binding from a topic branch,
to gain access to the introduced USB multiport reset constants.
2024-07-31 21:51:29 -05:00
Bjorn Andersson
a5652d05f8 clk: qcom: gcc-sc8180x: Add missing USB MP resets
The USB multiport controller needs a few additional resets, add these to
the driver.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-2-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:51:03 -05:00
Bjorn Andersson
856d6c2769 Merge branch '20240730-sc8180x-usb-mp-v2-1-a7dc4265b553@quicinc.com' into clk-for-6.12
Merge the sc8180x multiport reset DeviceTree constants through a topic
branch, to allow them also to be made available to DeviceTree source.
2024-07-31 21:49:50 -05:00
Bjorn Andersson
39b5ffc955 dt-bindings: clock: qcom: Add missing USB MP resets
The USB multiport controller needs a few missing resets, describe them
in the binding.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-1-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:48:16 -05:00
Dang Huynh
84c1711f27 arm64: dts: qcom: sm6115-pro1x: Enable ATH10K WLAN
Enable onboard Wi-Fi on the F(x)tec Pro1X.

For reference, HW/SW identifies as:
qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000
qmi fw_version 0x324103d6 fw_build_timestamp 2021-12-02 08:20
fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.4-00982-QCAHLSWMTPLZ-1

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-11-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
e055924159 arm64: dts: qcom: sm6115-pro1x: Enable remoteprocs
Enable [A,C]DSP and MPSS remote processor on this device.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-10-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
b5c63330a7 arm64: dts: qcom: sm6115-pro1x: Enable RGB LED
This device has an RGB LED. It is used for notifications.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-9-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
79f8d127c4 arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C property
The USB-C port is used for powering external devices and transfer
data from/to them.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-8-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
e0674d85c8 arm64: dts: qcom: sm6115-pro1x: Hook up USB3 SS
The F(x)tec Pro1X supports USB 3.0 through it's USB-C port.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-7-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
8b9f76a6f8 arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPU
Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-6-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
95b19afd73 arm64: dts: qcom: sm6115-pro1x: Enable SD card slot
Fxtec Pro1X has two card slots and allow either 2xSIM cards or
1xSIM, 1xSD Card configuration.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-5-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
17c9858115 arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LED
The Pro1X has a caps lock LED on the keyboard.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-4-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:42:00 -05:00
Dang Huynh
e46b455e67 arm64: dts: qcom: sm6115-pro1x: Add Goodix Touchscreen
The Fxtec Pro1X touchscreen uses Goodix GT9286 chip.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-3-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:41:59 -05:00
Dang Huynh
4686161eb8 arm64: dts: qcom: sm6115-pro1x: Add PCA9534 IO Expander
F(x)tec Pro1X comes with PCA9534 IO Expander, it is used for enabling
touch screen VDD/VDDIO and keyboard's caps lock LED.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-2-b945527fa5d2@riseup.net
[bjorn: Dropped unnecessary comment in i2c1]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:41:37 -05:00
Dang Huynh
ff5affd17b arm64: dts: qcom: sm6115-pro1x: Add Hall Switch and Camera Button
The Pro1X has a flip keyboard and a single-state camera button.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Link: https://lore.kernel.org/r/20240731-qx1050-feature-expansion-v3-1-b945527fa5d2@riseup.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-07-31 21:40:37 -05:00
Takashi Sakamoto
3593b38a13 firewire: core: utilize kref to maintain fw_node with reference counting
Current implementation directly uses refcount_t to maintain the life time
of fw_node, while kref is available for the same purpose.

This commit replaces the implementation with kref.

Link: https://lore.kernel.org/r/20240801022629.31857-1-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2024-08-01 11:26:29 +09:00
Jakub Kicinski
8e0c0ec9b7 Merge branch 'ethernet-convert-from-tasklet-to-bh-workqueue'
Allen Pais says:

====================
ethernet: Convert from tasklet to BH workqueue [part]

The only generic interface to execute asynchronously in the BH context is
tasklet; however, it's marked deprecated and has some design flaws. To
replace tasklets, BH workqueue support was recently added. A BH workqueue
behaves similarly to regular workqueues except that the queued work items
are executed in the BH context.

This patch converts a few drivers in drivers/ethernet/* from tasklet
to BH workqueue. The next set will be sent out after the next -rc is
out.

v2: https://lore.kernel.org/20240621183947.4105278-1-allen.lkml@gmail.com
v1: https://lore.kernel.org/20240507190111.16710-2-apais@linux.microsoft.com
====================

Link: https://patch.msgid.link/20240730183403.4176544-1-allen.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 19:05:20 -07:00
Allen Pais
c5092ba315 net: macb: Convert tasklet API to new bottom half workqueue mechanism
Migrate tasklet APIs to the new bottom half workqueue mechanism. It
replaces all occurrences of tasklet usage with the appropriate workqueue
APIs throughout the macb driver. This transition ensures compatibility
with the latest design and enhances performance.

Signed-off-by: Allen Pais <allen.lkml@gmail.com>
Link: https://patch.msgid.link/20240730183403.4176544-5-allen.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:59:46 -07:00
Allen Pais
8d3beb6bc7 net: cnic: Convert tasklet API to new bottom half workqueue mechanism
Migrate tasklet APIs to the new bottom half workqueue mechanism. It
replaces all occurrences of tasklet usage with the appropriate workqueue
APIs throughout the cnic driver. This transition ensures compatibility
with the latest design and enhances performance.

Signed-off-by: Allen Pais <allen.lkml@gmail.com>
Link: https://patch.msgid.link/20240730183403.4176544-4-allen.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:59:46 -07:00
Allen Pais
2d671dc6f0 net: xgbe: Convert tasklet API to new bottom half workqueue mechanism
Migrate tasklet APIs to the new bottom half workqueue mechanism. It
replaces all occurrences of tasklet usage with the appropriate workqueue
APIs throughout the xgbe driver. This transition ensures compatibility
with the latest design and enhances performance.

Signed-off-by: Allen Pais <allen.lkml@gmail.com>
Link: https://patch.msgid.link/20240730183403.4176544-3-allen.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:59:46 -07:00
Allen Pais
20a3bcfe93 net: alteon: Convert tasklet API to new bottom half workqueue mechanism
Migrate tasklet APIs to the new bottom half workqueue mechanism. It
replaces all occurrences of tasklet usage with the appropriate workqueue
APIs throughout the alteon driver. This transition ensures compatibility
with the latest design and enhances performance.

Signed-off-by: Allen Pais <allen.lkml@gmail.com>
Link: https://patch.msgid.link/20240730183403.4176544-2-allen.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:59:46 -07:00
Faizal Rahim
b9e7fc0aed igc: Fix double reset adapter triggered from a single taprio cmd
Following the implementation of "igc: Add TransmissionOverrun counter"
patch, when a taprio command is triggered by user, igc processes two
commands: TAPRIO_CMD_REPLACE followed by TAPRIO_CMD_STATS. However, both
commands unconditionally pass through igc_tsn_offload_apply() which
evaluates and triggers reset adapter. The double reset causes issues in
the calculation of adapter->qbv_count in igc.

TAPRIO_CMD_REPLACE command is expected to reset the adapter since it
activates qbv. It's unexpected for TAPRIO_CMD_STATS to do the same
because it doesn't configure any driver-specific TSN settings. So, the
evaluation in igc_tsn_offload_apply() isn't needed for TAPRIO_CMD_STATS.

To address this, commands parsing are relocated to
igc_tsn_enable_qbv_scheduling(). Commands that don't require an adapter
reset will exit after processing, thus avoiding igc_tsn_offload_apply().

Fixes: d3750076d4 ("igc: Add TransmissionOverrun counter")
Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com>
Acked-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Mor Bar-Gabay <morx.bar.gabay@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Link: https://patch.msgid.link/20240730173304.865479-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:56:23 -07:00
Jakub Kicinski
9bb3ec18d0 Merge branch 'mlxsw-core_thermal-small-cleanups'
Petr Machata says:

====================
mlxsw: core_thermal: Small cleanups

Ido Schimmel says:

Clean up various issues which I noticed while addressing feedback on a
different patchset.
====================

Link: https://patch.msgid.link/cover.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:32 -07:00
Ido Schimmel
b0d2132114 mlxsw: core_thermal: Fix -Wformat-truncation warning
The name of a thermal zone device cannot be longer than 19 characters
('THERMAL_NAME_LENGTH - 1'). The format string 'mlxsw-lc%d-module%d' can
exceed this limitation if the maximum number of line cards cannot be
represented using a single digit and the maximum number of transceiver
modules cannot be represented using two digits.

This is not the case with current systems nor future ones. Therefore,
increase the size of the result buffer beyond 'THERMAL_NAME_LENGTH' and
suppress the following build warning [1].

If this limitation is ever exceeded, we will know about it since the
thermal core validates the thermal device's name during registration.

[1]
drivers/net/ethernet/mellanox/mlxsw/core_thermal.c: In function ‘mlxsw_thermal_modules_init.part.0’:
drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:70: error: ‘%d’ directive output may be truncated writing between 1 and 3 bytes into a region of size between 2 and 4 [-Werror=format-truncation=]
  418 |                 snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d",
      |                                                                      ^~
In function ‘mlxsw_thermal_module_tz_init’,
    inlined from ‘mlxsw_thermal_module_init’ at drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:465:9,
    inlined from ‘mlxsw_thermal_modules_init.part.0’ at drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:500:9:
drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:52: note: directive argument in the range [1, 256]
  418 |                 snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d",
      |                                                    ^~~~~~~~~~~~~~~~~~~~~
drivers/net/ethernet/mellanox/mlxsw/core_thermal.c:418:17: note: ‘snprintf’ output between 18 and 22 bytes into a destination of size 20
  418 |                 snprintf(tz_name, sizeof(tz_name), "mlxsw-lc%d-module%d",
      |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  419 |                          module_tz->slot_index, module_tz->module + 1);
      |                          ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/583a70c6dbe75e6bf0c2c58abbb3470a860d2dc3.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:29 -07:00
Ido Schimmel
ec672931d1 mlxsw: core_thermal: Remove unnecessary assignments
Setting both pointers to NULL is unnecessary since the code never checks
whether these pointers are NULL or not. Remove the assignments.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/ea646f5d7642fffd5393fa23650660ab8f77a511.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:29 -07:00
Ido Schimmel
e7e3a450e5 mlxsw: core_thermal: Remove unnecessary checks
mlxsw_thermal_module_fini() cannot be invoked with a thermal module
which is NULL or which is not associated with a thermal zone, so remove
these checks.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/8db5fe0a3a28ba09a15d4102cc03f7e8ca7675be.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00
Ido Schimmel
e25f3040a6 mlxsw: core_thermal: Simplify rollback
During rollback, instead of calling mlxsw_thermal_module_fini() for all
the modules, only call it for modules that were successfully
initialized. This is not a bug fix since mlxsw_thermal_module_fini()
first checks that the module was initialized.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/905bebc45f6e246031f0c5c177bba8efe11e05f5.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00
Ido Schimmel
fb76ea1d4b mlxsw: core_thermal: Make mlxsw_thermal_module_{init, fini} symmetric
mlxsw_thermal_module_fini() de-initializes the module's thermal zone,
but mlxsw_thermal_module_init() does not initialize it. Make both
functions symmetric by moving the initialization of the module's thermal
zone to mlxsw_thermal_module_init().

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/a661ad468f8ad0d7d533d8334e4abf61dfe34342.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00
Ido Schimmel
73c18f9998 mlxsw: core_thermal: Remove unused arguments
'dev' and 'core' arguments are not used by mlxsw_thermal_module_init().
Remove them.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/563fc7383f61809a306b9954872219eaaf3c689b.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00
Ido Schimmel
d81d714340 mlxsw: core_thermal: Fold two loops into one
There is no need to traverse the same array twice. Do it once by folding
both loops into one.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/81756744ed532aaa9249a83fc08757accfe8b07c.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00
Ido Schimmel
2a1c9dcb52 mlxsw: core_thermal: Remove another unnecessary check
mlxsw_thermal_modules_init() allocates an array of modules and then
initializes each entry by calling mlxsw_thermal_module_init() which
among other things initializes the 'parent' pointer of the entry.

mlxsw_thermal_modules_init() then traverses over the array again, but
skips over entries that do not have their 'parent' pointer set which is
impossible given the above.

Therefore, remove the unnecessary check.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Link: https://patch.msgid.link/fb3e8ded422a441436431d5785b900f11ffc9621.1722345311.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-07-31 18:38:28 -07:00