Add check for the return value of devm_kmemdup()
to prevent potential null pointer dereference.
Fixes: c764881096 ("ice: Implement Dynamic Device Personalization (DDP) download")
Cc: stable@vger.kernel.org
Signed-off-by: Haoxiang Li <haoxiang_li2024@163.com>
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
When the PF is processing an Admin Queue message to delete a VF's MACs
from the MAC filter, we currently check if the PF set the MAC and if
the VF is trusted.
This results in undesirable behaviour, where if a trusted VF with a
PF-set MAC sets itself down (which sends an AQ message to delete the
VF's MAC filters) then the VF MAC is erased from the interface.
This results in the VF losing its PF-set MAC which should not happen.
There is no need to check for trust at all, because an untrusted VF
cannot change its own MAC. The only check needed is whether the PF set
the MAC. If the PF set the MAC, then don't erase the MAC on link-down.
Resolve this by changing the deletion check only for PF-set MAC.
(the out-of-tree driver has also intentionally removed the check for VF
trust here with OOT driver version 2.26.8, this changes the Linux kernel
driver behaviour and comment to match the OOT driver behaviour)
Fixes: ea2a1cfc3b ("i40e: Fix VF MAC filter removal")
Signed-off-by: Jamie Bainbridge <jamie.bainbridge@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Rafal Romanowski <rafal.romanowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Currently the tx_dropped field in VF stats is not updated correctly
when reading stats from the PF. This is because it reads from
i40e_eth_stats.tx_discards which seems to be unused for per VSI stats,
as it is not updated by i40e_update_eth_stats() and the corresponding
register, GLV_TDPC, is not implemented[1].
Use i40e_eth_stats.tx_errors instead, which is actually updated by
i40e_update_eth_stats() by reading from GLV_TEPC.
To test, create a VF and try to send bad packets through it:
$ echo 1 > /sys/class/net/enp2s0f0/device/sriov_numvfs
$ cat test.py
from scapy.all import *
vlan_pkt = Ether(dst="ff:ff:ff:ff:ff:ff") / Dot1Q(vlan=999) / IP(dst="192.168.0.1") / ICMP()
ttl_pkt = IP(dst="8.8.8.8", ttl=0) / ICMP()
print("Send packet with bad VLAN tag")
sendp(vlan_pkt, iface="enp2s0f0v0")
print("Send packet with TTL=0")
sendp(ttl_pkt, iface="enp2s0f0v0")
$ ip -s link show dev enp2s0f0
16: enp2s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000
link/ether 3c:ec:ef:b7:e0:ac brd ff:ff:ff:ff:ff:ff
RX: bytes packets errors dropped missed mcast
0 0 0 0 0 0
TX: bytes packets errors dropped carrier collsns
0 0 0 0 0 0
vf 0 link/ether e2:c6:fd:c1:1e:92 brd ff:ff:ff:ff:ff:ff, spoof checking on, link-state auto, trust off
RX: bytes packets mcast bcast dropped
0 0 0 0 0
TX: bytes packets dropped
0 0 0
$ python test.py
Send packet with bad VLAN tag
.
Sent 1 packets.
Send packet with TTL=0
.
Sent 1 packets.
$ ip -s link show dev enp2s0f0
16: enp2s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000
link/ether 3c:ec:ef:b7:e0:ac brd ff:ff:ff:ff:ff:ff
RX: bytes packets errors dropped missed mcast
0 0 0 0 0 0
TX: bytes packets errors dropped carrier collsns
0 0 0 0 0 0
vf 0 link/ether e2:c6:fd:c1:1e:92 brd ff:ff:ff:ff:ff:ff, spoof checking on, link-state auto, trust off
RX: bytes packets mcast bcast dropped
0 0 0 0 0
TX: bytes packets dropped
0 0 0
A packet with non-existent VLAN tag and a packet with TTL = 0 are sent,
but tx_dropped is not incremented.
After patch:
$ ip -s link show dev enp2s0f0
19: enp2s0f0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000
link/ether 3c:ec:ef:b7:e0:ac brd ff:ff:ff:ff:ff:ff
RX: bytes packets errors dropped missed mcast
0 0 0 0 0 0
TX: bytes packets errors dropped carrier collsns
0 0 0 0 0 0
vf 0 link/ether 4a:b7:3d:37:f7:56 brd ff:ff:ff:ff:ff:ff, spoof checking on, link-state auto, trust off
RX: bytes packets mcast bcast dropped
0 0 0 0 0
TX: bytes packets dropped
0 0 2
Fixes: dc645daef9 ("i40e: implement VF stats NDO")
Signed-off-by: Dennis Chen <dechen@redhat.com>
Link: https://www.intel.com/content/www/us/en/content-details/596333/intel-ethernet-controller-x710-tm4-at2-carlsville-datasheet.html
Reviewed-by: Simon Horman <horms@kernel.org>
Tested-by: Rafal Romanowski <rafal.romanowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
- Add A523's missing PPU0 reset (both DT binding and driver)
The binding change is shared with the soc tree.
- Fix V3s DE clock mux field width
- Stop passing rate change requests to parent for V3s DE clock
- Force and lock V3s DE and TCON clocks to the same parent, the video PLL
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmh2iB0OHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDDBmRAAlrVWEr5ScgGtN6ERpGv9gAKAfNdxzRDLOm/8
M22jt7tubI2gbfEOi6VnoQWg0LOBclfFqcnWim5k75F2yyyU53EPjQHKumSXFzij
QNA3582AT+gBNGHy7hpOw1fQaK9RSG18iLaSLZ1tEYuBZcf8jv6bY2CjXei7CH8a
iYeQj8yC42bUTARNiAveHPH5+Kvx0CaXFS5uOizILWhvC9j6ZGEK65l+hgyp9E8I
BjtNHOj5/46VFopGk6LK93q38qQnN47nP0i8gQEx2KoHrwXUUE5lRNUwSnSG7MgF
wTRRkj83XdgH/I3Hh/T0K2eY8GHc6ZnuxL7zRdPfjNhh2X8tZ6zVVJzZ/BIaG7jV
XfmQyh4G6U6EVDYARcWszHx3WaG9AQCTvXqZmCelOd6LHvgC3+m3HWERfMwWsSAw
MIENrWyPrA8KYPbU5qo36Fa+Uxe01iYQQRirp00NxEjQKg+dLrgbZ7SvxtNMfRjU
/43fVWIU0/XklZV8CgajoTRMzLFLkFqFCvLPdgHz1Z6LeUD7g5Iv6E8zON6srehA
UInCGdmzC5gYN6h0I/bxsKGe7LR2Ztb5GPT2bOJYre/v+oe37Zv2bdLPKmWjaIFP
AB6IEkW4RD3lVxlAkhWa4g3+GRCbiYm67aIysWT3HKIAfYSscPe8tWlKDnqwBMP9
7EJeX68=
=3XI7
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmh+eH0UHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSWJaQ/9HEK1pduNgGwlZPT19BbCvdumG1dr
FEa/AQjsX3HGcqGEnMPpD7sHfBIb4LawTEiQ3Uxvz1LoUthNMhoK63A95gMPGg4e
tKe9Cc3b+ihgZKessp0kQdD8vC9ozO5gv0lHYXTk+fsnyh/hjmlNm30YoNsWvNrc
PssLKqbnzlP7PxFiEfIIGa1wCGCZmPKIluHvZdL3Y0H5H5bWHt+osjIEB2Fj+XJl
pGXWJcCWSM+Df4mcn1fY9sMhsRBup1lu7VLUMN+M2vSUHnKlzYwAQifEne6kKs9w
9I3t460UkT+J6UClJ7d3v4IE68QAbvQkG0gxnODRzZpp3P/6KCWEf+2FM/gvAULG
U7wJIoLw+dhtP/k+LQIe7jg1mxLDpyZqoFbkkzZSyyOUk5E5wdFnlIUERWyIGCfF
GTftKal6/uyu5p7YwvLLjLBgowJtQv63Tkg5b3m0hbEmo9tBkN+8NwWkHi4/V3wg
o93qFVNBU+NY1ifa5q/pjofafEYNouReUbe1AieyzFDKoEtkbVuKSvztaDN9WCH8
jszSwIqTlLRRRN0xIN36FbuZ4LusYFc1GOz44A48oMkJUtmfSoj9FMR6BkkVhi1c
8A34VWjkdfnC14zDari6ZdyemvcPb6kq4XXGazAEHZh+xeH2P91aNYgGYUffY+am
YMkmXtHRPMXv978=
=LPCt
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Chen-Yu Tsai:
- Add Allwinner A523's missing PPU0 reset (both DT binding and
driver) The binding change is shared with the soc tree.
- Fix Allwinner V3s DE clock mux field width
- Stop passing rate change requests to parent for Allwinner V3s
DE clock
- Force and lock Allwinner V3s DE and TCON clocks to the same
parent, the video PLL
* tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: ccu_nm: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_nkmp: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_nk: convert from round_rate() to determine_rate()
clk: sunxi-ng: ccu_gate: convert from round_rate() to determine_rate()
clk: sunxi-ng: v3s: Assign the de and tcon clocks to the video pll
clk: sunxi-ng: v3s: Fix de clock definition
clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset
dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset
Commit 13423063c7 ("arm64: kvm, smccc: Introduce and use API for
getting hypervisor UUID") replaced the explicit register constants
with the UUID_INIT macro. However, there is an endian issue, meaning
the UUID generated and used in the handshake didn't match UUID prior to
the commit.
The change in UUID causes the SMCCC vendor handshake to fail with older
guest kernels, meaning devices such as PTP were not available in the
guest.
This patch updates the parameters to the macro to generate a UUID which
matches the previous value, and re-establish backwards compatibility
with older guest kernels.
Fixes: 13423063c7 ("arm64: kvm, smccc: Introduce and use API for getting hypervisor UUID")
Signed-off-by: Jack Thomson <jackabt@amazon.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20250721130558.50823-1-jackabt.amazon@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
- Mark A523 MBUS clock as critical
- Fix names of CSI related clocks on V3s
This includes changes to the driver, DT bindings and DT files.
- Fix parents of TCON clock on V3s
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmh2hw4OHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDCoNhAApMSWflxAXohu5tYLk82d/87BJAAIodRkJnVU
B+1fUkqAsT7hKvnP2z3JoLufYXYm+uXrbVR5m3/00QsmXh2E3sKuXbnetxVvnpdQ
gpGq0yZBV5qFnuLkG7UN9FNovkVzY1dgQ0J1gKG++itMkkW/yHGQhXOo6ZiRHy2R
/8D/LhZa4gq2K+szQkuFH12o6+dDCFTMfwUiE5eNXI4XLuZailZ/a9tn5Qpym+kw
k5/svQF8OHXLloyJ1QkIph3uDylFeTILzc3684AUD/b3cZNmppJ8CErKV8Gk8ELC
0QscfeDc+Evbh+1qFZa5a4JK5Cz0F+GmG37G3XsJtA6IE6BMU75PSTTBYqaoDGoR
eynxApXmBarPcmWzmQgmk7aE8A3gV05t4N3ZLjLCtjUjfg7yWveMu40MQlzs15Hm
mWnOcQSETTxxbIbZBr6ZcYhXLsWjrzlQKzIodmNaVuf0TiZhH5DJ55CD6WlMT8T7
+6fGa0Bez3XLTBLScnj+5ghXOvOHSr71koXFGTcoRhfWwUliTVtzJhfqgnGhSvwI
Wfq1XVhaGOPpdKIXuBs63I4624J9zslJ5AuN75bP9Wyy0HvnxAx65PavgjOWinmg
/5rO0Oi85eLpJmzZp9Cyz99lDZ3zqtrxJZf+gE/EOSM/UzNiUR8T0ZCK1UaurWuG
GJnVxZU=
=aH5v
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmh+dlMUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSX5OA//e4VYLWjx93M+M40Lsc9+xxy/naoh
hFWRyUSthVcnA/EYAGR9YuO5aBZSniXSMRKuY4bHt0yEOUWjKP0ypvm8ygGZYUPM
eVlY+ITrggh3MC9isqyptGQ/9gY6BjS3goM6UIogz5oEZQeoo02a7inSKeW4kSd8
z1j1GekeONLydnXBtSTUamnhDpXjY3eOM1VQeLh3lFdgScKlvQSEGpN8yFnjxLKx
Df4O41zXvhGz0uEN/+cQ6sGGhLdhjnT7gIUpreFShnSY64Y19RzGtwhvERa2Ozeu
pAuFIfj/QhSisEKCmRXgWBe0O+zhgs6iKUZZctwjNSeW1/WEEUOEsrP0rAoi/RGl
IUu1W5m2Q5wzYGWYKnmguzKNDoB24Ej2qf0itVOSzQA9xtjTB40x/y1rB1hCTo/U
XisbDoh4CEfmBuXsW/YUSNBqxi9KG03ZVbH95+HGjAkj+fzJ6l5Tw5lDSQt/JNEt
Y2LnIknUn3BxSaq4vhINda5azs0zhDuQ7FCpMsdagz50BW1Ea1uHbIomIlprDNrQ
khJI1tV+SZDy0q6GdhubgvEZWAtAsp/L4HxmF4dzrcle36RB49FB+Z/y4UxvqD+k
BIoDKUc+VZCx2Z+gUcsEkWaemjVKIl1CsN2NwVTNMo+VeAFZ17/VHc9sybQ9qfXS
Sgt8sVjguYl7p2k=
=Uds7
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clk-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes
Pull Allwinner clock fixes from Chen-Yu Tsai:
- Mark A523 MBUS clock as critical
- Fix names of CSI related clocks on V3s
This includes changes to the driver, DT bindings and DT files.
- Fix parents of TCON clock on V3s
* tag 'sunxi-clk-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: v3s: Fix TCON clock parents
clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name
clk: sunxi-ng: v3s: Fix CSI SCLK clock name
clk: sunxi-ng: a523: Mark MBUS clock as critical
Document the RPMh Network-On-Chip Interconnect of the Milos (e.g.
SM7635) SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250709-sm7635-icc-v3-1-c446203c3b3a@fairphone.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
We currently always expose FEAT_RAS when available on the host.
As we are about to make this feature selectable from userspace,
check for it being present before emulating register accesses
as RAZ/WI, and inject an UNDEF otherwise.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250721101955.535159-4-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Most HCR_EL2 bits are not supposed to affect EL2 at all, but only
the guest. However, we gladly merge these bits with the host's
HCR_EL2 configuration, irrespective of entering L1 or L2.
This leads to some funky behaviour, such as L1 trying to inject
a virtual SError for L2, and getting a taste of its own medecine.
Not quite what the architecture anticipated.
In the end, the only bits that matter are those we have defined as
invariants, either because we've made them RESx (E2H, HCD...), or
that we actively refuse to merge because the mess with KVM's own
logic.
Use the sanitisation infrastructure to get the RES1 bits, and let
things rip in a safer way.
Fixes: 04ab519bb8 ("KVM: arm64: nv: Configure HCR_EL2 for FEAT_NV2")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250721101955.535159-3-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Mark Brown reports that since we commit to making exceptions
visible without the vcpu being loaded, the external abort selftest
fails.
Upon investigation, it turns out that the code that makes registers
affected by an exception visible to the guest is completely broken
on VHE, as we don't check whether the system registers are loaded
on the CPU at this point. We managed to get away with this so far,
but that's obviously as bad as it gets,
Add the required checksm and document the absolute need to check
for the SYSREGS_ON_CPU flag before calling into any of the
__vcpu_write_sys_reg_to_cpu()__vcpu_read_sys_reg_from_cpu() helpers.
Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/18535df8-e647-4643-af9a-bb780af03a70@sirena.org.uk
Link: https://lore.kernel.org/r/20250720102229.179114-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
The bulk of this is the addition of Tegra264 support for various low-
level components. This also adds fabric descriptors for the new Tegra254
and Tegra264 chips.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmhxiLQACgkQ3SOs138+
s6GrMA//SscGyGAVDKWGd0otj1Wk9TD5RIxgOMpvjGJE/M1EK+VHqtb4K76+Zqkc
HnyrkkRbmGiV3c19e53tYqC2Syv6atxB0QYS/4n8M7gWMjNBXT3wFEU13Jqu8QER
GPkgNSrKjUZClbAgkdGbTaEcjOuT35T1MORo5mGgYFKO+83bbpxFc4f3s7eDe3AU
az/SgEfe7nbvaDVwM8XshazyFyidIg2lxCy9YzXVkZBhG+z4mH7sHhg9VlEI87VA
a/ElQG3j80YNwzmeFA9j44GMy75ma01KgplfvXFPY4YRPj+dgTrVfll+9nttZbez
itcukFMQKZF40NKfxy/bASL6SKxISLOPK6EwJ1+Ws1omXlsjzdgMacNaeURgLICt
1DJQRjQs9COt+VFFCqnVBFtbZlFk8yOTcSv1IimaLk9B1vhz5oCrlg8+RCtW+54m
XerfpqUaV+7zc2wtgofy/HsdY93EyLPwQ08AxJG8fZMMwqpE1lwxXCH6WBDHMZAC
AccMc9dqW5fbuRKLdFfMDfMF6mzqHJXPag3KCv0VLDFIpy7buLTaSHfVNFMHhtcE
ajuHpSrmYkHy7SOOVvlDtyQIP3mKk3FSQyE0PYconcJ2rJOdcfhJFWGDTTXaDz2a
XhbxX2o7Z5LsVr52X+5LAwEaTnZLTR1omKnznWW21agqBljPXtU=
=iSY8
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+aEMACgkQmmx57+YA
GNkDtQ/+JjbVkMQOKxUvKNJMiy2hRhEG6WNc+sZ9Wqk+E6/JgMmFTIlbW9hKnRw1
57ir/a18dWGJ0y/jV7YfjuZkYWgo+uXwMvA+rRrGAUm0ZxgVj1dCZLhEdWyrMEIS
j16W1T52ANRsjfJB5L4y97J4b6EpnLeyDiEvO9NljANig6VgxRFuvZxuXiDWJ7I+
h2JhdOXlSqCMlpfnsDddhvwKQHhHoYJBjFrytcxuzP1NJLwRajGax0GfObiXRrN0
9A/tXarZOmoQAA6PtfvnNoxuZdc0A/otp2sYSntPJNNhxVyZy7flHvm2SFUhMnS1
XX60qdV7V9raahopqvst12xBhK57xBfYFBUkybi0ExmCcXAvGp19psSAHFgFFUbC
5SqQidl1TkcVK4ISTv/4hUqulumXhvN7Kq+PlFVswvye01M0GmuMrmAKaLhWSKqO
qCPkFvu3aI3UlY8f0jVy6g4OeZO/ZYXiP4CTQyqeMFy8+b10kHLCm7EdOSZOEoW1
emCqUm6Mr5YJqu1NhqF3LUQqTYBDIhae+z/vyCstv7hbBzwQk0hM+Ou05oINeZpk
XNDD76ZQLCMHJPbuw/fcLrpk8wayiLf9a9PhCDfNYIeNrfTB7Rr6Xk8DGSQXiSnv
jBAB2Agj/ylpL7MEmKL0NNXvBnlImdEJd6NMAIHKaNB8WpCp89o=
=Urev
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Updates for v6.17-rc1
The bulk of this is the addition of Tegra264 support for various low-
level components. This also adds fabric descriptors for the new Tegra254
and Tegra264 chips.
* tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: cbb: Add support for CBB fabrics in Tegra254
soc/tegra: cbb: Add support for CBB fabrics in Tegra264
soc/tegra: cbb: Support HW lookup to get timed out target address
soc/tegra: cbb: Improve handling for per SoC fabric data
soc/tegra: cbb: Make error interrupt enable and status per SoC
soc/tegra: cbb: Change master/slave to initiator/target
soc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS
soc/tegra: Add Tegra264 APBMISC compatible string
soc/tegra: pmc: Add Tegra264 support
soc/tegra: Enable support for Tegra264
Link: https://lore.kernel.org/r/20250711220943.2389322-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The conversion to using the new GPIO line setter callbacks missed the
set_multiple() in this file. Convert it to using the new callback.
Fixes: 52ccf19527 ("soc: fsl: qe: use new GPIO line value setter callbacks")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrea della Porta <andrea.porta@suse.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
With the Opaque<T>, the expectations are that Rust should not
make any assumptions on the layout or invariants of the wrapped
C types. That runs rather counter to ioctl arguments, which must
adhere to certain data-layout constraints. By using Opaque<T>,
ioctl handlers are forced to use unsafe code where none is actually
needed. This adds needless complexity and maintenance overhead,
brining no safety benefits.
Drop the use of Opaque for ioctl arguments as that is not the best
fit here.
Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Alice Ryhl <aliceryhl@google.com>
Link: https://lore.kernel.org/r/20250626162313.2755584-1-beata.michalska@arm.com
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
In SpacemiT's K1 SoC, the clocks for UART are mandatory needed, so
for DT, both clocks and clock-names property should be set as required.
Fixes: 2c0594f9f0 ("dt-bindings: serial: 8250: support an optional second clock")
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250718-01-k1-uart-binding-v1-1-a92e1e14c836@gentoo.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Document SCIF bindings for the Renesas RZ/V2N (a.k.a R9A09G056) SoC.
The SCIF interface in Renesas RZ/V2N is identical to the one available
in RZ/V2H(P), so `renesas,scif-r9a09g057` will be used as a fallback,
allowing reuse of the existing driver without modifications.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250716202923.163950-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
On i386, when
CONFIG_X86_INTEL_CE=y
# CONFIG_SERIAL_8250 is not set
it will try to compile the driver and use the stub simultaneously.
This breaks the build. Fix it by making sure that the driver
compiles only when CONFIG_SERIAL_8250 is also enabled.
On top of that ensure that CONFIG_SERIAL_8250 is actually set to 'y'
and not 'm' as the later makes no sense for this platform. The hook
may only be applied during early boot.
Fixes: acc902de05 ("serial: 8250: Move CE4100 quirks to a module under 8250 driver")
Fixes: 5ec6960f6f ("ce4100: Add errata fixes for UART on CE4100")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Closes: https://lore.kernel.org/r/cdf4ee46-7bf8-4379-9245-fed9db72e7e8@infradead.org
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20250716142412.1667927-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1. Multiple SoCs (including Samsung, Apple): switch sound to module from
a built-in, because it is not necessary for booting. Also drop
redundant sound codec options.
2. Enable PMIC drivers for Google GS101 Pixel 6 phones: MAX77759 and
Samsung PMIC over ACPM protocol.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuvrYQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD17SID/4oPiSCEP+4MTKtz+B6byq8M1bmCDN6pt1+
xu2fSOgk448yjDU2vzKneXXQztmB6cuXvM+EeBGs1qXWtaSCBnWQXmkuOGfCMoAM
9XVdw9A/vLX6y9HYDNYPToCDMsk6oNiSNtozXj7EyRn/LR+ICEI9+DbEdL0QN0/6
yRjunuWZm/OPVxpNMTKZEi6hW+51wR8JL7LcC+LClNsHl7zzbBb0q+5vPm1ovIw3
ZDjSZWaIsf/qBUoQ+2wnsVBS6GeTac9VOynvvihIxuyICI+NNx6JtwpCi1429fEO
7S+KT5ITHPEjz74RiPZ8/qszzBZlaMxUVXK/9pKxn9zwOYq0+uUMxRJDlQMaTl3y
+pJRRwHFjz6c8bYWDtEYAv3TAVwFWK9sWgxRmpCz2g6ENArz/5Y6ix8pgA/2GpEE
E1/exJK8iMkDqHTnkGcFa4FXiS93o4YAZ+WoiTqy+3aHyuB6ro8+h1Pn1m9SkBct
sqMqt9tANSIlyNjtn8PnQv0ERX6BS77ZIaM01CsOVzHzDgReW9aoTJVGNPQzjFKa
oy+gsNkwEwUbRRC2bTqrvA97KjXv4hXeG1Mx3R51vpU0l1W+R/wqbQNHv7He6hX6
9/UysIsklReQGDVthJylkmEcR4NmSe9+JNRZrqNFfPw1kaLh98QIpRhvJGZtGqn6
b89WyMh59g==
=hb2R
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+XnsACgkQmmx57+YA
GNm0cQ/6AwnZhFaecsTwIuYRKxaMIhOrHrqDvaSO+3wNik6iTIQScXck0PjqSSln
X8QEvBRq70GmBbSt8vj/bRfP8ZJmSn2LCVyAlh6HNP5BOcChLz+v4M7g9+kEQxaW
OVJoe1dfiA1Gzxf6dk3WAdE2tvffG0Ln2ut2KlRRJ41a/gYIHnHjlQjVaGAGQPRF
aYIa2ExqYynHoxl3Maw1ebDjHOZLVd1DdNi76OwXpSM5dpx/6MWD3kAGb1uQStk6
OJN3RQa16tNNgj+vzQJ/ep8YX6faWSLNfF0VgXgpYiGajc1qIhCAa+kDbozuoBgJ
F04slwBUxJt1uiEzwn5D14id57FK4GV02EHRuEOMsYSdQ2GGNygnh3Cq6Z0bvxG8
LvP8i+fUfJBydDpBKnOC2wxc3fea0+RWN4stojTfur3mgHmoL5p5xrRUqkNizBdo
f8SxhNKfMu6AeNqqR9LoKoPFt/UOGjsKazQooiqo5/+bYJtAVzSqlJ3txc+WiP+V
K41BvST24EV//sP/2EVfoD6h9rr6WKEpLOjCDNVzkphETEme9kHuU4nokir4NkB2
RzcT6xImXfjpXu1tm8R5rGvoykVcvzhrNFG+qeLyaZX3eDLmsgcl7q99ML+rUAR/
goKv2oLuIeyB7/gfkDunnRtNjvo5wp9kGW0YzCYvM27/FrRPd1A=
=Jwlt
-----END PGP SIGNATURE-----
Merge tag 'samsung-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/defconfig
Samsung SoC defconfig changes for v6.17
1. Multiple SoCs (including Samsung, Apple): switch sound to module from
a built-in, because it is not necessary for booting. Also drop
redundant sound codec options.
2. Enable PMIC drivers for Google GS101 Pixel 6 phones: MAX77759 and
Samsung PMIC over ACPM protocol.
* tag 'samsung-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: defconfig: enable Samsung PMIC over ACPM
arm64: defconfig: enable Maxim max77759 driver
arm64: defconfig: Drop unneeded unselectable sound drivers
arm64: defconfig: Switch SOUND to module
Link: https://lore.kernel.org/r/20250709191523.171359-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes and New HW Support
- alienware-wmi-wmax:
- Add AWCC support for Alienware Area-51m and m15 R5.
- Fix `dmi_system_id` array termination
- arm64: huawei-gaokun-ec: fix OF node leak
- dell-ddv: Fix taking psy->extensions_sem twice
- dell-lis3lv02d: Add Precision 3551 accelerometer support
- firmware_attributes_class: Fix initialization order
- ideapad-laptop: Retain FnLock and kbd backlight across boots
- lenovo-wmi-hotkey: Avoid triggering error -5 due to missing mute LED
- mellanox: mlxbf-pmc: Validate event names and bool input
- power: supply: Add get/set property direct to allow avoiding taking
psy->extensions_sem twice from power supply extensions
The following is an automated shortlog grouped by driver:
alieneware-wmi-wmax:
- Add AWCC support to more laptops
alienware-wmi-wmax:
- Fix `dmi_system_id` array
arm64: huawei-gaokun-ec:
- fix OF node leak
dell-ddv:
- Fix taking the psy->extensions_sem lock twice
dell-lis3lv02d:
- Add Precision 3551
Fix initialization order for firmware_attributes_class:
- Fix initialization order for firmware_attributes_class
ideapad-laptop:
- Fix FnLock not remembered among boots
- Fix kbd backlight not remembered among boots
lenovo-wmi-hotkey:
- Avoid triggering error -5 due to missing mute LED
MAINTAINERS:
- Update entries for IFS and SBL drivers
mlxbf-pmc:
- Remove newline char from event name input
- Use kstrtobool() to check 0/1 input
- Validate event/enable input
power: supply: core:
- Add power_supply_get/set_property_direct()
power: supply: test-power:
- Test access to extended power supply
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSCSUwRdwTNL2MhaBlZrE9hU+XOMQUCaH40yAAKCRBZrE9hU+XO
MbSEAP4tNEOahKx4ER4Awg7BvJKY6lfifKvu1yt5K3/aWde9VQD8CRv99ryV3kAy
EX3Ut1otWsB7UY7+tfV8WeYmXutf/Qs=
=wHun
-----END PGP SIGNATURE-----
Merge tag 'platform-drivers-x86-v6.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86
Pull x86 platform drivers fixes from Ilpo Järvinen:
- power supply code:
- Add get/set property direct to allow avoiding taking
psy->extensions_sem twice from power supply extensions
- alienware-wmi-wmax:
- Add AWCC support for Alienware Area-51m and m15 R5
- Fix `dmi_system_id` array termination
- arm64: huawei-gaokun-ec: fix OF node leak
- dell-ddv: Fix taking psy->extensions_sem twice
- dell-lis3lv02d: Add Precision 3551 accelerometer support
- firmware_attributes_class: Fix initialization order
- ideapad-laptop: Retain FnLock and kbd backlight across boots
- lenovo-wmi-hotkey: Avoid triggering error -5 due to missing mute LED
- mellanox: mlxbf-pmc: Validate event names and bool input
* tag 'platform-drivers-x86-v6.16-4' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86:
MAINTAINERS: Update entries for IFS and SBL drivers
platform/x86: dell-lis3lv02d: Add Precision 3551
platform/x86: alieneware-wmi-wmax: Add AWCC support to more laptops
platform/x86: Fix initialization order for firmware_attributes_class
platform: arm64: huawei-gaokun-ec: fix OF node leak
lenovo-wmi-hotkey: Avoid triggering error -5 due to missing mute LED
platform/x86: ideapad-laptop: Fix kbd backlight not remembered among boots
platform/x86: ideapad-laptop: Fix FnLock not remembered among boots
platform/mellanox: mlxbf-pmc: Use kstrtobool() to check 0/1 input
platform/mellanox: mlxbf-pmc: Validate event/enable input
platform/mellanox: mlxbf-pmc: Remove newline char from event name input
platform/x86: dell-ddv: Fix taking the psy->extensions_sem lock twice
power: supply: test-power: Test access to extended power supply
power: supply: core: Add power_supply_get/set_property_direct()
platform/x86: alienware-wmi-wmax: Fix `dmi_system_id` array
Add device tree entries for GPUs in M-series SoCs
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Sven Peter <sven@kernel.org>
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Link: https://lore.kernel.org/r/20250710-sgx-dt-v3-2-299bb3a65109@gmail.com
Signed-off-by: Sven Peter <sven@kernel.org>
Add bindings for the GPU present in Apple SoCs
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Sven Peter <sven@kernel.org>
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Link: https://lore.kernel.org/r/20250710-sgx-dt-v3-1-299bb3a65109@gmail.com
Signed-off-by: Sven Peter <sven@kernel.org>
Now that the dt-binding has been extended to allow indicating the bit
position the following warning about a duplicate unit address with W=1
can be fixed:
arch/arm64/boot/dts/apple/t8103.dtsi:764.46-767.8: Warning (unique_unit_address_if_enabled): /soc/spmi@23d0d9300/pmic@f/nvmem-layout/boot-error-count@9f02: duplicate unit-address (also used in node /soc/spmi@23d0d9300/pmic@f/nvmem-layout/panic-count@9f02)
Fixes: d8bf82081c ("arm64: dts: apple: Add PMIC NVMEM")
Link: https://lore.kernel.org/r/20250610-nvmem-bit-pattern-v1-2-55ed5c1b369c@kernel.org
Signed-off-by: Sven Peter <sven@kernel.org>
Patches from Peter Chen <peter.chen@cixtech.com>:
Cixtech P1 (internal name sky1) is high performance generic Armv9 SoC.
Orion O6 is the Arm V9 Motherboard built by Radxa. You could find brief
introduction for SoC and related boards at:
https://radxa.com/products/orion/o6#overview
Currently, to run upstream kernel at Orion O6 board, you need to
use BIOS released by Radxa, and add "clk_ignore_unused=1" at bootargs.
https://docs.radxa.com/en/orion/o6/bios/install-bios
In this series, we add initial SoC and board support for Kernel building.
Since mailbox is used for SCMI clock communication, mailbox driver is added
in this series for the minimum SoC support.
Patch 1-2: add dt-binding doc for CIX and its sky1 SoC
Patch 3: add Arm64 build support
Patch 4-5: add CIX mailbox driver which needs to support SCMI clock protocol.
Patch 6: add Arm64 defconfig support
Patch 7-8: add initial dts support for SoC and Orion O6 board
Patch 9: add MAINTAINERS entry
* newsoc/cix-p1:
MAINTAINERS: Add CIX SoC maintainer entry
arm64: dts: cix: Add sky1 base dts initial support
dt-bindings: clock: cix: Add CIX sky1 scmi clock id
arm64: defconfig: Enable CIX SoC
mailbox: add CIX mailbox driver
dt-bindings: mailbox: add cix,sky1-mbox
arm64: Kconfig: add ARCH_CIX for cix silicons
dt-bindings: arm: add CIX P1 (SKY1) SoC
dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using this entry as the maintainers information for CIX SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Fugang Duan <fugang.duan@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CIX SKY1 SoC is high performance Armv9 SoC designed by Cixtech,
and Orion O6 is the motherboard launched by Radxa. See below for
detail:
https://docs.radxa.com/en/orion/o6/getting-started/introduction
In this commit, it only adds limited components for running initramfs
at Orion O6.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Enric Balletbo i Serra <eballetb@redhat.com>
Tested-by: Kajetan Puchalski <kajetan.puchalski@arm.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com>
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree bindings for the scmi clock id on
Cix sky1 platform.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable CIX SoC support at ARM64 defconfig
- Enable CIX mailbox
At CIX SoC platforms, the clock handling uses Arm SCMI protocol,
the physical clock access is at sub processor, so it needs to enable
mailbox by default.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The CIX mailbox controller, used in the Cix SoCs, like sky1.
facilitates message transmission between multiple processors
within the SoC, such as the AP, PM, audio DSP, SensorHub MCU,
and others.
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Reviewed-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com>
Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a dt-binding for the Cixtech Mailbox Controller.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com>
Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree bindings for CIX P1 (Internal name sky1) Arm SoC,
it consists several SoC models like CP8180, CD8180, etc.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Fugang Duan <fugang.duan@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CIX Technology Group Co., Ltd. is a high performance Arm SoC design
company. Link: https://www.cixtech.com/.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Fugang Duan <fugang.duan@cixtech.com>
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Documentation/filesystems/sysfs.rst mentions that show() should only
use sysfs_emit() or sysfs_emit_at() when formating the value to be
returned to user space. So replace scnprintf() with sysfs_emit().
Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
Signed-off-by: Mike Marshall <hubcap@omnibond.com>
Patches from Ben Zong-You Xie <ben717@andestech.com>:
The Voyager is a 9.6” x 9.6” Micro ATX form factor development board
including Andes QiLai SoC. This patch series adds minimal device tree
files for the QiLai SoC and the Voyager board [1].
Now only support basic uart drivers to boot up into a basic console. Other
features will be added later.
[1] https://www.andestech.com/en/products-solutions/andeshape-platforms/qilai-chip/
[2] https://lore.kernel.org/all/20250602060747.689824-1-ben717@andestech.com/
* newsoc/andes:
MAINTAINERS: Add entry for Andes SoC
riscv: defconfig: enable Andes SoC
riscv: dts: andes: add Voyager board device tree
riscv: dts: andes: add QiLai SoC device tree
dt-bindings: timer: add Andes machine timer
dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller
dt-bindings: interrupt-controller: add Andes QiLai PLIC
dt-bindings: riscv: add Andes QiLai SoC and the Voyager board bindings
riscv: add Andes SoC family Kconfig support
sprintf() is discouraged for use with bounded destination buffers
as it does not prevent buffer overflows when the formatted output
exceeds the destination buffer size. snprintf() is a safer
alternative as it limits the number of bytes written and ensures
NUL-termination.
Replace sprintf() with snprintf() for copying the debug string
into a temporary buffer, using ORANGEFS_MAX_DEBUG_STRING_LEN as
the maximum size to ensure safe formatting and prevent memory
corruption in edge cases.
EDIT: After this patch sat on linux-next for a few days, Dan
Carpenter saw it and suggested that I use scnprintf instead of
snprintf. I made the change and retested.
Signed-off-by: Amir Mohammad Jahangirzad <a.jahangirzad@gmail.com>
Signed-off-by: Mike Marshall <hubcap@omnibond.com>
This adds new machines and improves support for already supported
MediaTek SoCs.
In particular:
- New machine: MT8186 Steelix Squirtle Chromebook
- Steelix-Voltorb's two dts are merged in one
...and improvements for already supported SoCs and machines:
- Added reserved memory for AFE DMA for MT8173/83/86/92,
aligning audio related memory allocation between all of
the Chromebook SoCs
- Added second source components for Steelix, and marked the
multiple trackpads for Asurada as such
- MediaTek Genio 1200: Enabled support for the Audio DSP and sound
- MediaTek Genio 510/700/1200: Added support for the PMIC Keys
- MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
- MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
- Airoha EN7581: Added ethernet nodes to Evaluation Board
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaHDJ4ygcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4AncBAIX2
3XCx3N6aNbmfFzBpTn+m9Bfm3jo+b03SENMgEIjPAQCblwCKBscAMAZ21HtbfBsN
sTGtpSFgrr11zbjltZ0gAA==
=2+oV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V7IACgkQmmx57+YA
GNlfOw/+N1uLjVqUaH9W7SlNLtelxivJuDznFxkM2mhn3a+mwXjKfr/taePuJtT9
9Lo+wYwmRiCJDNW2BWH8kT9pgfQ13gXnmiqsJQtqdvrhoW/trtgqZjwyAE7bUzlK
/ReblxDf3iLlqydoIutDUL8C9va6yTBqDr2J6HuYXqcliWZgxm6KPAK1vnqQZ9+j
7kf911E1tTrYZ4cGRa7aIdtHF7OilhQxSYyrv8I0gFtBD7P+dZA8cyqf5Vtw59G6
zt7tab22/WMZUHjJSrR1HRWVvrQ5IaYvirsm1RBcdfn3AlNzRXoPobhHo2oOCqyX
gWtx3nKyI5cPW78PJL3LwpOcXyZduwDKI1y6yYbp53bo3kjKIEjGgbAXh8wJ9mXu
wPYHwlAMn9xTsszjBxfNjM1xlOd9Dkwv1Fwdlsk9omDPKUZGfliSNVC4ldWPbGRz
F2e+cXVAgQ5BpR8Vh9FaNpazMgB93xwxY5NZMniVcl99MhCbm5Q0sSw+FxkOXg03
70tHKG501/gm7l4W3C9jUSdwsabpq7krLzYAypACgmYv/By9xXHsFJa5W+pVUDZq
WKwjZVa8gUr0YLaMJrhEWo9DaxDe+jpYcySEgQGQSOctEhYKaj+zofkaXsUfZ//9
ZPx8S/REHQbXyE0F9xQKXY7RJLIebtKzvK2sTuqhwS/VNKqZiO4=
=xfLP
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DeviceTree updates for v6.17
This adds new machines and improves support for already supported
MediaTek SoCs.
In particular:
- New machine: MT8186 Steelix Squirtle Chromebook
- Steelix-Voltorb's two dts are merged in one
...and improvements for already supported SoCs and machines:
- Added reserved memory for AFE DMA for MT8173/83/86/92,
aligning audio related memory allocation between all of
the Chromebook SoCs
- Added second source components for Steelix, and marked the
multiple trackpads for Asurada as such
- MediaTek Genio 1200: Enabled support for the Audio DSP and sound
- MediaTek Genio 510/700/1200: Added support for the PMIC Keys
- MediaTek MT7988: Added Cache Coherent Interconnect for CPU DVFS
- MT7988A-BananaPi-R4: Enabled CCI, added GPIO LEDs
- Airoha EN7581: Added ethernet nodes to Evaluation Board
* tag 'mtk-dts64-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
arm64: dts: mediatek: mt8395-genio-1200-evk: Add MT6359 PMIC key support
arm64: dts: mediatek: mt8390-genio-common: Add Home MT6359 PMIC key support
arm64: dts: mediatek: mt7988a-bpi-r4: add gpio leds
arm64: dts: mediatek: mt7988a-bpi-r4: drop unused pins
arm64: dts: mediatek: mt7988a-bpi-r4: add proc-supply for cci
arm64: dts: mediatek: mt7988: add cci node
dt-bindings: interconnect: add mt7988-cci compatible
arm64: dts: airoha: en7581: Add ethernet nodes to EN7581 SoC evaluation board
arm64: dts: mediatek: mt8192-asurada-spherion: Mark trackpads as fail-needs-probe
arm64: dts: mediatek: mt8186: Add Squirtle Chromebooks
arm64: dts: mediatek: mt8186: Merge Voltorb device trees
arm64: dts: mediatek: mt8186-steelix: Mark second source components for probing
dt-bindings: arm: mediatek: Add MT8186 Squirtle Chromebooks
dt-bindings: arm: mediatek: Merge MT8186 Voltorb entries
arm64: dts: mediatek: mt8395-genio-1200-evk: Enable Audio DSP and sound card
arm64: dts: mediatek: mt8192-asurada: Reserve memory for audio frontend
arm64: dts: mediatek: mt8186-corsola: Reserve memory for audio frontend
arm64: dts: mediatek: mt8183-kukui: Reserve memory for audio frontend
arm64: dts: mediatek: mt8173: Reserve memory for audio frontend
Link: https://lore.kernel.org/r/20250711083656.33538-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.
In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaHDMLCgcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4Tx0A/0ul
iMSrLva3h+HjH0yN+O9CTPJHe01KFbdkG7zW174iAQDR0SdGpH352LcTM2Lmo17K
4XS5JLI+mkY2XrUS3c2XDA==
=bxBl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V3EACgkQmmx57+YA
GNlnSA//YWBeTPgdk9Y+yGn0LLtYz9ug8sOnCIwUt6hK8CJYAedlSeGqmpAvdUDU
gMEXYiI/KKDKh11Mm+SO9p684Ykjh0PST18FUWxrpbvbB3rI0zWJnAKSq1amRgD7
lVwC6LO/M1XbPBQzwKhcBH2cvTbYAYfcGlLBESu5zFAXFslF0Pue9LMfL3UlgT3C
wzX4Z4UeQO3Y77a8kYj/PKJawv78Z63TwTBX2W6fHyHAVCGSsMlJJUEGW4xSYLWM
xxeZAdy3qoRCxS+iZZ6proaU0WJejrMABgvzQ3NECSFg8xZzdBmO40mF8K2ZA1PW
NS+DLkAaBdS/3wnyogqQDIZXLweipdrz9eQWNmUKIOPBE9ga7YbefJr8i/rXOKzA
pFxgfBceAgVO+JShFGOKM7uATd3O48mb/VIqsHkZNpGogh/V2TLEouJ6ts9QeEpf
QXhIKJvaLo6ZDFz2Yl9R+RXAzyiUTIjqGHXqeYk8FI+jfioUCEVDV78Smqo/kQBW
yaz+QrfARe3KOlgV4XqJOpZPKyxK8Iytf0FkJK0SGFsu7C1dQ8XbS4ajEdRHoyC4
1KnsL2vG3G0LcJbHL1m8VaxYxmep9mgKGygMwgeaJ+aA9yWIO2cmjkab4SrNpG3m
KCL5eMectDjtwW2es5gMnqLBeOMk4HRTqybAQksLPcebVdzZFJc=
=Dq3g
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek mach ARM32 updates
This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.
In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.
* tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
ARM: dts: mediatek: add basic support for Lenovo A369i board
ARM: dts: mediatek: add basic support for JTY D101 board
ARM: dts: mediatek: add basic support for MT6572 SoC
dt-bindings: arm: mediatek: add boards based on the MT6572 SoC
dt-bindings: vendor-prefixes: add JTY
dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572
Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch removed the code where num_sources should be the same as cn_list.
For better resilience, it would be preferable to explicitly add the route
mapping the input pins to this MU entity.
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20250721112346.388542-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
One initial setting is 5 bytes, so num_init_writes should divide by 5.
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20250721112334.388506-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmhv3EodHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX9Cw//XWLtoi801lmFZd2Q
mC+nWCAha2c0QJzkaHspvRkHxeuQ4E0NS5APd8tMdKas1gW8fUk+LZp5TmQs8bMp
cgJLuP4E01DvcZ3hd3P3Ep+tYI7CqNoLnYqvbmQNGiCOXfZY7i+tIi/NfyZIvyXv
KmEaFTPjp2J7JQ5L3YL74TseqxFROzrqqaFEYAHFYVwheVmA23CyyNwLRfyiInA5
K8hIgNJVWhuCjCzYIBpDdcsyZ/olMGRLpYdEs7tCKoj2WeDauyfergI+3Juopc5Z
G85rYu+30BXlvNJQuvFvk/gb9rwqPGGVY4W+ienLSKCqnAD4QupdPUZwkoyFcSqS
/bx41/a9H5fxOt3SWzPD1vlb7Hj+ZVhu01pwbcBQXb3hJGtkbArVsNuwjhqykB+S
2+MXAxHpwUdYSBRUJtKcIeqssJYU0ODEF+8ELUJnnIdM0uvo2U31mb9xlIa66wb3
WDnH22ic1JoKIf+wFiJ4cuRp2f7pVyLS6+3Il+prHTvFj79bLOv5L97ptoZUD0KR
24qgNknBlcf7kLBiSJHxfbyz2QejPuvWjIJvXTl8fixKWV3ZgcpGZWRrPjQ+wmQ1
b7N7Z1Z5UH8+48S9151yhPax2/69JU6ARnT4YnC5qdQxmp5GdBblURZjwbHcghvK
BwIizx2zERnTEPTwZ2HDyVqtUXE=
=rp+j
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VwYACgkQmmx57+YA
GNlSehAAtQv10iNUatadP4W6SmfhfE//JJklJ3I+7zZo061mSNyUKdu4lnCcXIQz
oxavuxttwF90PxvtMn5x6tWHsAvb3CG5+5IMxJ5/ud+QkQH8XC6W6+PpmGe37JQb
tn94igNVVov6IA6SUDMRg4Sy/rTXIr9HN+YKV1zpE7zjxMHwbCl9isHepCY391i9
5E/1mM/8NnkNjHqc08KBjGYbmDqwWEgN+R2YDRb2wPBAxsD1gCSZkr8YWR6deO2D
Mdj8kO4Kkd5z/seCtCFf9imm7L7p6IaKoG4CnERcWCmOM25tppmwPjfaKtVUkTJG
c6nZJAUWXSUEfRTdSO22Z1CQFkKowOS0f6NbIhlwwtnaCLp0FEsP7sHJFBcXQ8mc
BRLjoM7qfuBjOinv3A9EqwdD/WJ8hQ/0jc+Dha8N8KJI5KU6NqJ8SA5xMiyfbhBi
KlQXZpnktDMZaohvlNN5c4q3QL0Jfj+eFJS0pL5rqtMmrDxHURgQQvDk8DCORfMM
DvxHBUQtU7qU42hxYCt9+wGnvxAwm5nSdp2BG08q9bvpKDBeqtVBn3+Prr3FX0Mt
KDkYBtnAT9UP11AQ7etqJCTj/eoTz7q++nfT/onlktVcbx1mvD2XIMSR6cauTfqk
9SwR9EbqfQ9BaEZFWWzzkvpBDhgTRADvLEO3fg3Kqhm/HaGOJsE=
=fq/y
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: remove empty line in stm32mp251.dtsi
arm64: dts: st: fix timer used for ticks
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
ARM: dts: stm32: add stm32mp157f-dk2 board support
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
arm64: defconfig: enable STM32 timers drivers
arm64: dts: st: add timer nodes on stm32mp257f-ev1
arm64: dts: st: add timer pins for stm32mp257f-ev1
arm64: dts: st: add timer nodes on stm32mp251
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sakura Pi RK3308B - all of them have the used soc in their name.
New overlays: RockPro64 screen, optional Sige5 Wifi/BT module,
ethernet-switch addon for Jaguar.
Added peripherals on rk3528 (spi, power-domain controller, gpu)
and sdio controller on rk3576.
DSI display support for the Gameforce-ACE handheld, a fix for the
cover-detection (closed/open) on the PineNote, camera support for
the Haikou Video Demo overlay on PX30 Ringneck as well as a number
of other newly enabled peripherals on a number of boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmhvlYoQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgYQVCACJ/OziWNpSWMLP5L7mBqyiN16oiLUqhyde
/wYlS2e9u4jHs6KtRMNMvzBpGNXaQY5ybSo9LCBzn5YHD6dmatpBB4yx0C29Knwm
o1QS0E4A5iWYH2uxAEwVGjhZkAnLIDkSR9yCDNNgUVnyLKbsyDVemIfj1QDwAQHk
WaPXkoaThsyVldU0404TA6JOLhOjVU8ON0BaYcKH9vYv/UNrFN4DxkXh+1jsFhdw
1ry27DC0vi+cJPNYoRqFTXKeN6tWhvrjnrX1Gi6Jk8sKEwDcpsBjKREXr9e6A1WN
2fuef1zpa3rdOW8uH6/dltjWh7BbnnJ7JNQo1g/Db5M7GqKuS9wq
=JiLV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VrMACgkQmmx57+YA
GNkMHg//T758/giBtfTytRD5wdieMUAoDPPMvfaSV1VoUtbAaf7p0kG585UCK84m
3FWoCHzLXAHIYY7IBkBo0cEWY4L+65xCU047K6B1f/CC5/izjixNRsnsN58TqUxS
GLWKvUrlNG4OzsvWU5EhrKeJxyhoSj8zu1K/JLLDMnKgbKuDXLoJuFjwcWthjZOz
c4et0S2e7HCZitTgNjClkqLyA5mdk8NjgXy70weXrJCb1wmru9WFdOQK4FxP5ycg
pTBe98RFStKgc6K3BY+Se5haFnonbdUPMcRK4mFuyR3eX67xwT6OvXkffJSiljbU
YpiyOo4UPcMOAh8VngE6gARCH+rLts0RhCTXOVnSm0GPLOJFnKfGW7lOesvzWSLB
U8GYeEnD8Q9kOQ8CCZO5r0Z5yefNuXBzsvpUtwk4gh3n07r0I83UsSIQrZRVZZdf
YV/Vs4cWGEt8JLXiOOYYoxXY+Z4OCjv700gIE7NChKK7MfukYpedxDxU6ItRmQ4K
hWxX+oKUiCryepAXEEYo0tx4kfH6Vt7b64iArSrXlRPYFp7i2xDkRRvtUl5rNFs+
q4DRdcHYdPs0WMGcMkT46MSrwrECv4osPDawHvHcZnrym90w1KnuQyyvNSk7M9Ww
r0R3CohU693ALWDLT2vyYZNOXdSdOjma6hLAcUTso95lZA6RFRk=
=93Fr
-----END PGP SIGNATURE-----
Merge tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards: ROC-RK3588S-PC, Luckfox Omni3576, Radxa Rock 5T,
Sakura Pi RK3308B - all of them have the used soc in their name.
New overlays: RockPro64 screen, optional Sige5 Wifi/BT module,
ethernet-switch addon for Jaguar.
Added peripherals on rk3528 (spi, power-domain controller, gpu)
and sdio controller on rk3576.
DSI display support for the Gameforce-ACE handheld, a fix for the
cover-detection (closed/open) on the PineNote, camera support for
the Haikou Video Demo overlay on PX30 Ringneck as well as a number
of other newly enabled peripherals on a number of boards.
* tag 'v6.17-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (40 commits)
arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20C
arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7
arm64: dts: rockchip: enable PCIe on ROCK 4D
arm64: dts: rockchip: Enable HDMI receiver on CM3588
arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576
arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576
arm64: dts: rockchip: add DTs for Firefly ROC-RK3588S-PC
dt-bindings: arm: rockchip: Add Firefly ROC-RK3588S-PC
arm64: dts: rockchip: Enable GPU on Radxa E20C
arm64: dts: rockchip: Add GPU node for RK3528
arm64: dts: rockchip: support camera module on Haikou Video Demo on PX30 Ringneck
arm64: dts: rockchip: add label to first port of ISP on px30
arm64: dts: rockchip: fix endpoint dtc warning for PX30 ISP
arm64: dts: rockchip: Add power controller for RK3528
arm64: dts: rockchip: enable USB on Sige5
arm64: dts: rockchip: add overlay for the WiFi/BT module on Sige5 v1.2
arm64: dts: rockchip: add version-independent WiFi/BT nodes on Sige5
arm64: dts: rockchip: add SDIO controller on RK3576
arm64: dts: rockchip: Enable gpu on rk3576-evb1-v10
arm64: dts: rockchip: Update the PinePhone Pro panel description
...
Link: https://lore.kernel.org/r/15465458.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2),
- Add eMMC and microSD expansion board support for the RZ/V2H and
RZ/V2N EVK development boards,
- Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
Carrier-II EVK development board,
- Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
development boards,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaG7EigAKCRCKwlD9ZEnx
cBnjAP9cDAfZu95YckrxmwO69tX6WsmhYNSjj5/F8R8k5RQJ4wD/eqUamW64PQJ1
re7046dS4tgywcWV5oaxssirwOUfbgA=
=5XW/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VhEACgkQmmx57+YA
GNn+UhAAwqYLWkIW/MAtBcyJXg7MkXf2AMNEv7C67gQnqT34DmfQ3Fm9e0FdErf2
C/BwA06yh2TuXEppC38IVAB9uDAPZ1zYgTvkZWrBjzztpsvVhy1Dc3gejAIwFyWt
C/jDkIHt/IsI9u88LcMl7BpWjllN2AdWGRmQSp2pGn8N7IsDZUjcGUwS7ZI6dWWs
Yf0FjDrDySsQbyC8ZxN2hFtsMLD3wPKOvnWzxDRISVZSy7l6N7iHrPEalLLBk1lL
SpP5ngXphFarWvbaBEXl5D+EmfZ40Hj1mtkJoOtuZBsmFrpYpZKifbvnYlVSRci4
AOrsa3vsDkZGv7SF0hrJLpXfnw+SpnkQgyz3qgW8wwk/eqhAaHkYEJR+soZMtdPC
oYe0jLJLKylbYMSfOUUQqB7QttWpM20LWtPrqbsdw+CdHYA071hLmtHQCKJx5J77
lxQ4+CDqi89/NyQzD7UFmF2TNzinajpYmQoiXYKGl3ZExW6PXfhQIlWDU5biYLpZ
hMjKSewoepkjM+WHh5djU43R4IcHevNv24vr+TzS8PT8CszsOBj50GbZxEQuZpYC
LsveWVUyijGApBSu5bj7Dkc9D1g2yUPdV+bo0wIIzPh3bDZK6ZcEafIcuBqBQEF8
xEfCnXa2vh/eubd2D4PeIIF3LwKuVvsdEhfvMQoQpkCw6MW9ApE=
=ZLEx
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.17 (take two)
- Add support for the Renesas Gray Hawk Single board with R-Car
V4M-7 (R8A779H2),
- Add eMMC and microSD expansion board support for the RZ/V2H and
RZ/V2N EVK development boards,
- Add GPIO keys and Ethernet support for the RZ/G3E SoM and SMARC
Carrier-II EVK development board,
- Add QSPI FLASH support for the RZ/V2H and RZ/V2N SoCs and their EVK
development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.17-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable serial NOR FLASH
arm64: dts: renesas: r9a09g057: Add XSPI node
arm64: dts: renesas: r9a09g056: Add XSPI node
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Fix pinctrl node name for GBETH1
arm64: dts: renesas: r8a779g3-sparrow-hawk-fan-pwm: Add missing install target
arm64: dts: renesas: rzg3e-smarc-som: Enable eth{0-1} (GBETH) interfaces
arm64: dts: renesas: r9a09g047e57-smarc: Add gpio keys
arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKs
arm64: dts: renesas: r8a779h2: Add Gray Hawk Single support
arm64: dts: renesas: Add Renesas R8A779H2 SoC support
arm64: dts: renesas: Factor out Gray Hawk Single board support
dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
Link: https://lore.kernel.org/r/cover.1752090401.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
clock controllers and initial USB support. Add board using it:
Samsung Galaxy S22+ (SM-S906B), called G0S.
2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes
3. Google GS101:
- Prepare to switching to architected timer, instead of Exynos MCT as
the primary one.
- Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
charger.
- Add incomplete description of the primary Samsung S2MPG10 PMIC.
Several bits, like regulators, are still missing, though.
- Add also secondary reboot-mode, via MAX77759 NVMEM.
- Switch the primary (SoC) reboot handler to Google specific
google,gs101-reboot which gives additional GS101 features (cold and
warm reboots).
This change will affect other users of this DTS, but to our
knowledge there is only Android, from which this change originates.
4. Exynos7870:
- Fix speed problems in USB gadget mode.
- Correct memory map to avoid crashes due to secure world.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuvdgQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD148lD/4yz90jRLtUBEIA3ZStxsPlN3G/CPGfj9Kq
LIcILKZTrQrPNioAvKHHxRIi7bgi3peKXgxsFCDRrPYfnBFhXLLwzuPGp/OXS5O2
5UbZ2bRlUkgwGTvxhsVB3tmusOpX38yQOwiLILopbFRBddW4tl/qrlZE6WBECIPC
Qc7iKRWGinBcSFwuvgPXrGizR5ELqsCN8xltRjKdp2mqeTFsjp7KAl/R6EmBsc2x
1mftMrZ+bob80INriZbUgvdsgjSVqslTy1FnIpa422uIAxOwXyTkkiYr2Sfv/Lr1
Y2iDeJWG1Kuq8jLxW6LHVacnBp4Vic6aVmf9OMIoU3i2IVjg/u6ueK1JnUtty4cp
wVc6UFsvRAbmt1CZII3W6GYnOPuBU4DrBrLJAqgsow45fP16eDl+svpmmT1D4Dfc
9xHvZeDyKk2GlTrWPhKfDlamVQ37zQ13YOLAkzx2skHpx0h8tPeLAGjQwCp4SalC
TtyVphy3myvnGlc2fn1QjJNfXUdr6+ouu3152lA9xmsSFiq1A7Z4OHpFUicMfmkw
BfC5OWGft0pBgUuxOGuQdz7WN2tnp4sgYXHkEcJsNt5JNDtO36N7JVgLezsX6y4u
AdUNNO7pkOQzgB3ZZvgAIoY8ItIK5dz0AoS5jToWV4qpBkayOYTXZtpvE3XkXS0m
aBnPVAErww==
=b2be
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VdoACgkQmmx57+YA
GNnd3w//eBEpRVzKvgJj0+eYEEIUgH7kY1Q8B4TSEtCmAozAxoBmRzDuCF/XFerX
+7bDMZ7bSSSCRvZv3jsMfUov8cIOR0mKbSb8N+C8SvhIQgAC4/R/q57kI3RSg/Kl
oRsLLBV3L2c2ZNFMQdxxzPRQ5Gl8g0Y0LQMSBX9MLepbDPntK8eqVFkghZ4bKURO
jY0+j9gPoXXQnpN7+CJFV4qaVbkfZ9AWR275M6r4Hm9KenRpzNTZCBqX0SVheBHc
MlW8IyaYtqkaOO1Io8laVXrmT6x9iUdfwILRCuPEWcmC4lHZsXbfZTCXfMBI+a35
3dRIi46N/rucd3Ei4FcQ6TP3qZW6yq15E7In1fnmoTYBSf5I43JG68rBGkqovoiy
uIYDLqVgSazplTpp0kO2/y9utI0nNHORnH2E8AcqLzgQ/nJcRgBZkEEDzaT+X3P0
EQ+0Vc8h9h9RU8xRRlKITM3US1/iWED6HPVrtKo8fSBGn4Wfd3iOSE9zUIKLKNse
YtQmLCO+o3HVfKcNkeWysst4bJEQlQlUkxM7/sCKHnXE+6e8rD5Cs+bVANkHkR9J
RkBM6Fl8sEKwKM/aRQnIxzr5FqaoloNDjPEEO+OCZhQ3+1EVT53b2qsQf9EzPKdg
ffkDCQBvmGFpVPAIf+NFrcaT5hBLpXj2rL0Tb06UUl/Ub8XPcwY=
=yEQ9
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.17
1. New SoC - Exynos2200 SoC - with basic nodes, pin controllers,
clock controllers and initial USB support. Add board using it:
Samsung Galaxy S22+ (SM-S906B), called G0S.
2. ExynosAutov920: Add CMU_HSI2 clock controller, remaining SPI nodes
3. Google GS101:
- Prepare to switching to architected timer, instead of Exynos MCT as
the primary one.
- Add secondary Maxim MAX77759 PMIC to Pixel boards, managing USB Type-C and
charger.
- Add incomplete description of the primary Samsung S2MPG10 PMIC.
Several bits, like regulators, are still missing, though.
- Add also secondary reboot-mode, via MAX77759 NVMEM.
- Switch the primary (SoC) reboot handler to Google specific
google,gs101-reboot which gives additional GS101 features (cold and
warm reboots).
This change will affect other users of this DTS, but to our
knowledge there is only Android, from which this change originates.
4. Exynos7870:
- Fix speed problems in USB gadget mode.
- Correct memory map to avoid crashes due to secure world.
* tag 'samsung-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos7870-j6lte: reduce memory ranges to base amount
arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amount
arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget mode
arm64: dts: exynos: gs101: switch to gs101 specific reboot
arm64: dts: exynos: gs101-pixel-common: add main PMIC node
arm64: dts: exynos: gs101: ufs: add dma-coherent property
arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
arm64: dts: exynos5433: Align i2c-gpio node names with dtschema
arm64: dts: exynos: gs101: Add 'local-timer-stop' to cpuidle nodes
arm64: dts: exynosautov920: Add DT node for all SPI ports
arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes
MAINTAINERS: add entry for Samsung Exynos2200 SoC
arm64: dts: exynos: add initial support for Samsung Galaxy S22+
arm64: dts: exynos: add initial support for exynos2200 SoC
dt-bindings: arm: samsung: document g0s board binding
Link: https://lore.kernel.org/r/20250709191523.171359-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
