Commit graph

1,399,042 commits

Author SHA1 Message Date
Arnd Bergmann
b9e82beb37 New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
  - Cobra and PP1516 from Theobroma-Systems (build around the PX30)
  - Radxa Rock 5B+ (rk3588)
  - Rockchip RK3399 industrial eval board
 New peripherals:
  - GMAC + SDMMC/SDIO on rk3528
  - SAI + HDMI-audio on rk3576
 Interesting general updates:
  - move rk3528 i2c + uart aliases as requested
  - rk3568 PCIe3 MSI to use GIC ITS
  - update deprecated dwmac reset properties on some px30 boards
  - updates for cypress usb hubs on some Theobroma boards
    Binding taken with Greg's blessing
    https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmgpowIQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgetSB/9Y8zHYt6QdUIjDjbLeniD5cD1mRuSg4vAe
 NtpdAMw4ra6mzT5Hv5AMBaKxAHf+4YZau3/v+4fp1Ig4y1l9KoZlupZ5h2lDALJ8
 00GABgyhc0r9VsAiuuK3oOokZO5JTsav59ltq4zF6+ZnvjtfxWxiclDHzp+VX3x9
 FM58iH81NT/+8G7yIzkdahZRdqDrnSr8mbnsKsMj8V3XjkHjphnOMdi9GCpNwyKy
 RM3Fd+bL2yIsPF6YgmXuiXmjnLZEOIz3IklMKDd/EFYf0lIpegtUVogUtAh/+aP9
 NM+eqydudyZMipF4exr0wtGI9TZAt1umBDtMmNm/0jAHtZUC9qxN
 =fi8d
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTy8ACgkQmmx57+YA
 GNnpdA//VngVV9rEeqrXEpF1LeELrilOP0gHIchHPrpnlZ/ZOR44uNqBc3S7YbxS
 lkCBgWDUlepCq3JgyrtRnG+Vu7V52mtx/msxsyct3HAnJZb0zpAn77UjnHutu/yX
 d0q5TaF9gLDANqaHYtGIjzEJq+7D0HGak6fVLAvFn4NdHGX85MUX5ZLmDi/glzQZ
 0lWpVV1YqZudCtIanRp9TfFLuKMegfUm7wVOgDYMrSp1jK+Wh5Mc2dsFtOH2iNpG
 DoPd4l5I8Lsq4jmuzzvFVTSsBvyFkNKEFY0x61WSKaIibKHp4g9lGvECzDBdQtIP
 Bz1mn+UFYYWYNOYjG2ws84pG3vZ5tbpcxdCxglOBZL1LqTE19T8p5K555mDnxqnt
 d+BPuQdbcgKwI3449RHvOhxQDmeKC57GmIe6Q/npAX3pBr8NXJ3NW/rzno1PGMYT
 7mHTE06WTr+XLy9JXdvckj6yw9toYkE4/uWxFCKquzFuSWZZTIGmfM+a0Mx6ajb7
 1yNbr6Empp6HNaT+l/C2zEBUWfnpXFaVgPKf7ZSlRy80a+czElJLscugtMDJ7O7Q
 MlhoKebw524c1Fwtu1zSUkexirBTUTRTV7UwRIb/2qqXy0BlgSTf/mlHSMFn1nCg
 rDSe5rpnTIyb2YwhYtYXwqv5lzUh7tToeOGjLghbHh+ieGQPrqs=
 =1/Gp
 -----END PGP SIGNATURE-----

Merge tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
 - Cobra and PP1516 from Theobroma-Systems (build around the PX30)
 - Radxa Rock 5B+ (rk3588)
 - Rockchip RK3399 industrial eval board
New peripherals:
 - GMAC + SDMMC/SDIO on rk3528
 - SAI + HDMI-audio on rk3576
Interesting general updates:
 - move rk3528 i2c + uart aliases as requested
 - rk3568 PCIe3 MSI to use GIC ITS
 - update deprecated dwmac reset properties on some px30 boards
 - updates for cypress usb hubs on some Theobroma boards
   Binding taken with Greg's blessing
   https://lore.kernel.org/all/2025051550-polish-prude-ed56@gregkh/

* tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (35 commits)
  arm64: dts: rockchip: Improve LED config for NanoPi R5S
  arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants
  dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems
  arm64: dts: rockchip: add px30-cobra base dtsi and board variants
  dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems
  arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck
  arm64: dts: rockchip: add basic mdio node to px30
  arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
  arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
  arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
  dt-bindings: usb: cypress,hx3: Add support for all variants
  arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
  arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588
  arm64: dts: rockchip: Add RK3562 evb2 devicetree
  arm64: dts: rockchip: add core dtsi for RK3562 SoC
  dt-bindings: arm: rockchip: Add rk3562 evb2 board
  dt-bindings: soc: rockchip: Add rk3562 syscon compatibles
  dt-bindings: rockchip: pmu: Add rk3562 compatible
  arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
  arm64: dts: rockchip: Add GMAC nodes for RK3528
  ...

Link: https://lore.kernel.org/r/3998939.iIbC2pHGDl@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22 00:09:51 +02:00
Arnd Bergmann
ebe6d8f00d mvebu dt64 for 6.16 (part 1)
Clean up unused pinctrl-names in pca9555 nodes
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCaCdLrAAKCRALBhiOFHI7
 1TOYAJ0d34HPCixaDRy+AEBEm/diK2lXTwCePKsagKyaburwg1yVU4BBBFW7n1I=
 =l/EH
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTp8ACgkQmmx57+YA
 GNn77g//QBKjSI4u18ZLf0opK0CpyyMzPiDr3UZWjpMRfh+TPrrYgTUIffGfNcM4
 wnL6pbenp4HhLuzD/AXyONDnIrAwloslCg7vf4cuKelLRu91jHobmlhnd3b7PpTd
 2ZdUuz8dM9jbB2wRQVuqcEAsHmE86Gg0Ebh0zR01PVPlJizXoXNKJe5J8Zot0H68
 MN5liTX7133CTMdXZ9e9vjxtOjnjhkbtQwD1poRksj8jfbEiyvOEdXU9S0QFsau4
 FxMnQcoHc3wGngJBHzq0X7fNQVtLgN9y/lCGhosaM5vVH1IULN64XLETi/6EJiCL
 zm/xdMtd4KzdPvY7L5CSUGSvwQr/XbY6pTuDHIR41ckM8MndnIYSGZLwJFwCxe42
 8Dj+J/hGqphDzb1v1dnuxZtoD4Oo8F6vVrrerbqkhXhc653sIA7Q84ETH50rHJWU
 MiaFiN1ozTJYHVxJaI+fxdR/+osmzElr/rAItmC/QLkCTs+iyryFuRa9eJvSUPrB
 I5gS4jE/PxiWR1UTu3NHjQ0pxRcFos90BAg6aLhLQXXYmICJhfjfE8cE2Kr3hwZw
 VXTaoaw1qKqpdR5S/wbv2Q1hl/3cHYQ4u1fvLXDSkoFh9Z2FbMKBPUmFDipmVywD
 QyKdImuxt7gLHOtFTFXIhhdb0qGFou1ylZlbvhQtIoGgiDSmGfY=
 =L2yY
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt64 for 6.16 (part 1)

Clean up unused pinctrl-names in pca9555 nodes

* tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: Drop unused "pinctrl-names"

Link: https://lore.kernel.org/r/87tt5kpqy9.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22 00:07:27 +02:00
Arnd Bergmann
591ad24c6c Renesas DTS updates for v6.16 (take four)
- Fix White Hawk ARD Audio breakage.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaC2VHgAKCRCKwlD9ZEnx
 cB5BAQDpVLaDLUXAGlQ4xRuVc+L6wBOEMCAzHXI7/Yc8kuyFiAEAncUTklmubjWl
 xX9KT9gnqpYNeOyOeY9wo46+8XDKCAE=
 =btrB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTVsACgkQmmx57+YA
 GNk4tg/9Fp7TqL9F7EydvHE/bRGk2vmn1AkBGuStJGSViYAXwvMNbb9Z3UDvY+6e
 CvaHHa1WQZyrRojIV0OoH+WI0EggSzFJiT4ze45KJfEABzOLAvYz9Lf2YdhWVrpv
 xp1ZaUNmiyacLEHsaHju4ZJvnTOe20NxmYnmCL6Ugvm5mrYomKY2C9gWIvDqOLHd
 xx0M34RhWVrZYypiPj6B8q/IrSpTfQ3mUBfppI9DzSN/gcOINy8l85VA/pJkK9m2
 jMsylad/alI9dReMuruC6FrLpIPp1LrkDEm6s03uF+7wmUkdLLFs74jIvCh+sFkl
 7+4zBoxSUp0t4QUPQLKS8+K7Gg6u9Mx5jx+OxrpPGDT6Jk5C9XdeqooTI1LZiXMh
 dJyFchYiBoGLJx+9a+A20/D4Z6e6hKwapxKoKIp+jOcUyEr4Lz81RI99YGc7f05p
 3scD8cKzfxXJDK5U0iVX4vEEGALYxBdXLehaM8kTL0jzv+XKhmcZl108aMJm0yRR
 UNhD912xW2a+NLjUPUkvreekrRflicw/Ku/r5HWkV2FA+7JaAHhntHaJGedn7wti
 HS8+aWgjaDz20bny9PUh6uVM1Fh5sAvAydVdbDURI7O26jQuTWccOdXc9Yl9IGD0
 uSk3Px2REpiCv+SKLm37hYqU9ZrhEzurzsXGMtHIeKULmDhKWeQ=
 =+u6R
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.16 (take four)

  - Fix White Hawk ARD Audio breakage.

* tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups

Link: https://lore.kernel.org/r/cover.1747817851.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-22 00:02:03 +02:00
Arnd Bergmann
17e6320b0d Renesas DTS updates for v6.16 (take three)
- Silence a DTC warning,
   - Add an extra compatible value to avoid future issues.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaCc0KAAKCRCKwlD9ZEnx
 cODAAPsEBAJevvDIsROI/UQhwsUEjB5e39zNAAO1RjflLZ7UrwD/XwLNY+wekDBj
 4sncLWNlea1AuWinccy/2IHGDErOtQk=
 =ZMka
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTNwACgkQmmx57+YA
 GNmGGhAAviiM819ipH8+T8A/rBmpiLj9jJ5UBEIEuO1mxwIZ4yasJYph/9O52vKd
 gL5qQSFBllQCz3gijtQS3iN6vlsbbycgNk+kxheeFjEjBBr+Cni1V0ppK+9WQq9t
 0Dpgxm9ZsqL+o7DxIervv1mH8/KvDLERD7Ewiw56vyDaHevLuDfNy4PC2kCpUqdP
 0N5N6NTR/k84TdXI5+NJODjdWgT1eSIg8aiMEZvJ9d/aHfjjBIffLam1dgl/636Z
 g0jkfgWps1JTjleo4EWGRTqLqa9d1vK8NoBN+XkJ0j8EFeL6yfRqhGKqqdNsT1fc
 BKVy32YWU9MY4ZrnphtufJTi63qGBm6blIVF9k5NMZvVxswjGLGBwkznFE+plChH
 W+EZe3E5xHjOKGk+qT9zv2BPKaPUrNqBsEKPiEJFJC2MH9dj6xsA5V2JCN6jYu/9
 ScUoCX6vOzJuten6dd9l4AUzl+zLPZwJPPi3RoiAubhj2GVkvwvGPHT2qFXRyfT2
 njWmtEyNX3NNI12xQlKW97Kck2X2lLj537IPHQigpVkRNe0ghRoHbd8N3t4TL5xl
 CpdaVJR6r5iofAKA+U7I7XYh37ZqdnexAy98jBd+y8GQepWGYvIF7RKMuaSAwADl
 2cjTga3SCtARAhLfr57yHRo8Oty5QZPlRGtLpATJfVDkeWjNTEg=
 =D5fG
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.16 (take three)

  - Silence a DTC warning,
  - Add an extra compatible value to avoid future issues.

* tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  riscv: dts: renesas: Add specific RZ/Five cache compatible
  arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check

Link: https://lore.kernel.org/r/cover.1747399860.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:59:56 +02:00
Arnd Bergmann
00000994fe RISC-V Devicetrees for v6.16
Starfive:
 All Starfive this time (again), enabling the usb3 port on the framework
 laptop mainboard, and a few cleanup patches that are syncing things with
 the dts used by U-Boot.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaCcasQAKCRB4tDGHoIJi
 0jKFAP4uxRVZi+8D8s+eBHV7wa6otq7EpUVxE6jssKzMD7IZhAD+JlMp+S5iweQR
 Ge1d/HIntnQLl5ssqiP6y1DWdioqnA0=
 =Fn/d
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTF0ACgkQmmx57+YA
 GNmW1A//TJdf2AJNRQZmLrYpdfRkwYy+9xKD9rgBsuDbIQs2f61n8otPlPxeB89p
 WxIJejzmJnyUJm1AbakE7vNRwAkq8zQzvIhOncB8uzoOfZsWYD4/QcDxHACvmeWG
 +OQIoEADe9Z2T1nLhlCNejFmcbGuTlsM4EXtbwShRxx8djmDXKYPznKNbuDLHmKe
 l4RVrJET78DY+fvQsRYcEKkg1FDWblARVgwfFrVh1aTI2Wv1p9v4P3iSDG5YyJnj
 OPYRsogdGnKagPyU1rP3US3ecoFFu9bYNHfDcK9w8uKuR+qcZRkQOm7AuPLL6oaU
 JqT/Qxg15+mp/F6BN18LDNmTD96b7NUYlt0LbINLW9h3LBxIBe3NkGELVW+yQEQX
 PpHXDfOq+/sOIyar038Ee5xjmwT9h8cQxwXhAeDp94LBbmtxFUdtdsxz2pWcoHzO
 nfnET3UH+BRD+fcs+TXyGQMYVX904mPaHWJAAJRf9epOm1lFTcpYaQD02McqB5oE
 L/vBTvSg1tjpbB955SJ9GYk1MWZm9FFSOwmDrsukpDrJV//PDIul9aNSluv6XUtO
 yvNlbtl1GIvI1ar30R+4fZEYMilPNXNkFWY164mSakBDIRv7YqvwWRo93XXemBaj
 yljff1C819U4jhGRkSD0BAydF79gt0bZ8pBfaV/MHVk4spG4AVg=
 =Wsls
 -----END PGP SIGNATURE-----

Merge tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.16

Starfive:
All Starfive this time (again), enabling the usb3 port on the framework
laptop mainboard, and a few cleanup patches that are syncing things with
the dts used by U-Boot.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
  riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
  riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
  riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
  riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
  riscv: dts: starfive: fml13v01: enable USB 3.0 port

Link: https://lore.kernel.org/r/20250516-gap-exploring-f8f516ab4e1c@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:57:49 +02:00
Arnd Bergmann
ced334a21c Microchip ARM64 device tree updates for v6.16
This update includes:
 - fix CPU node "enable-method" property dependencies
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaCbPewAKCRCejrg/N2X7
 /WqgAP0Q9oqzqXEYIW2IN3q+Ah1E0A+i92fvSU7Jg/p3veYsMgEA+mSszEiEvGlK
 TivL6ZgcJavF+zviv+lFUyy/nzVzrQM=
 =544L
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguTEAACgkQmmx57+YA
 GNnl8A/+Mn6O8lruvi0dJrkHDUwk/opBEAVWagXd5e4JY1PUK/K3sq74gOREusMz
 oicm1zRPmSKQTQa7V58Tc+74dnR1jS11FV/6KWxHKFxhagbknTXOCBi8jZiDpyIz
 ELp7FKipLnIdYGsA7lk1XmWdsZ0kac08IMcs2cYBR8MTWqJO58tqbwtH8fh9rs8Q
 Q9EKYzEvythNL2qDp1Sw1EOFFwjuPp+h4OzlluTXzJBM0k1T+H8jEUqdb8pbKcpu
 kzmk6AEM4+6gT/QqOphWzSo0ekcF8+4X/nk/HbO7V5Z0WMF8BVUQeh+14S230GnP
 CgSwwoFAvc94zWAvnWR7tJVSz75J92AbB6tKJq3bFS09LHqPhKgFtUlhae4Ojaws
 4BIf+nLQu+xguUTj8ooz+aEfhjFzsPlFAiiDyBZ/W4Ns+03NHWgjVNU46m+MGq/R
 e6GcIkUlRy4mA3Nkb65jVkxbWNL7BFJDWmJR2CO+QyyhoTsCDMI/l5GlcOW58v+s
 J7sDb5TNqXquY7XR3+LoldEMYNEGTbzUpfHqTVmmpTn4DXVi7zH2ekAfpjy/6DXf
 evPUbAx6weuXZ/x1Mk+u1nk6gSyFuDhAuRhYECAYugsIbZUfKXZW4sa9LFe4eqFB
 WU4tqdPQomB9ssX1X5hVYJm6i0/7jsAGQxQzot8PcFVNL+aA3uU=
 =R4Ym
 -----END PGP SIGNATURE-----

Merge tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Microchip ARM64 device tree updates for v6.16

This update includes:
- fix CPU node "enable-method" property dependencies

* tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies

Link: https://lore.kernel.org/r/20250516055607.11248-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:57:20 +02:00
Arnd Bergmann
ea15963b26 Microchip AT91 device tree updates for v6.16
This update includes:
 - more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms,
   SRAM, DRAM, RTC, RTT, GBPR)
 - cleanups and fixes for Calao boards
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaCbPFgAKCRCejrg/N2X7
 /YTwAP4lzxCNkodc/imWk8AaVMwmj9KjCt+8nlg3qg/CMvunvAEA6RSfBYndGJLA
 ll99NBekc6/PWboAAlcEj3pQlzhF9g8=
 =8Rwa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguS8EACgkQmmx57+YA
 GNn17g//VkM+La/DS4N9Lm83/g9JulW4lRxn/HkX/M0tvBdOPwtPLdtQqwD5bScc
 RUO18pze4sO1o0Chg9yaDqADpMFx7zCO+WJBApyUxEaiqYHynkB2FzSB5EoH6O40
 71jDM47w4dUY6AGOCWASzlIjKZAFAu4FpxC8J/8yoGMrBc1g5cyDwzaRPdG0D9q7
 dPAtzNTlsCGN/Pqk2tlDhHwVLY7Dd5LmDgTGcsbiajjDIbBc3j0QAwY1M5pZEWfK
 DD7WpkSP51fr9dv9FPE3yl2XE9UhH4xKVzuoytPtdCeOKaSysATIuIwVlzDg2Jzc
 1lQ1JGe39sP05KVSMBC3SsMWi5pAA/4XVurZTnXBsJJPL9/tOcuxLQy2179IzmXa
 cwvdY6XfxHDt/PeWg0VjKpnDOYNme92voIHASiUO3ki6p7yJ/NvXEU92MRMYrUCu
 OymRSqWBnQT+t1wcvLeEGCDb0kMayk9bmXZVG54eVp3mQMhRiJC6bFMHVpx5amvn
 P9utH0LGWJPu4PalBCBw5p0lDtYeVSfej7qc0X+lbbY0mwp/S8AmBV9jQ8C56nIZ
 luaLU57SX9ghN0RkXPePv4dwGugi/lMMbd483G7pmFQcw+Nx1tj/82ODuyvbWFhe
 ++HCukg8OhNS4EpDHI58cM5HUv6hCLvmMOry3EJfflD/nrcIAiU=
 =BhDQ
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Microchip AT91 device tree updates for v6.16

This update includes:
- more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms,
  SRAM, DRAM, RTC, RTT, GBPR)
- cleanups and fixes for Calao boards

* tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
  ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
  ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
  ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
  ARM: dts: microchip: sama7d65_curiosity: add EEPROM
  ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
  ARM: dts: microchip: sama7d65: Enable GMAC interface
  ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
  ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
  ARM: dts: at91: at91sam9263: fix NAND chip selects
  ARM: dts: at91: usb_a9g20: move wrong RTC node
  ARM: dts: at91: calao_usb: simplify chosen node
  ARM: dts: at91: usb_a9260: use 'stdout-path'
  ARM: dts: at91: calao_usb: simplify memory node
  ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
  ARM: dts: at91: usb_a9g20: add SPI EEPROM

Link: https://lore.kernel.org/r/20250516055330.10852-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:55:13 +02:00
Arnd Bergmann
0feaf3c056 Allwinner device tree changes for 6.16
Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
 - Radxa Cubie A5E
 - X96Q-Pro+
 - Avaota-A1
 
 Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
 Note: the SoC has two different ethernet controllers.
 
 Changes to existing SoCs:
 - Enable GPU on H616 with all boards enabled
 - Set maximum MMC frequency for the A100
 
 Changes to existing boards:
 - Add WiFi/BT header on PINE64 A64 boards
 - Add hp-det-gpios for Anbernic RG35XX
 - Add support for PHY LEDs on Bananapi (the original one)
 
 Add new devices for existing SoCs:
 - YuzukiHD Chameleon based on H6
 - Liontron H-A133L based on A133 (compatible with A100)
 
 Tree wide cleanups:
 - Use preferred node names for cooling maps
 - Align wifi node name with bindings
 - Drop spurious 'clock-latency-ns' properties for H5 & H6
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmgmm8kOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDCeKw//dU9nOV3IL027SSzBc/1acvGD7t+o3O9neNlt
 4W02QAwTeANCCUM4OYIUCmNn71gFlcEOfVmLlJXAEFJCz6kPP8RSh+IL1LdSQydf
 NJMFnnvpVScwUjDSOPAowuqR91OQIHm7nWJvVzo022c8zsQE1iNv7Aeg66Swf0ai
 HRuwLveOjVRrVLe4mwwa5/LHTNSZLk1e5si441C86PHHf5+s3x4JnJzTMvYosZbM
 3ekjGc6f9evx+7k7bAfQ9UrJ6avtoq5ars+Js+RFjMx0bW6dCLa1EvLa3V2JcEcR
 tSI7dwiqLyD2q9tulxVG5kFLTNPdXK+BI9tO96xCbkJ/j0V9ubNToq23ltyuzOVJ
 ha8n8e1kb1tOg7HR8B5eV1xN+ZSZL6NvvZoiyPPklML0hmT95Lwi0uVhfnNT0EC9
 VjiBBBeP26U0y9005nAzblLUTeKv4pFaRHD7j+MVtDk6IsNwMxGo27KPrkpf6FMM
 UgbXSiurdQIXToUuQL+DuGFZZwnu1MN008ZUV/hqEfzWpeH/GQxN+YMbEuuvaKJk
 3r0nDM9Wbnjdvs/qhrDZRwKccQOBLMwkZN8JKWyKAoe1mVoFZa9VyyKWuT5qXOee
 5E5rwxwFne8BpkDyfmCyHXKVjeGGiVky11roO9/9IchjgJe9j+4hLaCvr8mhTvl2
 p4tiVxQ=
 =4JrL
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSzAACgkQmmx57+YA
 GNnCIA//R7syl7Mu+cJ88VxKhrInFf5F5vngrtrh+o9w5Jk50BY87WX0qT16Zgt6
 /jHLLYkjXiv0FA0PJQmeZQKxhYQnGqRqzAgBG41Db6ulbot8cHDNCwbc2J+HPvXe
 DibTOayckm23HJQyPXgTBhFC8GnjCOxzpt7mSP7+NlL2QcHGuNABP/Z0R8ra4Evr
 rw7GYpmCCuc0O7LdhnGzUpy+QT3SRedq0MPhj59mFn4VYQUCFRnHiYfPUjMjPw4m
 dfFAPE6PaZlgIfPLH0s5t8hwZCbOtLkuMUriZPw9iYLN+KXLHRrbprNlPqVH+LC3
 VuCUXsokwjr/yeWJ9pzmuRi6kCg2MDooY1i0T2GHfoIr2Sb3cOc7lrjyczMp4ovn
 snk370g2qZ9jYOgCOUlNSpI76/OF04/MTOm/IF8yAuWtr2Qkqa7sqwf0dgP1gcQc
 FuDgRw/uh2dG51tPV8xYfFvNG0+rSJh7y7M2m76cNG6A/OmI1WJOoRT/WNqvqTxN
 y7iZY7aKnML8pDQgoRFeferR5oUfEx4yAIFTA2130U+KtVDiq8/+3pv5DCyGx9/6
 dXs0T2LndrDV9DRaSQZ45spHP8sMSFbWbBX3qvQEj9Q8j2QdTSNu4hSi4/P3jQ0U
 W5azgGfeL2dH1m+RhJaqpZQTwZH1lVUfIcj2Dpdbk768xkD+UKM=
 =/9N8
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt

Allwinner device tree changes for 6.16

Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1

Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.

Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100

Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)

Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)

Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6

* tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
  arm64: dts: allwinner: a100: add Liontron H-A133L board support
  dt-bindings: arm: sunxi: Add Liontron H-A133L board name
  dt-bindings: vendor-prefixes: Add Liontron name
  ARM: dts: bananapi: add support for PHY LEDs
  arm64: dts: allwinner: a100: set maximum MMC frequency
  arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board
  arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board
  arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC
  dt-bindings: sram: sunxi-sram: Add A523 compatible
  arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard
  arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64
  arm64: dts: allwinner: correct the model name for Radxa Cubie A5E
  ARM: dts: allwinner: Align wifi node name with bindings
  arm64: dts: allwinner: Align wifi node name with bindings
  arm64: dts: allwinner: h616: enable Mali GPU for all boards
  arm64: dts: allwinner: h616: Add Mali GPU node
  arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX
  arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
  arm/arm64: dts: allwinner: Use preferred node names for cooling maps
  arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
  ...

Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:52:48 +02:00
Arnd Bergmann
38181494e4 STM32 DT for v6.16, round 1
Highlights:
 ----------
 
 - MCU:
   - Add low power timer on STM32F746
   - Add STM32H747 High end MCU support. It embeds:
     - dual-core (Cortex-M7 + Cortex-M4)
     - up to 2 Mbytes flash
     - 1 Mbyte of internal RAM
   - Add STM32H747i-disco board support. Detailed information can be
     found at:
     https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
 
 - MPU:
   - STM32MP13:
     - Add VREFINT calibration support based on ADC.
 
   - STMP32MP15:
     - Add new Ultratronik Fly board support:
       - based on STM32MP157C SoC
       - 1GB of DDR3
       - Several connections are available on this boards:
         2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
 	SDcard, RJ45, ...
 
   - STM32MP25:
     - Add OCTOSPI support on STM32MP25 SoCs
     - Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
     - Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
       LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmgkXoEdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU7DQ/5AVX4QZoSJunoS/Um
 QtQku5tyAiQD/RupkUitkB0BPSV4XoipWM6f2MVlBnIblRe8esKVDo2AntiDte/E
 mOQ0HwP6nFiRL90DdLGqQ0ySwD9pjnUPn7c8ZkEZw2X8hAhTgTCXAVgDJ5tRKAiz
 3M5aFw1J3h4dPlSObuCUbQouTIYwvC7Gn80b92Ppo8Sbt2tcfyWGweTzBKtw+InK
 Zo8p36Oz1w/Ful/pIO8YWlcQK8myD18KiCKAYR5tCfTGIjOOp+wpaFl/xIWFRcWL
 1RPOS38l3SPUzEB6otfK5vIi9JxQDAm/AAsgbTBLcSQmEXpyn3M8ZjQP1KI/KMG9
 68lhTHKbTaEeo16jr3aKeThecYdszNt4zmNlZ8vCDzr9o0gpC282VgH31Do8g6vu
 b4fRkDn2x1y90GNAOCEPufLS9xwQboRw6Ngc4gHyZjuPvPKw+/SwpoCyulJgiCuC
 p+R6ZCf5E+dmE5V762PJ+o0BWO09anP6vBVXd0vakK3NH+T964jkiVbaqgBz374v
 o58ysq+e3URN7olJkY5QaKwTUE2N6XAUJn3zmtJYw2gYfzXZdBDPjRCmXBvtAHTw
 AwLGeMOuf/NmphLhJecVHRmAMmJpnwFuxPjU3dd1sFGgAXeCw+hvGXei3wgwG+fU
 D9kfbRofrV3Tl9YhHl57ocIanm8=
 =lBee
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguStcACgkQmmx57+YA
 GNl5Zg/9GewrqmsiYWjzNC2klAdaB4SL15eXQ0V5REg8S0Hc9EFJI5G20n2PF0sX
 ciEDR+azrsZ6qXCiWA7ZmqCheQK6dPmojIX6zWgNONCqq8sUipCyK3uplIGLC2Nu
 QjKHixQuD0fg73mlNwF7LaaFf0riY+B09A2HPuFlAYCt8bCaFuIOjMLWNbUyVPcI
 sx5tUU1GYRRupqEwnoKrXNp0UJGLRRgscdMUKn5ZLE5sMUEoWIPppIS2/hWoUi48
 LC0C9pn9Xm4FTbwVp05X7qooJn3lzjR2ZogqUqGwzn+qmLgulKMUepr0GVRzvOEh
 0zT7HIwxiRYuLfI/EymPxwDrUUxPJNi0nQiJhJxM08iHwkmhEi86d417ZcdYPESt
 JCSxXFzWMWatnQqA7f0ijBRN4SbNsH75jPkrEjOgu9mO9/OwQtiL+I56C5K2g+ge
 JBIRKPC03vG47wHFREzCXFRmeGzkn0Jz03CqvGJnDnPGS8FvzkE/kSw7Gv9D8crU
 flgqmYUezxtykE2zhgPB7Cl0lcjCbWGUDeZUXNjbH5ulyKG/+keAu72cdmuikABy
 8A9L7YK+QTehHfzuFY1krj4RJwoxEQgBmx+ZlnJxniAo5VE4IenzamIAjZX2UZ97
 oZr6EqcFT2WMh0Cr8p30B0lVSnowkclOlvZ5E525mLwCQ2Un0bE=
 =KRaD
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.16, round 1

Highlights:
----------

- MCU:
  - Add low power timer on STM32F746
  - Add STM32H747 High end MCU support. It embeds:
    - dual-core (Cortex-M7 + Cortex-M4)
    - up to 2 Mbytes flash
    - 1 Mbyte of internal RAM
  - Add STM32H747i-disco board support. Detailed information can be
    found at:
    https://www.st.com/en/evaluation-tools/stm32h747i-disco.html

- MPU:
  - STM32MP13:
    - Add VREFINT calibration support based on ADC.

  - STMP32MP15:
    - Add new Ultratronik Fly board support:
      - based on STM32MP157C SoC
      - 1GB of DDR3
      - Several connections are available on this boards:
        2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
	SDcard, RJ45, ...

  - STM32MP25:
    - Add OCTOSPI support on STM32MP25 SoCs
    - Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
    - Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
      LPTIM3 as low power broadcast timer on STM32MP257F-EV1.

* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
  ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
  MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
  dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
  dt-bindings: vendor-prefixes: Add Ultratronik
  arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
  arm64: dts: st: add low-power timer nodes on stm32mp251
  arm64: defconfig: enable STM32 LP timer clockevent driver
  arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
  arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
  arm64: dts: st: Add OMM node on stm32mp251
  ARM: dts: stm32: support STM32h747i-disco board
  ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
  ARM: dts: stm32: add pin map for UART8 controller on stm32h743
  ARM: dts: stm32: add uart8 node for stm32h743 MCU
  dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
  ARM: stm32: add a new SoC - STM32H747
  dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
  ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
  ARM: dts: st: stm32: Align wifi node name with bindings
  ARM: dts: stm32: add low power timer on STM32F746
  ...

Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:51:19 +02:00
Arnd Bergmann
ba32d96e90 RISC-V SpacemiT DT changes for 6.16
- Add clock driver, fix for pinctrl/uart
 - Add gpio support, enable LED heartbeat
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQKTBAABCgB9FiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmgkEphfFIAAAAAALgAo
 aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldEI1
 QkFCOEM5QzMxQjcxMTU2NzAyMjNEQzMxQUFFQTQ3NTk0REJCRUQACgkQMarqR1lN
 u+2A0Q//fwnp36zuiqqYoZ7N9iFmLYjJlM9UEU2FSZ0/RWxL/1Y7ZBNAUajf7e7p
 N124gpRM5BJMyA+vHEJH1t8WblKoxwt9fjbn9QlcDYnoq5NuHjLkxwfySe+2V5tW
 kZoPrSwgZ3ODKn/HL+/ghT4ckNV6V+al6yh9x3Cv70ZYZjSOzRwshIf7JJBjzp9X
 y89QfuqRVT1YMdzCnWTMb7OVFM1fbPP88jjUR43VRieW9ER/8oaaNQNxg9r3wDFZ
 V6yOIhI5i43jDZcCKZLJCH+WjcIjDj8zQTbIvZOdZuFOR8FPPK2f+zvJ77C2eT6f
 fG6iB/yAWMFGNPQ064wWev43Ppq7KDkt2/qzTecBJRg6/+x6ILQy9TElkazkJDb2
 EYIiucWoPqNMjSL3BRohJ+d6fSaFHaujhP5MGBYPVA6drAIYlwFPhH2HfebECUt9
 4Ip9yzdTJAlXhvzlfXL6KBSCft2LinKVHEFvaNJKaZ5V6E93GP+lNv4rkgRoF+Hz
 uZsMpE2ex7uAskhFT4DQF7VAKaUvLSBUDVM8La1wy3jJFEl+w7YsSxYRTk3bRYt1
 bSUdxCDDR+sD26ceMpiILdEy9cDE91B+ypUF1pu3C4P0vYEDi5pdIiuZmaYuAuXm
 SSC7ymRy2Ao0TGOtycRInTRtGzFnk9DZKLk+HU8rDJOq3WGpjFg=
 =yMSa
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguShMACgkQmmx57+YA
 GNkNvQ/9EIjYie44k9ZyGxjQHuht6IayZHxyQvNVEp/Ef9l/S3M1PUMexgeHLG+0
 8z8eITaP+9zz0wYA0mdoFdh8kdvHkGDVh8cKFrAQmXb1DMk/scQVfOShwh7F4wb4
 bTohJIq4pVh/Y/b7Yz9kuCKZFmqx5Wpfg+s5iw9vR4SZ7kRCYnhdbBBXo9dOAFN/
 KoGPQf6Pw3pKGMrxRifYyvrhJYuDZER3U+oERA+Rr2pB5tRf1TRHSvHNY//gBmVh
 bwh09t49pqkMWY0iJoJe7syIRjSLwzZF5HIPZYW8f33r/HKYYrS6quTuq9X3hnGI
 WYwBUftxIW9EU0vFQ/U+vZZRbArYfuydvpuh1iaHSo3ZBeu9cHQKH4HFQg/oUoaG
 rgvRKBd0Zb+bChvkpTj6hPrFht9m1IYhoDnazD9hhKXXHVSZsENm/3jhpUmQdOfW
 vpzW6AWUKCM7+ScFqMyvzTvCnuBdZNGzS1L9SWMwv8k6vs5mhTuO1Zqzli2WDEae
 D1MNzonF5NR91K4ayYMOz+HOZzQ6cOzJHUADd7Zk/zh0BClS0h6M88Dqql0C68ww
 3Oeao9Z1e9BhO7Ubzh+/YV3fRff+/U1UZnRpFQnnqzbVw8YmAbivltJj86R7ftVp
 HnW5S9NLUz+UonGAwRRWck78I4/pRG2EbyQvFofta0U7ILePDYM=
 =09rm
 -----END PGP SIGNATURE-----

Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt

RISC-V SpacemiT DT changes for 6.16

- Add clock driver, fix for pinctrl/uart
- Add gpio support, enable LED heartbeat

* tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux:
  riscv: dts: spacemit: add gpio LED for system heartbeat
  riscv: dts: spacemit: add gpio support for K1 SoC
  riscv: dts: spacemit: Acquire clocks for UART
  riscv: dts: spacemit: Acquire clocks for pinctrl
  riscv: dts: spacemit: Add clock tree for SpacemiT K1
  dt-bindings: clock: spacemit: Add spacemit,k1-pll
  dt-bindings: soc: spacemit: Add spacemit,k1-syscon

Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:48:03 +02:00
Arnd Bergmann
759dd3fea1 Qualcomm Arm32 DeviceTree updates for v6.16
Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended
 with modem-related features, the LTE-capable variant MSM8926 is
 introduced, and modem support is enabled on Samsung Galaxy Tab 4.
 
 Display-related clocks and power-domains are defined for the simple
 framebuffer of Motorola Moto G, to allow booting without
 clk_ignore_unused and pd_ignore_unused.
 
 On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmgju+QVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FH7oQAMuLGyWTReLqQ3FCdnlI/kXWH2qF
 Fg4VJb2zM0eYpaBPXS8fkD0BlxXPHy/CD9A/yKWpHMkD706J4PlsCfMLzj6pzbJJ
 tzP9fA/v2deGl/G/OKsM+Yp7a6Ocl2VzXU2eOakWMBlWQUcTv020jz+4wNwKDwx3
 85BESrpr6yCG55dOddZI1etKb2oVXKuvZAvYSELNb4l2PkIN+stJ0HoMykTWn9XD
 WD7QvD1LONi8eldt65O2Dz7cwN5eHybD4QPpYvW41OudP6reqTyTlE/NQSdP4eg5
 RyKXevjYemZTGX5YsNFR2p/y3zhLU95LH8+MSIm0d7DlpLMPNz88hedCEM+Mr+fp
 egHAfH+smWNki5xlaWUZwbRCIKZVz6SR5utnzudcC9obJMOrtajvBjaQ1WbsrzS3
 l4nka/Csn9KY/E0X6wKHXGzJlSOe87XlnF7HUlsfbzs1AQpNADgCtwFM5eJZLhhb
 TcxbjKh1ZOrznuPxCRA0na0zuH/kEgdchs4F4dsJ3/I42tDAXFYBmjw97R07J/Xx
 fJEtqhfvxTQSv5RR6cfbbayXPEJpvJ6uygmJCOx+ZzhRWroOqB7dlWp1/kForhAn
 FZYdu/4rZn9IWOJJEc0QcRLKyeekFca4pXMZfLk3nN6iGu7IwlWtzFr0wbgkVDBk
 m18POm/F0EA1BeG8
 =kQf8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSekACgkQmmx57+YA
 GNkaQxAAs+kfGjBKytJDybAG4Eh6EJ0UrMAMyPLqNx/DaXxM+QZ+ZLzFvMdNMz8i
 srLipwPQKyqN2EvYB0vWzx/3uAabVG8ZhIFYFFVVIpsy9jZkWF27Yw7ybAQg935P
 U+X5M26AdZv/Dkf1LYRcDZnSObtRL/Q8Hl+MxWjnt0GQDAtOX1DA3oksNvmdS7pQ
 pJEM0KX/PShZibpj0iGugGMMTBwvwHlj2hLpNrBCjISuHXwhbufXs6bEyoXcV5SL
 FuS8aK3eOvr2PntZsrHArJxRZMXKPBA17F2NsifCnucmt0Lqmz8V92lObGiORkHr
 kTvrJmIc1CSwSZrFyhq1C+azs2rx++BvCl7mFElK1tn9czod7LT7wUasDRu185wY
 qGGtg1dvfotxAI1ctt3ogtKu4pBONwbnb5cNjxPTHy0pNPIOBiCWy4NGxM3wJ7wJ
 zKukpczNwk7H1NFAd+0sx0XnGebGhz3Qs9jV3VD7sjdYdMZlIBYce13Rl9j70nWV
 OKcMjW0NYC+SNa/1vNE4ZpUqKjIiOvVXi9MPKnR2DPKKXXO1B8lT4pMcgr06wysL
 60fqIcqghsoeQEAwc20geimkgJkxusbpAXNqX9eY/kZOy7s2eVdzoXPLeCt0FEWV
 x2jNix94bPZLujFKb9jhpYZl4dz6/6RK/yYZwm+x4klJKxO+Z/c=
 =2aVB
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm32 DeviceTree updates for v6.16

Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended
with modem-related features, the LTE-capable variant MSM8926 is
introduced, and modem support is enabled on Samsung Galaxy Tab 4.

Display-related clocks and power-domains are defined for the simple
framebuffer of Motorola Moto G, to allow booting without
clk_ignore_unused and pd_ignore_unused.

On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced.

* tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: apq8064: move replicator out of soc node
  ARM: dts: qcom: apq8064: use new compatible for SPS SIC device
  ARM: dts: qcom: apq8064: use new compatible for SFPB device
  ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device
  ARM: dts: qcom: apq8064: add missing clocks to the timer node
  ARM: dts: qcom: apq8064-lg-nexus4-mako: Enable WiFi
  ARM: dts: qcom: msm8226-motorola-falcon: specify vddio_disp output voltage
  ARM: dts: qcom: msm8226-motorola-falcon: limit TPS65132 to 5.4V
  ARM: dts: qcom: msm8226-motorola-falcon: add I2C clock frequencies
  ARM: dts: qcom: msm8226-motorola-falcon: add clocks, power-domain to simpleFB
  ARM: dts: qcom: ipq4019: Drop redundant CPU "clock-latency"
  ARM: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names
  ARM: dts: qcom: msm8974: Use the header with DSI phy clock IDs
  ARM: dts: qcom: msm8226: Use the header with DSI phy clock IDs

Link: https://lore.kernel.org/r/20250513214111.43401-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:47:21 +02:00
Arnd Bergmann
2b183108bc VT8500 DTS ARM changes for v6.16
1. New board: VIA APC Rock/Paper.
 2. Add SCC ID register/socinfo node.
 3. List all timer interrupts.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgjIKwQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1yZWD/4hbdPRMYcnuokiDVpBNJqdY82OJCYcnMaC
 MtXyEgshHC97BYMPF6sQox09fg4IpJlAcRsEXsjh3vSQl5LvX7tqQwrckiOJvhXP
 LUH7XVEtL5fKgYf3THaFCDCjcwXxjcsiEyT6KD5ET37Z0czqMAl28ovRAV0kNuXM
 3x9TWkHKI/qlsYIRpRCl3cHQkqjFEXgfi6HNoIroIvR1wRBXxjJDiMnUEBHgEl7E
 xAgvNglD/fAubcbYjr+Kx0XMhMryBl4PoSgeP4OnTK05gIW81l7RrxuKMm+a2pb3
 aX+xtqs2sXBPykzp5lyosa0Nje9/5x31supSjF7I9pEA2OA9UPJjchkyRkqs8Inj
 tO8s7JrIZklOvB4Lp5Sc4sqylgH2HeWxr5yu4EH9ga9C+2KpdSgSktVF69SvmHII
 Zk+akeIyxd3hj/zGrqBwwrEP6udg/7PVlSqVKgwiJ71Zx8Xs6rrdtw0vZ5j49Bq4
 elTg/pvz1uVkhQ0nxWFYhZSFNDB/sx52TRV8Y0W/vk/QaHAZrBcQte4T7XSWlGAb
 KmgbIDJ9Osdl7iJN5gUxF+u8IwpA/u4vfORl3sgIs3vVez3wbthFA7fggwas+a8u
 boS6ooca3sBVzp/6qOs3IRZ+D68r6hQhFCSU4/rPw1o2NHveGCyZbZcC2Ahx7+Gi
 iFztjGc71w==
 =nARy
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSZoACgkQmmx57+YA
 GNngDBAAjDXbkuUaMbteNtBQVDPnhkrmQ/SZngb059p9RCzU94IHOgn2I8y3iIcH
 13XWOqxMRFXOdMlPbEr3krN0KOwWtRpPALE4S+/MqAoa5xlV3ul73R64oEBC4qy5
 5yPHrV6IOYNDn2o+aYUHanZuWVPuBdwIIzphjTudEf1Fpi1joL+JYaMLNwYIPLAT
 H97ORt/fJiYXbGfO8YpZEC2BTv2F0ym5aCJAkWGD1V3zj5hDw+kf8qQvZHEAtQGe
 Jbvgo9XdDUWrd7SJnn9uDSOA93bInCeEFTuPJlW4TEPGNSTF3YA1ZAnpcFYrjmux
 T/LY3HAT3gwUY+eJlttOmpuf/YQ2dUvU2+LJCanunlsAxiwqRLJij0d5IyAjdKzq
 d6XXtLTs5Nf4dh1p/E2BhRSNrnriP1ky5m1mDYvAHfJeEDFczc7Rpymppfo9aOlw
 ymV1U2LE2MxraLr9ty1l9EMJfBnPPTUkd1FomG/1ZfGi7Bt5GI71wsO+TRCRJN2M
 rhVSa3/cMealxvTTYZiMqJjo633HScCeuHKZkInx6xiBXB89x50DfkFw3GlYvSX5
 pN4xZ0QCfMTG6bbcxlQVKqAyEWIxB+JdsFU9S/Yh1Qn+M8hjvhZXDZXlqnip8gel
 nxhILM1cAic/aaUnGMO3rSDRwMU+XlHoe1xuhDfkMCwa8hZKY5Y=
 =bDf0
 -----END PGP SIGNATURE-----

Merge tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

VT8500 DTS ARM changes for v6.16

1. New board: VIA APC Rock/Paper.
2. Add SCC ID register/socinfo node.
3. List all timer interrupts.

* tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: vt8500: list all four timer interrupts
  ARM: dts: vt8500: add DT nodes for the system config ID register
  ARM: dts: vt8500: Add VIA APC Rock/Paper board
  dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards

Link: https://lore.kernel.org/r/20250513104216.25803-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:46:02 +02:00
Arnd Bergmann
12a75f2d9f Qualcomm Arm64 DeviceTree updates for v6.16
The Snapdragon X Plus platform and related reference device is
 introduced. Devicetree for the Xiaomi Redmi Note 8 is added.
 
 Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
 1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
 buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
 support.
 
 IPQ6018 SMEM is transitioned to be described directly in the
 reserved-memory node.
 
 Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
 QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
 Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
 QCS6490 Rb3Gen2 and the vision mezzanine is described.
 The Fairphone FP5 gains touchscreen and USB Type-C display support, and
 the QCM6490 IDP board gains a required listed of protected clocks.
 
 The camera subsystem in SC7280 is described and UFS is transitioned to
 use operating points.
 
 On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
 UART pinctrl state is cleaned up.
 
 The MSM8953 platform gains another UART and interconnects.
 
 On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
 interrupts are added.
 
 Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
 charging, fuel gauge, haptic, and LED, as well as the PMIC used for
 display and touchscreen, which then is used to enable the touchscreen.
 
 The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
 backlight control.
 
 Display and GPU are enabled for the Nothing Phone (1).
 
 QCS615 platform gains command DB definition.
 
 The QCS8300 platform gains description of more QUP instances, CPUfreq,
 PCIe SMMU and the SPMI controller.
 
 On SAR2130P PCIe EP device nodes are added.
 
 On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
 is enabled, and firmware-path are defined on ADSP and WCNSS.
 
 The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
 enabled, and the vision mezzanine on both gets their CMA configuration
 cleaned up. Xiaomi Pocophone F1 gains touchscreen support.
 
 On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
 described.
 
 On SM8450 the PCIe endpoint controller is described.
 
 For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
 sleep stats.
 
 SM8650 gians OSM L3 scaling and variety of OPP tables and missing
 interconnect definitions. The thermal trip points for CPU cores and GPU
 are raised in reliance on hardware throttling.
 SM8650 is also transitioned to per-CPU interrupt partitions, in order to
 properly describe the PMU interrupts. Missing Coresight ETE instances
 are added.
 
 On SM8750 the cluster idle states are corrected, then audio and compute
 DSPs are introduced, together with the crypto and rng blocks. Modem
 support is added and enabled on MTP and QRD devices.
 
 On SC8280XP overlays are introduced for those running Linux at EL2 on
 these devices. A few more temp-alarm instances are added for the PMICs.
 
 On the X Elite platform GPU cooling and watchdog is introduced, together
 with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
 display, the QCP gains WiFi/BT power sequence, and a few devices learns
 about HBR3. The RTC support is enabled and regulators that are feeding
 resources that should be always on is marked as such on a variety of
 boards.
 The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
 describe the LCD and OLED variants.
 
 Missing properties for the crypto BAM is introduced on a variety of
 platforms, taking care of a long standing error message in the kernel
 log during boot.
 
 DSI phy clock ids are transitioned to use identifiers from the PHY
 header file and VBIF region size is corrected, across a large number of
 platforms.
 
 A couple of DWC3 quirks are added across a lot of platforms.
 
 The arm32-for-6.15 pull request was accidentally merged into the
 arm64-for-6.16 branch and this wasn't discovered until a significant
 number of commits would have to be rebased. As such this is kept here as
 well.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmghN+AVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FYTQP/1ZyOvGFKBIxRrlvag4Z8hsU2YxM
 n97+i6AElnCE8YAzCC/Ig/zAxyOLuTlPcJeCSnZlpQr8I0uEKktkr1M76GdlOOTM
 49XcsT/rnBxh0bRtJssl/Tbl85hQJAfbZ8rp1x0lCn9e2Ef4A2KlbAWmNbA9Rgai
 QInLKF1owcpwDhMceWFfakMr7qG5CXRgwA6CWmszn/kpdfI7hhoNUGUidsY3mg//
 FfkOInsnh3yetocpp3GmlHs7Mi7puYq0XaKaIAoruyL+MkGAk1+9DY/OFbbhMEmA
 dr+1erRM7odJdbl8DCkriZ6RFVSTQ9NhDpmlnoFB02ugQlfy3n+3UK7iOwgQnnln
 97B3hcipPIe9L51yV3Ud5lQYDMMvAU9arWuZgOTktLRpFw1ASWnL7P/o5BLYzdGs
 NZ9Ebv8LKkuf1/g8SFcz96o7oW/qlKe2vV3jkcWSiFr7PyvsRqT/dFONUw2FppXN
 UGvtwQ7jpnZJ5RqTAK9IjPpjdAK9QLrzcwJAH/7mqs5Wn3WGtEDOmPIcPzmFEvKr
 3CwkxT31rPxdOpd+ZDnnTZzXcYMrQUQ5oahSKMZObzH2c6DtU0PjcCxNLShTCn1C
 vAKUF9JZX71T+rtEmeThMxSr8yQ0HrkZH0Voq3/03lI1ap7oxypb9Fo+qoGxMh5l
 7pTic5JsKO+t+kSU
 =JzSX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguSLUACgkQmmx57+YA
 GNnMAQ/+PT+s+BWkRtKVKLL+eRe7OVfPgRzo7BW678VF598iB2Ow9rY+stFbb0R0
 ZfH3an33H1XjoQX7pvWqWCH+s4d6lF+cD//6yjyYXbYCUcNrGZr22vFuHRICzgK0
 mo4w+0htSkcc2IuAwVDG7DmApXo88bUwErqGAj68GxkJFVB0tYjw3LjruxCb9+tI
 LbOS6tPXw73XBN+/9h8wFwUh9C5Wu79SZ+DPmrnlfyw0DBTKfeALz8ts7LDe6H80
 LxmcJgrBZrhcUxJlYWsJqYduTc5Si8mWdK7mEBThjNS6ufm86VyEzXoPpfilf8om
 dTlsV8sYS5mDuUJLTj5nHBwf5Ol59mbHrxi5Tu3o8+QgvkbP+gTmgRx9975xeZGS
 iTeHXOTzsoTeiccE0kYjbVGSongSvAuCuQcERKNSSuNFfF+i+NLgVBn9sXRVqjIt
 FFOSN0p4uQ6gjn9qVkaqhZacsvl+nx1uqAfET1ZKQzHpV2fyJtlQ0WhuLhih6xwk
 5Hyc1jl8jCXJ3ImmwybLmwje1sVk1ZtEwbpdq6SUepKjmthxucJbiOD5qMP7l0Vz
 45eNT6R0k+GFsQ7wK8adg6rPi004e5R95FDxMuFt8EY0yMUnSdE01Pl4Bnyqq85V
 etgyoeth/R/Tjlz5fnt1ET3hQbWfQAWBYpEkgSuT71tSUvBuL2Y=
 =W507
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v6.16

The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.

Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.

IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.

Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.

The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.

On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.

The MSM8953 platform gains another UART and interconnects.

On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.

Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.

The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.

Display and GPU are enabled for the Nothing Phone (1).

QCS615 platform gains command DB definition.

The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.

On SAR2130P PCIe EP device nodes are added.

On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.

The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.

On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.

On SM8450 the PCIe endpoint controller is described.

For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.

SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.

On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.

On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.

On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.

Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.

DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.

A couple of DWC3 quirks are added across a lot of platforms.

The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.

* tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits)
  arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support
  arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes
  arm64: dts: qcom: qcs8300: add the pcie smmu node
  arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override
  arm64: dts: qcom: msm8953: Add interconnects
  arm64: dts: qcom: msm8953: Add uart_5
  arm64: dts: qcom: sm8350: Use q6asm defines for reg
  arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg
  arm64: dts: qcom: sdm850*: Use q6asm defines for reg
  arm64: dts: qcom: sdm845*: Use q6asm defines for reg
  arm64: dts: qcom: sc7280: Use q6asm defines for reg
  arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg
  arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg
  arm64: dts: qcom: msm8996*: Use q6asm defines for reg
  arm64: dts: qcom: msm8953: Use q6asm defines for reg
  arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg
  arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg
  arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C
  arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch
  ...

Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:42:13 +02:00
Arnd Bergmann
c307e9c1a4 Nuvoton ARM devicetree updates for v6.16
- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI
 - Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms
 -----BEGIN PGP SIGNATURE-----
 
 iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaCV6mRwcYW5kcmV3QGNv
 ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmjQ8A/3ArLL49N17FV7UiNrvN
 3TPgTxMnQMdl6aIL8VuoHIEUAP4sNLpe90w/rFBTGUsrOhg7nqBmPuP3JPPwIoLw
 o5yMBg==
 =GB0J
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguRckACgkQmmx57+YA
 GNkKPQ//eDRQK5SxmruzNzcgZX8T5cdeNWtkD9zj57nKhOfWEXrRqLAoCtmPofDF
 jpGcyaJVVIgAKZzR0Pq+wG/SSk7QZm7bK0Q/1+cgQ08LifX8mc9Vh64yv5h+UiE3
 gKqnW5tB21GIZZ35Soj7W69BmN8Uep1iZeRZYpqY9DnVWoIh4ZG94i1rHeS8uquX
 y79yBKDo9zu3Q4vjhRg9M0umK5oRoZC2aQTG1YLQ8hu/qldoHRTCRLq/skJ99FkS
 RaWre8HWeWeblGODQTB9xiTFK3XkDwli7NKyl5Vlhst+wgGjb9eOpioCJtnjyA3s
 IdWDYLQtMsYpXggNUx01w4Lbf4QI9FRxX+EfrxCC+1lShph79SM1x0RjyfjpWTXW
 trtqsQPf8foQw0wCMV8/tSq5KlWPxITe+3c43FbtPhrkgBDeolcXIHXkJErFWSxw
 gzLxvuezVVRPiddZ1UfX8ZI/YMeURRyHOisehzIA0hTS/ryyEYh4lXGa26qoqXdt
 zSNje8cJy74Z4G1dOxnUak+lBLvdKwHKuHHvy6aOAdyoqqNo7+MzhIpGMwF9FEVX
 pqMEDGwhPfgQIhvwBg1rdlBu4ACjeTQEiwi48YVreM+Kk45Tmxbxl81ItBKzXcdA
 nI8dbEQO2DGU3milmh1EceV7PFFrwZOb1Px9Y3y8rvftwpGFhOM=
 =pUrd
 -----END PGP SIGNATURE-----

Merge tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt

Nuvoton ARM devicetree updates for v6.16

- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI
- Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms

* tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  ARM: dts: nuvoton: Add MMC Nodes
  ARM: dts: nuvoton: Add OHCI node
  ARM: dts: nuvoton: Add UDC nodes
  ARM: dts: nuvoton: Add EDAC node
  ARM: dts: nuvoton: Align GPIO hog name with bindings

Link: https://lore.kernel.org/r/CACPK8Xe=f_hNNWUGL670x4-OeKgDB+2P+mxp5BaTLW==T5jE_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:29:44 +02:00
Arnd Bergmann
070d04f002 mvebu fixes for 6.15 (part 1)
Fix uDPU board LEDs by correcting pinctrl state
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCaCdKwAAKCRALBhiOFHI7
 1X73AJ4lr6ca0VUEMawO/sOXy0z5otYdGQCeO/A9wbfON8/Zpd9yRPehRbfPFjk=
 =dOG5
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguRR4ACgkQmmx57+YA
 GNm93RAAq0exyi6jmYc1iF7rYek1PMN4uurSygLsicNv5DuePu45EectkmkHcIFD
 tlkx/6D9HsWw+7JAUQuXGuU7jziSOtnPsuCSWRou1H3W25wton+AlcVVIk0mRJXb
 abkFZsVBNp4z3TQdIaoPpeHaET0Ke++tGGzeMUshIzdogg2EV79G4U2SZQXanJpr
 svhZpaj0PrAfXHuCc4fQjHtszfN+jFvzRRXP/bn6tRoyAyI0HlBV0ZUXpDDRbh30
 hRngfKkWgdbR0WA4aWf5LfVqjFCBQPAZcMRiIF3JDN2SdmwZo0B2ElEwwVOUtuAQ
 AasnDZvSs1wKJ5CcmhunjgQ95QzL0ALpX5Hvggo4AQpLjA+o0ET7YkBl0Om0DcmI
 +5KYUkagHLPi+o9BWtA438d3AtKjO9XE1vshGLfIWy+/H1D2TP6Y9mprVnIA2mcW
 xCgZTkLZhsYqlloh1RcDJodenGcW8b94KH6xIICGRAFdgq10f/eb5okDgwgsi4FH
 HSqouQmCCHXB7EXgc+nJBAlo+K61n5oe3c9/KyPrQ9GXlyv6Y4P/TwpwcAyUBLjY
 Nou0JFfMCOWx6qQB2ZBGqS/obNU5S5T7RlVdZRpqIf4MTYi1864g3X5n8XIhVxWJ
 3Ai1pJAOD3WQA+20OKAcgIaH19a5YU2TfsMkmPRR3/Z9/f3dzcI=
 =QFDp
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-fixes-6.15-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes

mvebu fixes for 6.15 (part 1)

Fix uDPU board LEDs by correcting pinctrl state

* tag 'mvebu-fixes-6.15-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: uDPU: define pinctrl state for alarm LEDs

Link: https://lore.kernel.org/r/87wmagpr0a.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:26:54 +02:00
Arnd Bergmann
4e3d2c4b7f Allwinner fixes for 6.15
Only one fix:
 
 Switch back to I2C for PMICs on Allwinner H6 devices. Apparently using
 Allwinner's proprietary bus ended up causing issues when the PMIC was
 sharing the bus with other devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmgmnNcOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDBKrQ//aNNkYfxU8OqM8fqTDgv51mBS6P6mQGP7WHQp
 N8/P+xOdDEM4MqXfB+jQnOUtwZ27pdyRpshldnd4+2oHk75ZkTV8wAFfRogJQdQy
 MEFcfhd1VVbCURxiF4Arxry8tBM6X+rIrxtBib8BMVpmy6BstEAfykPyCVQtxhRo
 qrdYVHR862l7RsVTK/2qmJzC4DCOS8d1mKeoNfhnwdGJ59Stm4dFNRD7oeuLcHZI
 oMIG2Fsd7aFPK1+zIAS+cKQo7xSfTlmTAwOhCuEnqclPy/R05oqmbCzOfPSxnjnr
 ctsX7Q2UDE0pfmIDAonDC8CZ1M5RXtCmkias+d2y9A9P8WDYeyq8H/fo8Zd0HNd3
 D+DeYV26YvIZIgCZaV0sxQb0BORN9fZjn3lQcNAptWW/0lFLde2zGFh1slO5zd1i
 cum4mIEPCvcntkg9hD52WOqXCu2116SRsvRRNNExutyM88MMdT08sfa+bzd5hs+V
 LMmcVREJpw0au3PlSSOzN1yZS8YzTOsPfW01OF3jmz/ji9gq6ROIhjavKWjFfPdM
 NIb6jXQNuPOgFAyJvHBUP3qhNK5wo8b1fEkBxJ048R0UTi0BAqdapWjUQADei2GS
 nwX/I1FuLfd6LFCHw6htCTBhglpX3fTYX4/RRBVFQ8sQsappHqj53fRDRciGKDNw
 eab1NRc=
 =QGmB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguRQ8ACgkQmmx57+YA
 GNnLYQ/9E+zivoTzNcPo1Fre5Gp0Z3GvdOshRQwqvk4yWpkmVw87LsT0nNPdLvjq
 xispQJq/gmiVKCZx69wQx/bNYNnLXsNBtNUSioM5XKXtS9Fz80qPOQYnHJzApiOM
 v6vFmdjtYM0mOE2Ykki0egEZWMAMFsI2ODUooBs/npEf/yw1YR/oRHAtT0E+F+q6
 3qWdKB61/6I/iQzLjSENL9Brpw1N6x9Mu114G8fAkOBYiFHzo/jBukTVoczF9Jgq
 SL1Y8KNw6exKcZ2W9KJr5W2Hqp+2Z17FBSR8XHwuYPEJXtXTbw7BgPwhbo/JdSaF
 ERv9vq16qspLthS0s7Yvvvb8Xbl3JROlD3O07XppKrOeiZb0LuCbkcURf2gJMd4d
 A4PRfU3yxtIcIg445hmRNKW8oWmulHLENA/ldnC9EAZAholmBEJ2AfFn9Kh3BuTa
 zEy9obYsy1btiR9Opu+4ZVYARf/z7t0mX7oLNfh2Ef9whYfzNtURmw828AkHR+v+
 nEdRMmfuRgTalBPQqd5mw6CNRg7btNBOLk4n8oBC4c23eL5pV0QJCwDVqvRtNWkG
 Q6loGBxZRsfPuWBneaM42nMeNSZfapZf/hA+ZHn2SeDJnAXCA3qxJXEOWu55waLc
 75UmIuIy2w+8d5CiuhCS44wTAj27+dm1Ns1yeBiyeXAKf3max0M=
 =sdy+
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Allwinner fixes for 6.15

Only one fix:

Switch back to I2C for PMICs on Allwinner H6 devices. Apparently using
Allwinner's proprietary bus ended up causing issues when the PMIC was
sharing the bus with other devices.

* tag 'sunxi-fixes-for-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  Revert "arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection"

Link: https://lore.kernel.org/r/aCaeLgjZllV7bauX@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:26:39 +02:00
Fabio Estevam
6c9ab81187
arm64: defconfig: Ensure CRYPTO_CHACHA20_NEON is selected
Since commit 17ec3e71ba ("crypto: lib/Kconfig - Hide arch options from
user"), the CRYPTO_CHACHA20_NEON option is no longer selected by default
due to changes in how crypto library options are exposed and selected.

To restore the previous behavior and ensure CRYPTO_CHACHA20_NEON is
enabled, explicitly select CONFIG_CRYPTO_CHACHA20 in the defconfig. This
pulls in CRYPTO_LIB_CHACHA_INTERNAL and allows CRYPTO_CHACHA20_NEON to be
selected automatically as before.

Fixes: 17ec3e71ba ("crypto: lib/Kconfig - Hide arch options from user")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:25:49 +02:00
Arnd Bergmann
4d1c69e53e More Qualcomm driver updates for v6.16
Allow HP EliteBook Ultra G1q to use QSSECOM for UEFI variable acecss.
 Add missing compatible for IPQ5018 TCSR block. Fix a kernel-doc warning
 in SCM driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmgr7ZQVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FY4QQAMdHN9rmiBLjyOljgIjmZG/YB4Wh
 KLbpNJAUGUlQM/iCZITwlkWY0IJDdy+LY7a6mDXI402yHgXYGFP/n5u4B5EVcL3R
 LL2KRcKLgVPtRu0Ue3lzYbWwdZIFsdBKCXd/mEAl69RzKgYC3l1dH1lrDbJhK76X
 ffXv6baJJ7k+RiFU8bNgWfvpkCcmnFDHH6fuAzcymCj5vJbmQaYRbY1vRYkVjYdy
 CExYMAkC8B722D4iTqEi/g4uUyKVPgr5HlE8BPrPfHMOPWpUWH4BbbvQ3kwVRMlm
 4gCLqX7BX+i5GdIBJ2G4j31+ki31oirVhL2E5a/NMR+y0MHdP7CwqkkXUJWTQnVU
 s7ScbC9gogPF4w3Zx7RLbbcwkx9Po2diy72blde9jD+prmsi/0KFIq3UnYHghECy
 F0uyZhpKD4dTmZ6Nf6Rpy01wo/O4M6nfjTYePpZC4sPrZdp5uKECb+iA04v9j0x0
 wWvUR1u0GZoddPUi6W3wjolNd2LrB7WD9OBZp1FYTGJTogBGNBCz9+oUGOuEZjTn
 2Zaru/7bE3ESZTcOKzTrbjWAaSjBYdlVx1ORwt2xWIywC9ZHuPOiSS4or61CEeLH
 tCdmOAlqL+14G07yXjIGMWMzn/NAUJDFGbb6dMEUqPloIF7x97MIjywgTSuqRHck
 914KQvGYG/vLCOzU
 =5ElL
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguQpwACgkQmmx57+YA
 GNkfOw/8DBiA6EyQCZMABbiaQmTqVdxr/76tnUduXeG+dorXuhbGqAqL1vi5lPxr
 SZ8/A8eg6V5tqqYePGaR/LL+XkEvJrDDWvgoYS8whSl6dMh0XxNwrNwXZqbF9bIw
 4PbLF7pTVyafltI2xDSij0j2zKG5hbPiqew9u8Jsn/NpIPGwzwA5UYTWfTHmzn4c
 Tw0AvghKHVLyDWantWpmMO0G02ns0MOaSoTjhr4gjMGyOQG/ZPD52BSYvkFFGWyy
 5iW7lqtlCYwMR6U4bux/acmfmCGLPvZQH/osLYSNL9LUqdUiYV3m2EsyKx5rOqYQ
 fJZW+uKMcw89Nt6cVnr1DMRu0AXQIMLrjHkuFo/sVNExFW2nJ32shtW+4irWhGiP
 vkqe52VVZFNQpNV4kOan1j3skWtwU29FxqVZMSfpccWwWo4lr8249mDzJ1otnU7R
 4W3xq30ESB4yUc6Sc/CMkyFveqmpqcvCAiA7jZF7PWbxL6avgApKuEItMDxI/3GX
 V6A6oX1k7q0ym9K9LXeqQVynAo1rtAdil53tnTacx1aFyn5Wjsaxxa/O+4+t5df8
 0s2+ZqlI+HirJ0T+6WVy1mon9LFIWKsuk3JhBT13++x8cazuuAgtcuqj4vW868vQ
 aInxZVBiwW5NCyEJDYurprX8Mp2I8DflL4MwmOGWh8qht6M2l8g=
 =i4G+
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for v6.16

Allow HP EliteBook Ultra G1q to use QSSECOM for UEFI variable acecss.
Add missing compatible for IPQ5018 TCSR block. Fix a kernel-doc warning
in SCM driver.

* tag 'qcom-drivers-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  docs: firmware: qcom_scm: Fix kernel-doc warning
  firmware: qcom: scm: Allow QSEECOM for HP EliteBook Ultra G1q
  dt-bindings: mfd: qcom,tcsr: Add compatible for ipq5018

Link: https://lore.kernel.org/r/20250520024916.39712-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:16:12 +02:00
Arnd Bergmann
07a3c038bd RISC-V cache drivers for v6.16
SiFive:
 Add support for the Eswin EIC7700 SoC, which needs to make sure of the
 non-standard cache-ops provided by the ccache driver.
 
 Bindings:
 Conversions for two Marvell bindings to yaml, and additions of two
 soc-specific compatibles to the axm45mp bindings.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaCcVygAKCRB4tDGHoIJi
 0r+WAQC7hLWCbsKAMWSLCVeEzzMidEx6Ajbqn495qmOP9g4p0gD/dRw4QpdB178M
 PejLo1wchve/Yl9bxsPZ38OZ0fxzNQU=
 =OAOU
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguQj4ACgkQmmx57+YA
 GNl5YhAAvTyEtWzuVitS/xtD8rbhQP/WoEn4P70KIg6L0Uy2Cx/wa5sjtlY1+S3E
 NQltSKrgB/n4oSwSRSBUR2+N+T7JKfdBT3dTEvJqZE2UZMvp8a4MeFPrNkeh756R
 Za0Ixh6itTCflfL1mQJOAECBmCFwszBGMKBTe7WInA9UorXYkFMuKULleAjcW2I3
 PTPzMGwQ9Lx3no86mEMYvr2TbBV1/KFV6BPhKynll3l3k3SmXraHhaC6E7GFTv86
 gzAwziXeq7sv7vbcH08pqFbHlqRPuChD11KUGdJ4PBVwt79zU+GwdA79B14GPet/
 8noOwrGPvzg2OxaoYxfaxheiUbVF3pvzPzXa2RDu88kXW/CBmBsTrJv+KpPBN8gh
 Mxnx7xvOnqJs3MoIOm/+RgX6V7H3/QyFbKOINCnxnuvbBI8PXiG1h/pAFzAaK8V2
 LdiLJjDbmBPem4ZpLA6wRvlmpoIoaJjmlbqWpwpMwIAjEfdGrgssQUGQEJoaifhi
 E7hzf28342TjD20mB8nL3W7adjC/kiFzuYQG8vSoMPLKhOVyHRlSMRLkUWc2u5Nk
 9mQLfVCyAd9pbqCiIe5AZL8hC+RDtitd6fs79JVVDVJigxz2LHuxHyxNjpzjwO4q
 5CLB5HWpjR/vSDzh7P0HOhuRyfw0upoqCoqs0bf3ooz1jXevySk=
 =y+wd
 -----END PGP SIGNATURE-----

Merge tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

RISC-V cache drivers for v6.16

SiFive:
Add support for the Eswin EIC7700 SoC, which needs to make sure of the
non-standard cache-ops provided by the ccache driver.

Bindings:
Conversions for two Marvell bindings to yaml, and additions of two
soc-specific compatibles to the axm45mp bindings.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  dt-bindings: cache: add QiLai compatible to ax45mp
  dt-bindings: cache: Convert marvell,tauros2-cache to DT schema
  dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema
  dt-bindings: cache: add specific RZ/Five compatible to ax45mp
  cache: sifive_ccache: Add ESWIN EIC7700 support
  dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility

Link: https://lore.kernel.org/r/20250516-liability-facility-667fc14a2a85@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:14:37 +02:00
Arnd Bergmann
a65dc234cd Memory controller drivers for v6.16, part two
Few fixes for STM32 Octo Memory Manager driver introduced for the same
 cycle in few commits before.  These fixes were reported only after wider
 coverage by bots through linux-next exposure.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgm9fwQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD14omD/40XUoNktd+HlB6fmNrchXHYJf78w5k58uT
 unsJBi/NLaa1niz8p62mASv714ed3UlNRnkuC7XfHrayK84Z8XH6TlZSQ2ZFzr6l
 77ouhBhTSjFVrTOYUk/fBJNEZvz1N0Js3Hg77WCYzW+im8KAgnd7j+pZd+0DpJSS
 ditchWONPwcKuFzMGVUzdkJ5KOgnokxcL+dftE7Js0Y/RWNX/NdSYc4dbDTbtFRL
 9rFn6Q8JdX7w15AKRyUAzW6jAzcWxyPfFkAPVs/xTKlb+4E5fYO3Xzxoax6hmvA3
 Y1m+eNqoDU6+JyyBvHcePcDosW4xWkq12HzTfSaN7+qGugK7i6Uycn5SNfYP5nbi
 iIjzT49F2vv6PUPt2YlpU0C8VU3QGgcaztcSkReWOJXH1xZO4tB4SvzS8zJp47cN
 aFD9ENFT8BitDrrYDN+3f6TMUCJ929GXs2cFiIlUzdwO7bh3yfvG2uUw0Lq6UOf2
 C9ZbRrVcOa7QhEp7aPHPQwpHMbCbtRswyDTUh8PejZK4BkibNaPAuExaIBJ2jlWA
 DiRFDB1hxiYX0oAdidHdaTO6BZu+CxRKYCGTXWs8RA43YhDJlE4JPI4QzhDK9PfC
 csJ/kKf/sWdychxuXtlDW4UKJ60QRN5Hhv4Yeclxl4ctrZRrNglr7gCV+Bdqn+FI
 3zAuuDHb+w==
 =pzD0
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguQg4ACgkQmmx57+YA
 GNkR9Q//aXb5IGGM0LMrN3NG20eyOo9ONylYPfXLs8I3IVFXfxVc1zGVMkCXXZdF
 4tySwlSQxIJ1cpzDqavcga/BoVtZgMd6VhsuZvd+gSGu6UprtwUEXM+ZrIwKKRwJ
 XV4MxaKqDoJTWza5y9uSjJrnoek0Mz+WNQ6wycRvriGCdOMgaD+lyrCYFgqzfLDu
 ddKiuwQOqq1o7A4+C7bhzF2SFStgvBlS464ZCTY7RLnklfQWf+LwxxqQu+gQgJ2z
 TNZS7TSkkqKBzKdfFpPiy139xAfmYDO0mB6OXb7299K7tFJsK2iuczvHemiTF66N
 ZQR5/Q95MgUhC66Eu5Z+bfar6YMLA00jFrIdOJCB9BlC8rWd43fTh5atL4+mwiNx
 4nwXi7W+AtE8ITM+IiRiyRN903T11w4CWiM9FtmuwSyr8ATJ4g+QQQ1YCvRhebfD
 9WOXVzbUZtEAnDLmjws+BBptKdC+cfw5tMIphfmfI0mxCFfIfnSWwQuHYj6CiXQV
 MQXFDMLe+WTbr/T15bMvuyxhxSNgUTW9Hku479/THMR9/4G6HmtetFbh9AUarbJI
 98fdS8o//iTc25c7xFCPdol12V1PfYp0DaSGDBqlH5AQaIK5+uDoh/kHLstB09Kb
 XjCX3Cr2YzUehumtfz/5tltSMtkjq7NvUdjq9nANFW+KZpNQ568=
 =q9DF
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.16, part two

Few fixes for STM32 Octo Memory Manager driver introduced for the same
cycle in few commits before.  These fixes were reported only after wider
coverage by bots through linux-next exposure.

* tag 'memory-controller-drv-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: stm32_omm: Fix error handling in stm32_omm_disable_child()
  memory: stm32_omm: Fix NULL vs IS_ERR() check in probe()
  memory: stm32_omm: Fix error handling in stm32_omm_configure()
  memory: stm32: Fix spelling mistake "resset" -> "reset"

Link: https://lore.kernel.org/r/20250516082415.7871-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:13:50 +02:00
Arnd Bergmann
7148b42e85 Samsung SoC drivers for v6.16, part two
Add CPU hotplug support on Google GS101 by toggling respective bits in
 secondary PMU intr block (Power Management Unit (PMU) Interrupt
 Generation) from the main PMU driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmgm9QsQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD15dgD/4oYhj8BVQP/cpb912oeBiLF3Gu1bKtv/mi
 rpPPmAirDH+xgwBwPGYH6TitUTv4ah+NKHguLMJCHv3IkYeBBZoT+6RWflDz2lZU
 lK/n1vcj0X5iWomH5d355xyNqR7SLbqWSHRadCavN9oKk9X46IZyuABnHtLwnaeI
 evKf+rIbXgyXd1Sa4eDPpepzrOatcWy9mb++gAjLVaCof1EAUcRmUH52rvIjC7eP
 mv/VKVi4fyEyC3aCss7Lz0P+S9ba1rZ5Sx6iyv/EtT/V7LNpLit1ewDr/uV3LaFi
 vkoPVovRby5Dc/18HUJBDOJppF35iM34Uto0kZvFZKtrHo8srPbczUQVekTgYr5F
 W2H0JFB32K02tgWJBSOg1sPPHqnMaUYu8fbX5jax5Tnz3oqnDqSlSJzHnTq/aDNN
 lhJHxzqb+DTNKZxkXIBhbnQtTBmOI5Mk2L0kt3WwNZuryT5UClSP9jEkvTrqSrym
 uQwpV4LuNQNHQ7ctvbZKY3/nWRXsU/VEH6oNMIouoUt+5Cok4wMZ9Gx95/by4wLL
 51K0773lLrZM3jXP0cHhL+JH0nBS+Bc5w7XViMZSgmXH9W94bi+WzmJYvCBFwqUp
 BT3BLPL7t2D1+Gya/W0ZkMSxcvQaeuCPkrF4AtpDdFrC756eIJLJOCppfcmVyyLp
 fhN2H0tdmA==
 =5fbP
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguQcQACgkQmmx57+YA
 GNn0LQ/9G0OZmOouvCPTjOmgB3k3ecBKGQUFtoLerLa5caRQstZT7z8xb1CUzh31
 +P1KcRO/2PhkKEhUj7zoIDm2k2kLYq0HeIRKv2mZhcUnQ1Iac11Z++OWcchPUOtV
 WX/bbp9uX9QcuL0DEfsfoBgdPwXwo04Tg5u/uPluDgvlopbtp8Xq5mXP/TZmaiKY
 OC6UVIqZBB2l4um+B85L+FUJUqL7jtOiOwKUJs8RUh6GCdPM4r4f/QAFj8oca7Eg
 pkcjTkIur+dIPFbtuIggy+1pIVE8FIZ0NMr8kJkCfg39ohpdrRZuowu44jBKHP3x
 azyRM/rTpkOajowpZvNW6Kuxfll/amJRDtpX5/nJYPnfvF/f1ildRSfJxS9Ao4MN
 FKI7vtnOvjCZ33Z7PVug4zmY8Bj4y93M5jkPxIdUetj6drBDMgmRVDVusdvmlpLj
 +WcLOkOj+x8rPV/HZ9LVT0I+IhTQqf4KwkorzB6JLb/2i3/F8g2zLCgGPLxIrxPE
 0tHUpJe8B6woneenfMw8dbOI5W5eH9HT3P89bTgdkYLqJUTgpErOTvfCjgAdsRDI
 eigo1X37lCToIYIZ+RJmbS6F5Wvms8SH9n96WaRxMuA4MGx2/o5zjIdvuAgaKa8Y
 ne6n0rJmUste7T6yKD0Vad+f0B0uuSo1g2H59lJQdq6B67p3vtQ=
 =u6x7
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC drivers for v6.16, part two

Add CPU hotplug support on Google GS101 by toggling respective bits in
secondary PMU intr block (Power Management Unit (PMU) Interrupt
Generation) from the main PMU driver.

* tag 'samsung-drivers-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: exynos-pmu: enable CPU hotplug support for gs101
  MAINTAINERS: Add google,gs101-pmu-intr-gen.yaml binding file
  dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandle
  dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentation

Link: https://lore.kernel.org/r/20250516082037.7248-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:12:36 +02:00
William A. Kennington III
7e1a0dfb3f
arm64: dts: nuvoton: Add pinctrl
This is critical to support multifunction pins shared between devices as
well as generic GPIOs.

Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:10:24 +02:00
Henry Martin
f1706e0e1a
soc: aspeed: Add NULL check in aspeed_lpc_enable_snoop()
devm_kasprintf() returns NULL when memory allocation fails. Currently,
aspeed_lpc_enable_snoop() does not check for this case, which results in a
NULL pointer dereference.

Add NULL check after devm_kasprintf() to prevent this issue.

Fixes: 3772e5da44 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Henry Martin <bsdhenrymartin@gmail.com>
Link: https://patch.msgid.link/20250401074647.21300-1-bsdhenrymartin@gmail.com
[arj: Fix Fixes: tag to use subject from 3772e5da44]
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:07:23 +02:00
Su Hui
d9f0a97e85
soc: aspeed: lpc: Fix impossible judgment condition
smatch error:
drivers/soc/aspeed/aspeed-lpc-snoop.c:169
aspeed_lpc_snoop_config_irq() warn: platform_get_irq() does not return zero

platform_get_irq() return non-zero IRQ number or negative error code,
change '!lpc_snoop->irq' to 'lpc_snoop->irq < 0' to fix this.

Fixes: 9f4f9ae81d ("drivers/misc: add Aspeed LPC snoop driver")
Signed-off-by: Su Hui <suhui@nfschina.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20231027020703.1231875-1-suhui@nfschina.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:07:18 +02:00
Joel Stanley
e4f59f873c
ARM: aspeed: Don't select SRAM
The ASPEED devices have SRAM, but don't require it for basic function
(or any function; there's no known users of the driver).

Fixes: 8c2ed9bcfb ("arm: Add Aspeed machine")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patch.msgid.link/20250115103942.421429-1-joel@jms.id.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:07:08 +02:00
Baochen Qiang
886bb3624e wifi: ath12k: fix regdomain update failure when connection establishes
Commit 7ed3e88664 ("wifi: ath12k: update regulatory rules when connection
established") introduced a call to ath12k_reg_handle_chan_list() upon
connection to update the regulatory domain in cfg80211 based on the power
type received from the AP.

However, this update fails because ah->regd_updated was already set to true
during the earlier regulatory update triggered when the interface was
added.

To resolve this, reset ah->regd_updated before calling
ath12k_reg_handle_chan_list() to ensure the update proceeds correctly.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00284-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1

Fixes: 7ed3e88664 ("wifi: ath12k: update regulatory rules when connection established")
Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Signed-off-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Link: https://patch.msgid.link/20250521-ath12k-fix-ah-regd_updated-v1-3-9737de5bf98e@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-05-21 14:01:06 -07:00
Baochen Qiang
37e775a0a9 wifi: ath12k: fix regdomain update failure when adding interface
Commit 4c546023d7 ("wifi: ath12k: update regulatory rules when interface
added"), introduced a call to ath12k_reg_handle_chan_list() during
interface addition to update the regulatory domain based on the interface
type. While this works initially, subsequent updates (e.g., after an
interface delete/re-add cycle) fail because ah->regd_updated is never
reset.

To address this, reset ah->regd_updated before calling
ath12k_reg_handle_chan_list() to allow the update to proceed.

However, this change exposes another issue: a timeout occurs when waiting
for the 11D scan to complete, as seen in the log:
    ath12k_pci 0000:05:00.0: failed to receive 11d scan complete: timed out

This happens because during interface down, ar->state_11d is set to
ATH12K_11D_PREPARING, and during interface up, the host waits for
ar->completed_11d_scan even though the scan hasn't started yet.

Fix this by updating the wait condition to check for ATH12K_11D_RUNNING,
which is the only state where a scan complete event is expected.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00284-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1

Fixes: 4c546023d7 ("wifi: ath12k: update regulatory rules when interface added")
Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Signed-off-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Link: https://patch.msgid.link/20250521-ath12k-fix-ah-regd_updated-v1-2-9737de5bf98e@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-05-21 14:01:06 -07:00
Baochen Qiang
d662c14a51 wifi: ath12k: fix regdomain update failure after 11D scan completes
In the current implementation of ath12k_regd_update(), the ah->regd_updated
flag is used to ensure that the regulatory domain is updated only once per
radio. During MAC registration, this function is called to push the default
regulatory domain to cfg80211. At that point, the hardware state is not on
and hence ah->regd_updated remains false.

However, after commit 4c546023d7 ("wifi: ath12k: update regulatory rules
when interface added"), ath12k_reg_handle_chan_list() is invoked when an
interface is added, which in turn calls ath12k_regd_update(). By this time,
hardware state is on and consecutively ah->regd_updated becomes true.

Later, when the 11D scan completes and a new regulatory domain is received
from the firmware, the host attempts to update cfg80211 again via
ath12k_regd_update(). But since ah->regd_updated is already true, the
update is skipped.

>From the user's perspective, this results in a failure to connect to 6 GHz
APs, as the default regulatory domain (the only one pushed to cfg80211)
does not include 6 GHz support.

To resolve this, reset the ah->regd_updated flag when handling the 11D
regulatory domain update.

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00284-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1

Fixes: 591de41d70 ("wifi: ath12k: add 11d scan offload support")
Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Signed-off-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Link: https://patch.msgid.link/20250521-ath12k-fix-ah-regd_updated-v1-1-9737de5bf98e@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2025-05-21 14:01:06 -07:00
Rafael J. Wysocki
0c905cadf3 CPUFreq updates for 6.16
- Rust abstractions for CPUFreq framework (Viresh Kumar).
 
 - Rust abstractions for OPP framework (Viresh Kumar).
 
 - Basic Rust abstractions for Clk and Cpumask frameworks (Viresh Kumar).
 
 - Minor cleanup to the SCMI cpufreq driver (Mike Tipton).
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEx73Crsp7f6M6scA70rkcPK6BEhwFAmgsHJEACgkQ0rkcPK6B
 EhwzURAAp1T46sM970xrUKAbm542LYw2Rff6nYzNl9khU+tMo60ypdjtSh/RVQAZ
 fcEKyaaXOEgHE6ahWOLaOIaMHYiah0DqIf8eVbZsJa3jTZ4nVNTd4Em1TQprWYer
 0KfDT9UXqiz5sE6h3RvFRid0T8t93XOHZ0y48CDLnVnIzIMogB4dkWYM3O/KoAmh
 MSVKYOvJXhj97AjHrFnJ6JzYlwX6gqq5UvRi6tzgm6B3kxHZG9dxCB25fCkRU+gP
 0oVL1JHixYE36Os3oC0BnjXpAyvJa3gjv7XCNilVHnoqWpIccspBp/7uUI3eex/4
 4uamldNalTA1bmP84JJzYt5qc9rBHME2nDvDlD6VbnmjjT/WFAF9/RAMeaE443Eo
 0v/XiLcQuM+xDUGqUh6HheAfguIvfYASLM2Nkzi6yq13xYO2jK1NC+Ijwim2RJnC
 lvYHrQTuvAbPyH2oFqPWvXM6/2HbDva6wxD3LI879Bpf7cJi/FfLDIGisDkx80WU
 q8Ys2q8wXm0BkzWpaEbl2tZW43pMAS9TaYVUjoU3WZKbLsIWfmL/BofPS6Yjd6X7
 dKCzREn3lw10Rk23SKUvJP6TYqBHW3ohkyGUtjoMbY0IGFrKv+XEZw7wDmj0GBWt
 sA62Kf+s0bFmo0jy+x4uaEdf0ZNG9VqhcB2sYHaJpfk+votl2ic=
 =Zx0u
 -----END PGP SIGNATURE-----

Merge tag 'cpufreq-arm-updates-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm

Merge ARM CPUFreq updates for 6.16 from Viresh Kumar:

"- Rust abstractions for CPUFreq framework (Viresh Kumar).

 - Rust abstractions for OPP framework (Viresh Kumar).

 - Basic Rust abstractions for Clk and Cpumask frameworks (Viresh Kumar).

 - Minor cleanup to the SCMI cpufreq driver (Mike Tipton)."

* tag 'cpufreq-arm-updates-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: (24 commits)
  cpufreq: scmi: Skip SCMI devices that aren't used by the CPUs
  cpufreq: Add Rust-based cpufreq-dt driver
  rust: opp: Extend OPP abstractions with cpufreq support
  rust: cpufreq: Extend abstractions for driver registration
  rust: cpufreq: Extend abstractions for policy and driver ops
  rust: cpufreq: Add initial abstractions for cpufreq framework
  rust: opp: Add abstractions for the configuration options
  rust: opp: Add abstractions for the OPP table
  rust: opp: Add initial abstractions for OPP framework
  rust: cpu: Add from_cpu()
  rust: macros: enable use of hyphens in module names
  rust: clk: Add initial abstractions
  rust: clk: Add helpers for Rust code
  MAINTAINERS: Add entry for Rust cpumask API
  rust: cpumask: Add initial abstractions
  rust: cpumask: Add few more helpers
  rust: devres: require a bound device
  rust: pci: move iomap_region() to impl Device<Bound>
  rust: device: implement Bound device context
  rust: pci: preserve device context in AsRef
  ...
2025-05-21 22:49:34 +02:00
Matt Atwood
49c6dc74b5 drm/xe/ptl: Update the PTL pci id table
Update to current bspec table.

Bspec: 72574

Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://lore.kernel.org/r/20250520195749.371748-1-matthew.s.atwood@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2025-05-21 13:48:25 -07:00
Lifeng Zheng
922607a2b4 cpufreq: CPPC: Add support for autonomous selection
Add sysfs interfaces for CPPC autonomous selection in the cppc_cpufreq
driver.

Signed-off-by: Lifeng Zheng <zhenglifeng1@huawei.com>
Reviewed-by: Sumit Gupta <sumitg@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://patch.msgid.link/20250507031941.2812701-1-zhenglifeng1@huawei.com
[ rjw: Subject edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-05-21 22:47:44 +02:00
Ming Lei
9172dbf3a6 ublk: handle ublk_set_auto_buf_reg() failure correctly in ublk_fetch()
If ublk_set_auto_buf_reg() fails, we need to unlock and return,
otherwise `ub->mutex` is leaked.

Fixes: 99c1e4eb6a ("ublk: register buffer to local io_uring with provided buf index via UBLK_F_AUTO_BUF_REG")
Reported-by: Caleb Sander Mateos <csander@purestorage.com>
Signed-off-by: Ming Lei <ming.lei@redhat.com>
Link: https://lore.kernel.org/r/20250521025502.71041-2-ming.lei@redhat.com
Reviewed-by: Caleb Sander Mateos <csander@purestorage.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-05-21 14:30:28 -06:00
Bowen Yu
1da98dc52b cpufreq: Update sscanf() to kstrtouint()
In store_scaling_setspeed(), sscanf is still used to read to sysfs.
Newer kstrtox provide more features including overflow protection,
better errorhandling and allows for other systems of numeration. It
is therefore better to update sscanf() to kstrtouint().

Signed-off-by: Bowen Yu <yubowen8@huawei.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://patch.msgid.link/20250519070938.931396-1-yubowen8@huawei.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-05-21 22:27:36 +02:00
Bowen Yu
9c5075fc9d cpufreq: Replace magic number
Setting the length of str_governor with a magic number could cause
overflow when max length increases, it is better to use the defined
macro in this case.

Signed-off-by: Bowen Yu <yubowen8@huawei.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://patch.msgid.link/20250519070908.930879-1-yubowen8@huawei.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-05-21 22:19:10 +02:00
Daniel Dadap
c597ce56e9 ALSA: hda/tegra: Switch to two-argument strscpy()
strscpy() is used in this driver with char[] struct member destinations,
so it is possible to use the simplified two-argument variant which was
added by commit e6584c3964 ("string: Allow 2-argument strscpy()").

Signed-off-by: Daniel Dadap <ddadap@nvidia.com>
Link: https://patch.msgid.link/aC3lbOTYxWvYR9dl@ddadap-lakeline.nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-05-21 22:15:29 +02:00
Daniel Dadap
4b214c9bbe ALSA: hda - Add new driver for HDA controllers listed via ACPI
Some systems expose HD-Audio controllers via objects in the ACPI tables
which encapsulate the controller's interrupt and the base address for the
HDA registers in an ACPI _CRS object, for example, as listed in this ACPI
table dump excerpt:

        Device (HDA0)
        {
            Name (_HID, "NVDA2014")  // _HID: Hardware ID
            ...
            Name (_CRS, ResourceTemplate ()
            // _CRS: Current Resource Settings
            {
                Memory32Fixed (ReadWrite,
                    0x36078000,         // Address Base
                    0x00008000,         // Address Length
                    )
                Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,
                           ,, )
                {
                    0x0000021E,
                }
            })
        }

Add support for HDA controllers discovered through ACPI, including support
for some platforms which expose such HDA controllers on NVIDIA SoCs. This
is done with a new driver which uses existing infrastructure for extracting
resource information from _CRS objects and plumbs the parsed resource
information through to the existing HDA infrastructure to enable HD-Audio
functionality on such devices.

Although this driver is in the sound/pci/hda/ directory, it targets devices
which are not actually enumerated on the PCI bus. This is because it
depends upon the Intel "Azalia" infrastructure which has traditionally been
usedvfor PCI-based devices.

Signed-off-by: Daniel Dadap <ddadap@nvidia.com>
Link: https://patch.msgid.link/aC3ksXJUM9DlKiz6@ddadap-lakeline.nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-05-21 22:14:48 +02:00
Jakub Kicinski
4e4dc6db2b tools: ynl: add a sample for TC
Add a very simple TC dump sample with decoding of fq_codel attrs:

  # ./tools/net/ynl/samples/tc
        dummy0: fq_codel  limit: 10240p target: 5ms new_flow_cnt: 0

proving that selector passing (for stats) works.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-13-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:23 -07:00
Jakub Kicinski
33baf6f73a netlink: specs: tc: add qdisc dump to TC spec
Hook TC qdisc dump in the TC qdisc get, it only supported doit
until now and dumping will be used by the sample code.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-12-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:23 -07:00
Jakub Kicinski
e06c9d2515 tools: ynl: enable codegen for TC
We are ready to support most of TC. Enable C code gen.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-11-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:23 -07:00
Jakub Kicinski
4e9806a8f4 tools: ynl-gen: support weird sub-message formats
TC uses all possible sub-message formats:
 - nested attrs
 - fixed headers + nested attrs
 - fixed headers
 - empty

Nested attrs are already supported for rt-link. Add support
for remaining 3. The empty and fixed headers ones are fairly
trivial, we can fake a Binary or Flags type instead of a Nest.

For fixed headers + nest we need to teach nest parsing and
nest put to handle fixed headers.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-10-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:23 -07:00
Jakub Kicinski
092b34b937 tools: ynl-gen: support local attrs in _multi_parse
The _multi_parse() helper calls the _attr_get() method of each attr,
but it only respects what code the helper wants to emit, not what
local variables it needs. Local variables will soon be needed,
support them.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-9-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:22 -07:00
Jakub Kicinski
a66a170b68 tools: ynl-gen: move fixed header info from RenderInfo to Struct
RenderInfo describes a request-response exchange. Struct describes
a parsed attribute set. For ease of parsing sub-messages with
fixed headers move fixed header info from RenderInfo to Struct.
No functional changes.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-8-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:22 -07:00
Jakub Kicinski
cb39645d9a tools: ynl-gen: support passing selector to a nest
In rtnetlink all submessages had the selector at the same level
of nesting as the submessage. We could refer to the relevant
attribute from the current struct. In TC, stats are one level
of nesting deeper than "kind". Teach the code-gen about structs
which need to be passed a selector by the caller for parsing.

Because structs are "topologically sorted" one pass of propagating
the selectors down is enough.

For generating netlink message we depend on the presence bits
so no selector passing needed there.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-7-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:22 -07:00
Jakub Kicinski
ba5a199b24 netlink: specs: tc: drop the family name prefix from attrs
All attribute sets and messages are prefixed with tc-.
The C codegen also adds the family name to all structs.
We end up with names like struct tc_tc_act_attrs.
Remove the tc- prefixes to shorten the names.
This should not impact Python as the attr set names
are never exposed to user, they are only used to refer
to things internally, in the encoder / decoder.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-6-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:21 -07:00
Jakub Kicinski
f9aec8025a netlink: specs: tc: add C naming info
Add naming info needed by C code gen.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-5-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:21 -07:00
Jakub Kicinski
eb1f803f98 netlink: specs: tc: use tc-gact instead of tc-gen as struct name
There is a define in the uAPI header called tc_gen which expands
to the "generic" TC action fields. This helps other actions include
the base fields without having to deal with nested structs.

A couple of actions (sample, gact) do not define extra fields,
so the spec used a common tc-gen struct for both of them.
Unfortunately this struct does not exist in C. Let's use gact's
(generic act's) struct for basic actions.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-4-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:21 -07:00
Jakub Kicinski
e9033a846e netlink: specs: tc: remove duplicate nests
tc-act-stats-attrs and tca-stats-attrs are almost identical.
The only difference is that the latter has sub-message decoding
for app, rather than declaring it as a binary attr.

tc-act-police-attrs and tc-police-attrs are identical but for
the TODO annotations.

Reviewed-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://patch.msgid.link/20250520161916.413298-3-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:21 -07:00
Jakub Kicinski
8b8762eeec tools: ynl-gen: add makefile deps for neigh
Kory is reporting build issues after recent additions to YNL
if the system headers are old.

Link: https://lore.kernel.org/20250519164949.597d6e92@kmaincent-XPS-13-7390
Reported-by: Kory Maincent <kory.maincent@bootlin.com>
Fixes: 0939a418b3 ("tools: ynl: submsg: reverse parse / error reporting")
Tested-by: Kory Maincent <kory.maincent@bootlin.com>
Link: https://patch.msgid.link/20250520161916.413298-2-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-05-21 12:38:20 -07:00
Hans Zhang
4e7bca76e3 PCI/MSI: Use bool for MSI enable state tracking
Convert pci_msi_enable and pci_msi_enabled() to use bool type for clarity.
No functional changes, only code cleanup.

Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250516165223.125083-2-18255117159@163.com
2025-05-21 21:28:53 +02:00
Ian Rogers
0589aff473 perf python: Add evsel cpus and threads functions
Allow access to cpus and thread_map structs associated with an evsel.

Signed-off-by: Ian Rogers <irogers@google.com>
Acked-by: Gautam Menghani <gautam@linux.ibm.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20250519195148.1708988-4-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2025-05-21 15:07:13 -03:00