Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.
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Merge tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.13-rc1
Contains a couple of fixes to the PMC power domain implementation and
exports a regmap from PMC needed to implement USB sleepwalk support.
* tag 'tegra-for-5.13-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Print out domain name when reset fails to acquire
soc/tegra: pmc: Ensure that clock rates aren't too high
soc/tegra: pmc: Fix completion of power-gate toggling
soc/tegra: pmc: Fix imbalanced clock disabling in error code path
soc/tegra: regulators: Fix locking up when voltage-spread is out of range
soc/tegra: pmc: Provide USB sleepwalk register map
Link: https://lore.kernel.org/r/20210401172622.3352990-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds PLLE HW sequencer support which is necessary for USB sleepwalk
functionality.
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Merge tag 'tegra-for-5.13-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
clk: tegra: Changes for v5.13-rc1
This adds PLLE HW sequencer support which is necessary for USB sleepwalk
functionality.
* tag 'tegra-for-5.13-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: Don't enable PLLE HW sequencer at init
clk: tegra: Add PLLE HW power sequencer control
Link: https://lore.kernel.org/r/20210401172622.3352990-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
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Merge tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 5.13:
- Update SCU power domain driver to keep console domain power on.
- Add missing ADC1 power domain to SCU power domain driver.
- Update comments for single global power domain in SCU power domain
driver.
- Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
* tag 'imx-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: scu-pd: add missed ADC1 pd
firmware: imx: scu-pd: Update comments for single global power domain
firmware: imx: scu-pd: do not power off console domain
soc: imx: add i.MX51/i.MX53 unique id support
Link: https://lore.kernel.org/r/20210331041019.31345-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
changes for 5.13, please pull the following:
- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
the code to support resetting the 63138 SATA controller
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Merge tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers
changes for 5.13, please pull the following:
- Rafal updates the Broadcom PMB binding to support BCM63138 and updates
the code to support resetting the 63138 SATA controller
* tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: bcm-pmb: add BCM63138 SATA support
dt-bindings: power: bcm-pmb: add BCM63138 binding
Link: https://lore.kernel.org/r/20210330184006.1451315-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'optee-memref-size-for-v5.13' of git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
OP-TEE skip check of returned memref size
* tag 'optee-memref-size-for-v5.13' of git://git.linaro.org/people/jens.wiklander/linux-tee:
tee: optee: do not check memref size on return from Secure World
Link: https://lore.kernel.org/r/20210330110037.GA1166563@jade
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.
These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:
- ti-sysc needs iorange check improved when the interconnect target module
has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as we
now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of using
builtin_platform_driver_probe for deferred probe to work
There are also few minor non-urgent fixes:
- soc init code pdata_quirks_init_clocks should be static
- ti-sysc has few unneeded semiconon typos
- ti-sysc can use kzalloc instead of kcalloc for a single element
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Merge tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers
Driver changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to patch the related drivers to prepare.
These are mostly ti-sysc interconnect target module driver changes and soc
init changes. However, there are minor changes to other drivers too. There
are changes for pci-dra7xx probe, omap-prm idle configuration, and a omap5
clock change:
- ti-sysc needs iorange check improved when the interconnect target module
has no control registers listed
- ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
issues with missing resources and unnecessary deferred probe
- ti-sysc debug option can now detect more devices
- ti-sysc now warns if an old incomplete devicetree data is found as we
now rely on it being complete for am3 and 4
- soc init code needs to check for prcm and prm nodes for omap4/5 and
dra7
- omap-prm driver needs to enable autoidle retention support for omap4
- omap5 clocks are missing gpmc and ocmc clock registers
- pci-dra7xx now needs to use builtin_platform_driver instead of using
builtin_platform_driver_probe for deferred probe to work
There are also few minor non-urgent fixes:
- soc init code pdata_quirks_init_clocks should be static
- ti-sysc has few unneeded semiconon typos
- ti-sysc can use kzalloc instead of kcalloc for a single element
* tag 'omap-for-v5.13/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Use kzalloc for allocating only one thing
bus: ti-sysc: remove unneeded semicolon
ARM: OMAP2+: Make symbol 'pdata_quirks_init_clocks' static
PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver
clk: ti: omap5: Add missing gpmc and ocmc clkctrl
soc: ti: omap-prm: Allow hardware supported retention when idle
ARM: OMAP2+: Init both prm and prcm nodes early for clocks
bus: ti-sysc: Check for old incomplete dtb
bus: ti-sysc: Detect more modules for debugging
bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first
bus: ti-sysc: Fix initializing module_pa for modules without sysc register
ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
bus: ti-sysc: Fix warning on unbind if reset is not deasserted
ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
ARM: dts: am33xx: add aliases for mmc interfaces
bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
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Merge tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi into arm/drivers
Raspberry Pi driver updates for v5.13:
- Fix-up all RPi firmware drivers so as for unbind to happen in an
orderly fashion
- Support for RPi's PoE hat PWM bus
* tag 'rpi-poe-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi:
pwm: Add Raspberry Pi Firmware based PWM bus
dt-bindings: pwm: Add binding for RPi firmware PWM bus
input: raspberrypi-ts: Release firmware handle when not needed
staging: vchiq: Release firmware handle on unbind
soc: bcm: raspberrypi-power: Release firmware handle on unbind
reset: raspberrypi: Release firmware handle on unbind
gpio: raspberrypi-exp: Release firmware handle on unbind
clk: bcm: rpi: Release firmware handle on unbind
firmware: raspberrypi: Introduce devm_rpi_firmware_get()
firmware: raspberrypi: Keep count of all consumers
Link: https://lore.kernel.org/r/20210322174232.29549-1-nsaenz@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When Secure World returns, it may have changed the size attribute of the
memory references passed as [in/out] parameters. The GlobalPlatform TEE
Internal Core API specification does not restrict the values that this
size can take. In particular, Secure World may increase the value to be
larger than the size of the input buffer to indicate that it needs more.
Therefore, the size check in optee_from_msg_param() is incorrect and
needs to be removed. This fixes a number of failed test cases in the
GlobalPlatform TEE Initial Configuratiom Test Suite v2_0_0_0-2017_06_09
when OP-TEE is compiled without dynamic shared memory support
(CFG_CORE_DYN_SHM=n).
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
If build kernel without "O=dir", below error will be seen:
In file included from drivers/tee/optee/optee_trace.h:67,
from drivers/tee/optee/call.c:18:
./include/trace/define_trace.h:95:42: fatal error: ./optee_trace.h: No such file or directory
95 | #include TRACE_INCLUDE(TRACE_INCLUDE_FILE)
| ^
compilation terminated.
Fix it by adding below line to Makefile:
CFLAGS_call.o := -I$(src)
Tested with and without "O=dir", both can build successfully.
Fixes: 0101947dbc ("tee: optee: add invoke_fn tracepoints")
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Suggested-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
ADC1 is not defined in pd driver on 8QM.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since the introduction of the PM domain support for the scu-pd, the genpd
framework has been continuously improved. More preciously, using a single
global power domain can quite easily be deployed for imx platforms.
To avoid confusions, let's therefore make an update to the comments about
the missing pieces.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Print out domain name when reset fails to acquire for debugging purposes
and to make formatting of GENPD errors consistent in the driver.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Switch all clocks of a power domain to a safe rate which is suitable
for all possible voltages in order to ensure that hardware constraints
aren't violated when power domain state toggles.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The SW-initiated power gate toggling is dropped by PMC if there is
contention with a HW-initiated toggling, i.e. when one of CPU cores is
gated by cpuidle driver. Software should retry the toggling after 10
microseconds on Tegra20/30 SoCs, hence add the retrying. On Tegra114+ the
toggling method was changed in hardware, the TOGGLE_START bit indicates
whether PMC is busy or could accept the command to toggle, hence handle
that bit properly.
The problem pops up after enabling dynamic power gating of 3D hardware,
where 3D power domain fails to turn on/off "randomly".
The programming sequence and quirks are documented in TRMs, but PMC
driver obliviously re-used the Tegra20 logic for Tegra30+, which strikes
back now. The 10 microseconds and other timeouts aren't documented in TRM,
they are taken from downstream kernel.
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commit;h=311dd1c318b70e93bcefec15456a10ff2b9eb0ff
Link: https://nv-tegra.nvidia.com/gitweb/?p=linux-3.10.git;a=commit;h=7f36693c47cb23730a6b2822e0975be65fb0c51d
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The tegra_powergate_power_up() has a typo in the error code path where it
will try to disable clocks twice, fix it. In practice that error never
happens, so this is a minor correction.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix voltage coupler lockup which happens when voltage-spread is out
of range due to a bug in the code. The max-spread requirement shall be
accounted when CPU regulator doesn't have consumers. This problem is
observed on Tegra30 Ouya game console once system-wide DVFS is enabled
in a device-tree.
Fixes: 783807436f ("soc/tegra: regulators: Add regulators coupler for Tegra30")
Cc: stable@vger.kernel.org
Reported-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit implements a register map which grants USB (UTMI and HSIC)
sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
is in PMC hardware block but USB PHY drivers have the best knowledge
of proper programming sequence.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
BCM63138 has SATA controller that needs to be powered up using PMB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PMB can be also found on bcm63xx chipsets. It uses difference device
addresses so a new binding is required.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
PLLE hardware power sequencer references PEX/SATA UPHY PLL hardware
power sequencers' output to enable/disable PLLE. PLLE hardware power
sequencer has to be enabled only after PEX/SATA UPHY PLL's sequencers
are enabled.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
PLLE has a hardware power sequencer logic which is a state machine
that can power on/off PLLE without any software intervention. The
sequencer has two inputs, one from XUSB UPHY PLL and the other from
SATA UPHY PLL. PLLE provides reference clock to XUSB and SATA UPHY
PLLs. When both of the downstream PLLs are powered-off, PLLE hardware
power sequencer will automatically power off PLLE for power saving.
XUSB and SATA UPHY PLLs also have their own hardware power sequencer
logic. XUSB UPHY PLL is shared between XUSB SuperSpeed ports and PCIE
controllers. The XUSB UPHY PLL hardware power sequencer has inputs
from XUSB and PCIE. When all of the XUSB SuperSpeed ports and PCIE
controllers are in low power state, XUSB UPHY PLL hardware power
sequencer automatically power off PLL and flags idle to PLLE hardware
power sequencer. Similar applies to SATA UPHY PLL.
PLLE hardware power sequencer has to be enabled after both downstream
sequencers are enabled.
This commit adds two helper functions:
1. tegra210_plle_hw_sequence_start() for XUSB PADCTL driver to enable
PLLE hardware sequencer at proper time.
2. tegra210_plle_hw_sequence_is_enabled() for XUSB PADCTL driver to
check whether PLLE hardware sequencer has been enabled or not.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use kzalloc rather than kcalloc(1,...)
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
@@
- kcalloc(1,
+ kzalloc(
...)
// </smpl>
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Eliminate the following coccicheck warning:
./drivers/bus/ti-sysc.c:1595:2-3: Unneeded semicolon
./drivers/bus/ti-sysc.c:2833:3-4: Unneeded semicolon
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The sparse tool complains as follows:
arch/arm/mach-omap2/pdata-quirks.c:578:1: warning:
symbol 'pdata_quirks_init_clocks' was not declared. Should it be static?
This symbol is not used outside of pdata-quirks.c, so this
commit marks it static.
Fixes: a15de032a7 ("ARM: OMAP2+: Init both prm and prcm nodes early for clocks")
Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Prepare rmobile-sysc for fw_devlink=on,
- A minor cleanup.
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Merge tag 'renesas-drivers-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.13
- Prepare rmobile-sysc for fw_devlink=on,
- A minor cleanup.
* tag 'renesas-drivers-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: rmobile-sysc: Mark fwnode when PM domain is added
soc: renesas: rmobile-sysc: Remove unneeded platform includes
Link: https://lore.kernel.org/r/20210319085146.2709844-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds support to control the PWM bus available in official Raspberry Pi
PoE HAT. Only RPi's co-processor has access to it, so commands have to
be sent through RPi's firmware mailbox interface.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
The PWM bus controlling the fan in RPi's official PoE hat can only be
controlled by the board's co-processor.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Rob Herring <robh@kernel.org>
There is no use for the firmware interface after getting the touch
buffer address, so release it.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware
interface when unbinding the device.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/bcm/clk-raspberrypi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
When unbinding the firmware device we need to make sure it has no
consumers left. Otherwise we'd leave them with a firmware handle
pointing at freed memory.
Keep a reference count of all consumers and introduce rpi_firmware_put()
which will permit automatically decrease the reference count upon
unbinding consumer drivers.
Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add tracepoints to retrieve information about the invoke_fn. This would
help to measure how many invoke_fn are triggered and how long it takes
to complete one invoke_fn call.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
i.MX51 and i.MX53 SoCs have a 64-bit SoC unique ID stored in IIM,
which can be used as SoC serial number. The same feature is already
implemented for i.MX6/i.MX7, so this complements support to earlier
SoCs.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
After updating pci-dra7xx driver to probe with ti-sysc and genpd, I
noticed that dra7xx_pcie_probe() would not run if a power-domains property
was configured for the interconnect target module.
Turns out that module_platform_driver_probe uses platform_driver_probe(),
while builtin_platform_driver uses platform_driver_register().
Only platform_driver_register() works for deferred probe as noted in the
comments for __platform_driver_probe() in drivers/base/platform.c with a
line saying "Note that this is incompatible with deferred probing".
With module_platform_driver_probe, we have platform_driver_probe() produce
-ENODEV error at device_initcall() level, and no further attempts are done.
Let's fix this by using module_platform_driver instead.
Note this is not an issue currently as we probe devices with simple-bus,
and only is needed as we start probing the device with ti-sysc, or when
probed with simple-pm-bus.
Note that we must now also remove __init for probe related functions to
avoid a section mismatch warning.
Cc: linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The gpmc clock is needed to update omap5 to boot with genpd with the
related devicetree patches. The ocmc clock is currently not used but
let's add it so we have all the clocks for the l3main2 defined.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When moving the l4 interconnect instances to probe with simple-pm-bus and
genpd, we will have l4per and core domains stop idling unless we configure
the domain bits to allow retention when idle.
As the TI SoCs have hardware autoidle capabilities, this is safe to do.
The domains will only enter retention on WFI when none of the devices on
the domain block autoidle in the hardware. This follows what we are
already currently doing.
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's be nice and show an error on the SoCs about old imcomplete devicetree
if the dtb is still using "simple-bus" instead of "simple-pm-bus" for the
root OCP node.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We want to probe l4_wkup and l4_cfg interconnect devices first to avoid
issues with missing resources. Otherwise we attempt to probe l4_per
devices first causing pointless deferred probe and also annoyingh
renumbering of the MMC devices for example.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have interconnect target modules with no known registers using only
clocks and resets, but we still want to detect them based on the module
IO range. So let's call sysc_parse_and_check_child_range() earlier so we
have module_pa properly initialized.
Fixes: 2928135c93 ("bus: ti-sysc: Support modules without control registers")
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix moving mmc devices with dts aliases as discussed on the lists.
Without this we now have internal eMMC mmc1 show up as mmc2 compared
to the earlier order of devices.
Signed-off-by: Tony Lindgren <tony@atomide.com>
