- Various clk driver cleanups
- MediaTek MT6735 SoC clks
- MediaTek MT7620, MT7628 and MT7688 MMC clks
- KUnit tests for clk-assigned-rates{,-u64}
- Add a driver for gated fixed rate clocks
* clk-cleanup:
clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access
clk: Fix invalid execution of clk_set_rate
clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider
clk: lan966x: make it selectable for ARCH_LAN969X
clk: clk-apple-nco: Add NULL check in applnco_probe
clk: starfive: jh7110-pll: Mark the probe function as __init
clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate()
clk: tegra: use clamp() in tegra_bpmp_clk_determine_rate()
clk: cdce925: make regmap_cdce925_bus constant
clk: Drop explicit initialization of struct i2c_device_id::driver_data to 0
clk: clk-qoriq: Replace of_node_put() with __free()
clk: Remove unused clk_hw_rate_is_protected
* clk-mediatek:
clk: en7523: map io region in a single block
clk: en7523: move en7581_reset_register() in en7581_clk_hw_init()
clk: en7523: fix estimation of fixed rate for EN7581
clk: en7523: introduce chip_scu regmap
clk: en7523: move clock_register in hw_init callback
clk: en7523: remove REG_PCIE*_{MEM,MEM_MASK} configuration
dt-bindings: clock: airoha: Update reg mapping for EN7581 SoC.
clk: mediatek: Add drivers for MT6735 syscon clock and reset controllers
dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers
clk: mediatek: mt6735-apmixedsys: Fix an error handling path in clk_mt6735_apmixed_probe()
clk: ralink: mtmips: add mmc related clocks for SoCs MT7620, MT7628 and MT7688
clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs
clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp
clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
dt-bindings: clock: Add MediaTek MT6735 clock and reset bindings
clk: mediatek: drop two dead config options
* clk-kunit:
clk: Allow kunit tests to run without OF_OVERLAY enabled
clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties
of: kunit: Extract some overlay boiler plate into macros
clk: test: Add test managed of_clk_add_hw_provider()
* clk-xilinx:
clk: clocking-wizard: move dynamic reconfig setup behind flag
dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled
clk: clocking-wizard: move clock registration to separate function
clk: clocking-wizard: use devres versions of clk_hw API
clk: clocking-wizard: use newer clk_hw API
clk: clocking-wizard: simplify probe/remove with devres helpers
* clk-fixed-gate:
clk: clk-gpio: add driver for gated-fixed-clocks
clk: clk-gpio: use dev_err_probe for gpio-get failure
clk: clk-gpio: update documentation for gpio-gate clock
dt-bindings: clocks: add binding for gated-fixed-clocks
Flexible-array member `hws` in `struct clk_hw_onecell_data` is annotated
with the `counted_by()` attribute. This means that when memory is
allocated for this array, the _counter_, which in this case is member
`num` in the flexible structure, should be set to the maximum number of
elements the flexible array can contain, or fewer.
In this case, the total number of elements for the flexible array is
determined by variable `clks_num` when allocating heap space via
`devm_kzalloc()`, as shown below:
289 struct loongson2_clk_provider *clp;
...
296 for (p = data; p->name; p++)
297 clks_num++;
298
299 clp = devm_kzalloc(dev, struct_size(clp, clk_data.hws, clks_num),
300 GFP_KERNEL);
So, `clp->clk_data.num` should be set to `clks_num` or less, and not
exceed `clks_num`, as is currently the case. Otherwise, if data is
written into `clp->clk_data.hws[clks_num]`, the instrumentation
provided by the compiler won't detect the overflow, leading to a
memory corruption bug at runtime.
Fix this issue by setting `clp->clk_data.num` to `clks_num`.
Fixes: 9796ec0bd0 ("clk: clk-loongson2: Refactor driver for adding new platforms")
Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/ZzaN5MpmMr0hwHw9@kspp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Some clocks have rates that can be changed elsewhere, so add a flag
CLK_GET_RATE_NOCACHE(such as scmi_clk) to these clocks to ensure that
the real-time rate is obtained.
When clk_set_rate is called, it is returned if the request to set rate
is consistent with the current rate. Getting the current rate in
clk_set_rate returns the rate stored in clk_core. CLK_GET_RATE_NOCACHE
does not take effect here.
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Link: https://lore.kernel.org/r/20240910-fix_clk-v1-1-111443baaeaa@amlogic.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Some heap space is allocated for the flexible structure `struct
clk_hw_onecell_data` and its flexible-array member `hws` through
the composite structure `struct loongson2_clk_provider` in function
`loongson2_clk_probe()`, as shown below:
289 struct loongson2_clk_provider *clp;
...
296 for (p = data; p->name; p++)
297 clks_num++;
298
299 clp = devm_kzalloc(dev, struct_size(clp, clk_data.hws, clks_num),
300 GFP_KERNEL);
Then some data is written into the flexible array:
350 clp->clk_data.hws[p->id] = hw;
This corrupts `clk_lock`, which is the spinlock variable immediately
following the `clk_data` member in `struct loongson2_clk_provider`:
struct loongson2_clk_provider {
void __iomem *base;
struct device *dev;
struct clk_hw_onecell_data clk_data;
spinlock_t clk_lock; /* protect access to DIV registers */
};
The problem is that the flexible structure is currently placed in the
middle of `struct loongson2_clk_provider` instead of at the end.
Fix this by moving `struct clk_hw_onecell_data clk_data;` to the end of
`struct loongson2_clk_provider`. Also, add a code comment to help
prevent this from happening again in case new members are added to the
structure in the future.
This change also fixes the following -Wflex-array-member-not-at-end
warning:
drivers/clk/clk-loongson2.c:32:36: warning: structure containing a flexible array member is not at the end of another structure [-Wflex-array-member-not-at-end]
Fixes: 9796ec0bd0 ("clk: clk-loongson2: Refactor driver for adding new platforms")
Cc: stable@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/ZzZ-cd_EFXs6qFaH@kspp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Map all clock-controller memory region in a single block.
This patch does not introduce any backward incompatibility since the dts
for EN7581 SoC is not upstream yet.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-7-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Move en7581_reset_register routine in en7581_clk_hw_init() since reset
feature is supported just by EN7581 SoC.
Get rid of reset struct in en_clk_soc_data data struct.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-6-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Introduce en7581_base_clks array in order to define per-SoC fixed-rate
clock parameters and fix wrong parameters for emi, npu and crypto EN7581
clocks
Fixes: 66bc47326c ("clk: en7523: Add EN7581 support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-5-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Introduce chip_scu regmap pointer since EN7581 SoC will access chip-scu
memory area via a syscon node. Remove first memory region mapping
for EN7581 SoC. This patch does not introduce any backward incompatibility
since the dts for EN7581 SoC is not upstream yet.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-4-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Move en7523_register_clocks routine in hw_init callback.
Introduce en7523_clk_hw_init callback for EN7523 SoC.
This is a preliminary patch to differentiate IO mapped region between
EN7523 and EN7581 SoCs in order to access chip-scu IO region
<0x1fa20000 0x384> on EN7581 SoC as syscon device since it contains
miscellaneous registers needed by multiple devices (clock, pinctrl ..).
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-3-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
REG_PCIE*_MEM and REG_PCIE*_MEM_MASK regs (PBUS_CSR memory region) are not
part of the scu block on the EN7581 SoC and they are used to select the
PCIE ports on the PBUS, so remove this configuration from the clock driver
and set these registers in the PCIE host driver instead.
This patch does not introduce any backward incompatibility since the dts
for EN7581 SoC is not upstream yet.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-2-8ada5e394ae4@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk-en7523 driver for EN7581 SoC is mapping all the scu memory region
while it is configuring the chip-scu one via a syscon. Update the reg
mapping definition for this device. This patch does not introduce any
backward incompatibility since the dts for EN7581 SoC is not upstream
yet.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20241112-clk-en7581-syscon-v2-1-8ada5e394ae4@kernel.org
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for syscon clock and reset controllers (IMGSYS,
MFGCFG, VDECSYS and VENCSYS).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241106111402.200940-2-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
If an error occurs after a successful mtk_alloc_clk_data(),
mtk_free_clk_data() should be called, as already done in the .remove()
function.
Switch to mtk_devm_alloc_clk_data() in order to fix the memory leak in the
probe function, and simplify the remove function.
Fixes: 43c04ed791 ("clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/89ad840e7a484eaf4727470824acfe0fdc60fcef.1729871146.git.christophe.jaillet@wanadoo.fr
Tested-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Original architecture clock code from where this driver was derived did not
include nothing related to mmc clocks. OpenWRT people started to use mtk-sd
upstream driver recently and they were forced to use a dts 'fixed-clock'
node with 48 MHz clock:
- https://github.com/openwrt/openwrt/pull/15896
The proper thing to do to avoid that is to add the mmc related clocks to the
driver to avoid a dts with fixed clocks nodes. The minimal documentation in
the mt7620 programming guide says that there is a BBP_PLL clock of 480 MHz
derived from the 40 MHz XTAL and from there a clock divider by ten produces
the desired SDHC clock of 48 MHz for the mmc. Hence add a fixed clock 'bbppll'
and factor clock 'sdhc' ten divider child to properly set the 'mmc' peripheral
clock with the desired 48 Mhz rate.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-4-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Base clocks are the first in being probed and are real dependencies of the
rest of fixed, factor and peripheral clocks. For old ralink SoCs RT2880,
RT305x and RT3883 'xtal' must be defined first since in any other case,
when fixed clocks are probed they are delayed until 'xtal' is probed so the
following warning appears:
WARNING: CPU: 0 PID: 0 at drivers/clk/ralink/clk-mtmips.c:499 rt3883_bus_recalc_rate+0x98/0x138
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 6.6.43 #0
Stack : 805e58d0 00000000 00000004 8004f950 00000000 00000004 00000000 00000000
80669c54 80830000 80700000 805ae570 80670068 00000001 80669bf8 00000000
00000000 00000000 805ae570 80669b38 00000020 804db7dc 00000000 00000000
203a6d6d 80669b78 80669e48 70617773 00000000 805ae570 00000000 00000009
00000000 00000001 00000004 00000001 00000000 00000000 83fe43b0 00000000
...
Call Trace:
[<800065d0>] show_stack+0x64/0xf4
[<804bca14>] dump_stack_lvl+0x38/0x60
[<800218ac>] __warn+0x94/0xe4
[<8002195c>] warn_slowpath_fmt+0x60/0x94
[<80259ff8>] rt3883_bus_recalc_rate+0x98/0x138
[<80254530>] __clk_register+0x568/0x688
[<80254838>] of_clk_hw_register+0x18/0x2c
[<8070b910>] rt2880_clk_of_clk_init_driver+0x18c/0x594
[<8070b628>] of_clk_init+0x1c0/0x23c
[<806fc448>] plat_time_init+0x58/0x18c
[<806fdaf0>] time_init+0x10/0x6c
[<806f9bc4>] start_kernel+0x458/0x67c
---[ end trace 0000000000000000 ]---
When this driver was mainlined we could not find any active users of old
ralink SoCs so we cannot perform any real tests for them. Now, one user
of a Belkin f9k1109 version 1 device which uses RT3883 SoC appeared and
reported some issues in openWRT:
- https://github.com/openwrt/openwrt/issues/16054
Thus, define a 'rt2880_xtal_recalc_rate()' just returning the expected
frequency 40Mhz and use it along the old ralink SoCs to have a correct
boot trace with no warnings and a working clock plan from the beggining.
Fixes: 6f3b15586e ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-3-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Clock plan for Ralink SoC RT3883 needs an extra 'periph' clock to properly
set some peripherals that has this clock as their parent. When this driver
was mainlined we could not find any active users of this SoC so we cannot
perform any real tests for it. Now, one user of a Belkin f9k1109 version 1
device which uses this SoC appear and reported some issues in openWRT:
- https://github.com/openwrt/openwrt/issues/16054
The peripherals that are wrong are 'uart', 'i2c', 'i2s' and 'uartlite' which
has a not defined 'periph' clock as parent. Hence, introduce it to have a
properly working clock plan for this SoC.
Fixes: 6f3b15586e ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-2-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add NULL check in applnco_probe, to handle kernel NULL pointer
dereference error.
Fixes: 6641057d5d ("clk: clk-apple-nco: Add driver for Apple NCO")
Signed-off-by: Charles Han <hanchunchao@inspur.com>
Link: https://lore.kernel.org/r/20241114072820.3071-1-hanchunchao@inspur.com
Reviewed-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Mark the jh7110_pll_probe function as __init.
There's no need to support hotplugging in the jh7110-pll driver. We use
builtin_platform_driver_probe, the probe function will only be called at
startup.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Link: https://lore.kernel.org/r/20241029032828.238706-1-changhuang.liang@starfivetech.com
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This was found by a static analyzer.
There may be a potential integer overflow issue in
sg2042_pll_recalc_rate(). numerator is defined as u64 while
parent_rate is defined as unsigned long and ctrl_table.fbdiv
is defined as unsigned int. On 32-bit machine, the result of
the calculation will be limited to "u32" without correct casting.
Integer overflow may occur on high-performance systems.
Fixes: 48cf7e0138 ("clk: sophgo: Add SG2042 clock driver")
Signed-off-by: Zichen Xie <zichenxie0106@gmail.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/20241023145146.13130-1-zichenxie0106@gmail.com
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
When it needs to get a value within a certain interval, using clamp()
makes the code easier to understand than min(max()).
Signed-off-by: Li Zetao <lizetao1@huawei.com>
Link: https://lore.kernel.org/r/20240830012344.603704-1-lizetao1@huawei.com
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Some configurations want to enable CONFIG_KUNIT without enabling
CONFIG_OF_OVERLAY. The kunit overlay code already skips if
CONFIG_OF_OVERLAY isn't enabled, so these selects here aren't really
doing anything besides making it easier to run the tests without them
skipping. Remove the select and move the config setting to the
drivers/clk/.kunitconfig file so that the clk tests can be run with or
without CONFIG_OF_OVERLAY set to test either behavior.
Fixes: 5776526beb ("clk: Add KUnit tests for clk fixed rate basic type")
Fixes: 274aff8711 ("clk: Add KUnit tests for clks registered with struct clk_parent_data")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20241016212738.897691-1-sboyd@kernel.org
Same as MT8195, MT8188 GPU clock is primarly supplied by the dedicated
mfgpll. The clock "mfg_core_tmp" is only used as an alt clock when
setting mfgpll clock rate.
If we keep the univpll parents from mfg_core_tmp, when setting
GPU frequency to 390000000, the common clock framework would switch
the parent to univpll, instead of setting mfgpll to 390000000:
mfgpll 0 0 0 949999756
univpll 2 2 0 2340000000
univpll_d6 1 1 0 390000000
top_mfg_core_tmp 1 1 0 390000000
mfg_ck_fast_ref 1 1 0 390000000
mfgcfg_bg3d 1 1 0 390000000
This results in failures when subsequent devfreq operations need to
switch to other frequencies. So remove univpll from the parent list.
This solution is taken from commit 72d38ed720 ("clk: mediatek:
clk-mt8195-topckgen: Drop univplls from mfg mux parents")
Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240927103005.17605-3-pablo.sun@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg
clock and reset controllers. These provide the base clocks and resets
on the platform, enough to bring up all essential blocks including
PWRAP, MSDC and peripherals (UART, I2C, SPI).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-3-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add clock definitions for the main clock and reset controllers of MT6735
(apmixedsys, topckgen, infracfg and pericfg).
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241017071708.38663-2-y.oudjana@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
In contrast to fixed clocks that are described as ungateable, boards
sometimes use additional oscillators for things like PCIe reference
clocks, that need actual supplies to get enabled and enable-gpios to be
toggled for them to work.
This adds a driver for those generic gated-fixed-clocks
that can show up in schematics looking like
----------------
Enable - | 100MHz,3.3V, | - VDD
| 3225 |
GND - | | - OUT
----------------
The new driver gets grouped together with the existing gpio-gate and
gpio-mux, as it for one re-uses a lot of the gpio-gate functions
and also in its core it's just another gpio-controlled clock, just
with a fixed rate and a regulator-supply added in.
The regulator-API provides function stubs for the !CONFIG_REGULATOR case,
so no special handling is necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240906082511.2963890-5-heiko@sntech.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This is a real driver and dev_err_probe will hide the distinction between
EPROBE_DEFER and other errors automatically, so there is no need to
open-code this.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240906082511.2963890-4-heiko@sntech.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The main documentation block seems to be from a time before the driver
handled sleeping and non-sleeping gpios and with that change it seems
updating the doc was overlooked. So do that now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240906082511.2963890-3-heiko@sntech.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
In contrast to fixed clocks that are described as ungateable, boards
sometimes use additional oscillators for things like PCIe reference
clocks, that need actual supplies to get enabled and enable-gpios to be
toggled for them to work.
This adds a binding for such oscillators that are not configurable
themself, but need to handle supplies for them to work.
In schematics they often can be seen as
----------------
Enable - | 100MHz,3.3V, | - VDD
| 3225 |
GND - | | - OUT
----------------
or similar. The enable pin might be separate but can also just be tied
to the vdd supply, hence it is optional in the binding.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240906082511.2963890-2-heiko@sntech.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Use the new boolean devicetree
property to indicate whether the hardware supports this feature or not.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-7-hpausten@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Add a devicetree boolean property to
describe whether the hardware supports this feature or not.
Since dynamic reconfiguration support was previously assumed enabled,
introduce a property to indicate the inverse, in order to maintain
devicetree backwards compatibility. Hence, this new xlnx,static-config
property should be specified when dynamic reconfiguration support is
disabled in the IP core configuration.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-6-hpausten@protonmail.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Provide clear separation of dynamic reconfiguration logic, by moving its
setup procedure to its own dedicated function.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-5-hpausten@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Use device managed versions of the clk_hw API, entirely removing the
need for the driver's remove() callback and greatly simplifying the
probe() function's error paths.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-4-hpausten@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Remove need to do various operations in remove callback and error paths
by utilising device managed versions of clock and notifier APIs.
Signed-off-by: Harry Austen <hpausten@protonmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240913191037.2690-2-hpausten@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add unit tests for the two types of assigned rate properties. Test
different combinations of assigned clocks and make sure that rates
aren't assigned when the DT properties are malformed or are zero.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240822002433.1163814-4-sboyd@kernel.org
Make the lives of __of_overlay_apply_kunit() callers easier by
extracting some of the boiler plate involved in referencing the DT
overlays.
Cc: Brendan Higgins <brendan.higgins@linux.dev>
Cc: David Gow <davidgow@google.com>
Cc: Rae Moar <rmoar@google.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240822002433.1163814-3-sboyd@kernel.org
Add a test managed version of of_clk_add_hw_provider() that
automatically unregisters the clk_hw provider upon test conclusion.
Cc: Brendan Higgins <brendan.higgins@linux.dev>
Cc: David Gow <davidgow@google.com>
Cc: Rae Moar <rmoar@google.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240822002433.1163814-2-sboyd@kernel.org
Commit 0f471d31e5 ("clk: mediatek: Split MT8195 clock drivers and allow
module build") adds a number of new COMMON_CLK_MT8195_* config options.
Among those, the config options COMMON_CLK_MT8195_AUDSYS and
COMMON_CLK_MT8195_MSDC have no reference in the source tree and are not
used in the Makefile to include a specific file.
Drop the dead config options COMMON_CLK_MT8195_AUDSYS and
COMMON_CLK_MT8195_MSDC.
Fixes: 0f471d31e5 ("clk: mediatek: Split MT8195 clock drivers and allow module build")
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com>
Link: https://lore.kernel.org/r/20240927092232.386511-1-lukas.bulwahn@redhat.com
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This struct is only used for the regmap initialization via
devm_regmap_init() (which expects a pointer to a const struct
regmap_bus, as it will not modify the struct), and it is not modified
after its declaration.
Move regmap_cdce925_bus to a read-only section.
Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com>
Link: https://lore.kernel.org/r/20241001-clk-cdce925-regmap_bus-const-v1-1-49fc11555b04@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
These drivers don't use the driver_data member of struct i2c_device_id,
so don't explicitly initialize this member.
This prepares putting driver_data in an anonymous union which requires
either no initialization or named designators. But it's also a nice
cleanup on its own.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/20240918123150.1540161-9-u.kleine-koenig@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Use __free() to have automatic cleanup instead of calling of_node_put()
manually.
Compiled without errors or warnings.
Signed-off-by: David Hunter <david.hunter.linux@gmail.com>
Link: https://lore.kernel.org/r/20240918123925.41511-1-david.hunter.linux@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
clk_hw_rate_is_protected() was added in 2017's commit
e55a839a7a ("clk: add clock protection mechanism to clk core")
but has been unused.
Remove it.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Link: https://lore.kernel.org/r/20241009003552.254675-1-linux@treblig.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The cpu_emergency_register_virt_callback() function is used
unconditionally by the x86 kvm code, but it is declared (and defined)
conditionally:
#if IS_ENABLED(CONFIG_KVM_INTEL) || IS_ENABLED(CONFIG_KVM_AMD)
void cpu_emergency_register_virt_callback(cpu_emergency_virt_cb *callback);
...
leading to a build error when neither KVM_INTEL nor KVM_AMD support is
enabled:
arch/x86/kvm/x86.c: In function ‘kvm_arch_enable_virtualization’:
arch/x86/kvm/x86.c:12517:9: error: implicit declaration of function ‘cpu_emergency_register_virt_callback’ [-Wimplicit-function-declaration]
12517 | cpu_emergency_register_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/x86/kvm/x86.c: In function ‘kvm_arch_disable_virtualization’:
arch/x86/kvm/x86.c:12522:9: error: implicit declaration of function ‘cpu_emergency_unregister_virt_callback’ [-Wimplicit-function-declaration]
12522 | cpu_emergency_unregister_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fix the build by defining empty helper functions the same way the old
cpu_emergency_disable_virtualization() function was dealt with for the
same situation.
Maybe we could instead have made the call sites conditional, since the
callers (kvm_arch_{en,dis}able_virtualization()) have an empty weak
fallback. I'll leave that to the kvm people to argue about, this at
least gets the build going for that particular config.
Fixes: 590b09b1d8 ("KVM: x86: Register "emergency disable" callbacks when virt is enabled")
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Kai Huang <kai.huang@intel.com>
Cc: Chao Gao <chao.gao@intel.com>
Cc: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
imx: use devie name instead of genereic imx_mu_chan as interrupt name
qcom: enable sa8255p and qcs8300 ipc controllers
bcm2835: Fix timeout during suspend mode
mailbox: convert to use use of_property_match_string
mediatek: enable mt8188
spreadtrum: use devm_clk_get_enabled helpers
rockchip: fix device-id typo
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmb5dsUACgkQf9lkf8eY
P5WwLQ//d1DboQvqf4AqqPCbTp+UvcVCFVTriCJvA1voBVAj9He1z9QVleF6MblS
XZHBXau2cBW7OWRE9SYZ+qlrN/yCxFPjprbxx9w9nvsLvXCycxWZqpRPYA1LXXHp
bULXIHJpuqZdJbXCK+qORFX+kyavWKnRRg5cM5hIEWf81BkjzGG5se95GeGzuC3D
NzVKshtXl4WGVjWl1J+S/7k+/8VlDM/lRjRz4H8UG8bAya5sNv/9CHRfXw3qXXuv
DsiojkLKhsefzBI3lvsirZvX5LsRaHE1lbseFU+KqLnJt+YKZBCjYrKHCQRZ/iJx
7THCZN+Qkmu+Q4x+2tEf2VmZzyX7nwJiZmTyStdZK4f8V0gAELq4h5Lbz3jWe9Vc
K9kHRRjufiAW9yFYuB4FzOPt6uSbB7QyyVOjgW0LaL1PsCWhyJUuATQ3WutKKfHB
ttTTK/hsHc4tCoJDejJeCRuGp9exYnMUZ8zGOyCrAc0Wn0ClRgLB+SBfvdo0wgz/
qdI8Rf+RXb1iQdv5f6UfS+xnH/uhqh6vyr5GhuGfZGWUOejLQMNwDKxLvei2ROFL
oXxwKHZiBAHJgSHyEG0HmY0ct/Qsyrh8ufCFlUbzRa7OqNg+HqtJ1cSVuyeJ412g
XHyqouwUlIUYuxWqm8Bhc0OHw63i6C4lODTcOXNLkFqXHqICHYM=
=nCRH
-----END PGP SIGNATURE-----
Merge tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
Pull mailbox updates from Jassi Brar:
- fix kconfig dependencies (mhu-v3, omap2+)
- use devie name instead of genereic imx_mu_chan as interrupt name
(imx)
- enable sa8255p and qcs8300 ipc controllers (qcom)
- Fix timeout during suspend mode (bcm2835)
- convert to use use of_property_match_string (mailbox)
- enable mt8188 (mediatek)
- use devm_clk_get_enabled helpers (spreadtrum)
- fix device-id typo (rockchip)
* tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox:
mailbox, remoteproc: omap2+: fix compile testing
dt-bindings: mailbox: qcom-ipcc: Document QCS8300 IPCC
dt-bindings: mailbox: qcom-ipcc: document the support for SA8255p
dt-bindings: mailbox: mtk,adsp-mbox: Add compatible for MT8188
mailbox: Use of_property_match_string() instead of open-coding
mailbox: bcm2835: Fix timeout during suspend mode
mailbox: sprd: Use devm_clk_get_enabled() helpers
mailbox: rockchip: fix a typo in module autoloading
mailbox: imx: use device name in interrupt name
mailbox: ARM_MHU_V3 should depend on ARM64
I2C host fixes for v6.12-rc1 (from Andi)
The DesignWare driver now has the correct ENABLE-ABORT sequence,
ensuring ABORT can always be sent when needed.
In the SynQuacer controller we now check for PCLK as an optional
clock, allowing ACPI to directly provide the clock rate.
The recent KEBA driver required a dependency fix in Kconfig.
The XIIC driver now has a corrected power suspend sequence.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmb5Ex0ACgkQFA3kzBSg
KbbNIxAAm1GYB7hSOoIZtv7amoMOJYPqEEh037/9RITF9U8zFL9JBWTePR+ksv6W
0FA4aEUYq8RyaJeQEVDHOdONiDJeYwVM8uxF02rwYx4tJYlLeh4J0H+AXnGPxQpO
17woQt1fx5hdtdyx+aJ6Zr4eJCo9XUaCwjvEQH4oZE2PFesP3b/9HSBq82gFBSHA
lEnY1F/SfMNeF90y74f93fiZJLQNdfYKtzMS8iZ5eGVjokXcPP7TfrxIOughRlVT
h+cNQaGd7g4YrYvMrTTDiNu8Bnc5nJcjyOcaQsXOpCnxljH4gb1V39RPQ6ATvTBQ
uEPQCBU2ibZt2AbRcyWNRkw9sAuHdyOm0wv09ZsChpXafcM9BjzfF/xn6DlQuf64
d1COXxpBN5yI/4AU/Juojoy5/C8fMj81VtveXXlaISsyZzUo49XwM263PSXgkO8y
39A50Px1uVdeAjnVOu9Tsg/fJuAJRolIOVpw+/jWRZ1OXidp4MtmzL8bf2gXH7ts
4F7G8BOtoLXRM56AeO15EQ7YLJaw/03jb57EB+lREqy0qLDFJ0d13o+VcRmCvVK2
uK4RSN/y7poOOSaXnf5Wm61XYV8yu4XTyR8hN6EP/hsBcM0o1DLi4nLoI7S9QMjc
+ic0In9qQDo90oTeF3tE+ijCQUTAOzR4wids1DjQuUBleUu71C0=
=CZPe
-----END PGP SIGNATURE-----
Merge tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
- fix DesignWare driver ENABLE-ABORT sequence, ensuring ABORT can
always be sent when needed
- check for PCLK in the SynQuacer controller as an optional clock,
allowing ACPI to directly provide the clock rate
- KEBA driver Kconfig dependency fix
- fix XIIC driver power suspend sequence
* tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: xiic: Fix pm_runtime_set_suspended() with runtime pm enabled
i2c: keba: I2C_KEBA should depend on KEBA_CP500
i2c: synquacer: Deal with optional PCLK correctly
i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled
- handle chained SGLs in the new tracing code (Christoph Hellwig)
-----BEGIN PGP SIGNATURE-----
iQI/BAABCgApFiEEgdbnc3r/njty3Iq9D55TZVIEUYMFAmb47voLHGhjaEBsc3Qu
ZGUACgkQD55TZVIEUYMqAw//TCBIiBNBwjWipVBXmvizu0MaB+PU8ZOjXZoeEdlN
WeGSPvuW2lWJxjBblPcFA3MFO9pztO9E94dayu5/jV5QP4G+EzyCJDoZOQu8iHYX
YzaIgkt0W+vKEFmvAqfrHuPHHO0mZ00qaBmj/r+cayWqBBvWPLbj7kU7+sFVG4it
lP2QGGYGV6Ryvkwcft+Got4oIKmyuTsS4i4Cq17WNuhAxDMZftnVPIuUJ9Q00xza
zDSwKgAOoPqaf3r026MqahpEECAQP0S7uqH10I+MJe7AbREbO7GSHcx4YWDhmyLd
KFJ+Wv67H8voCsvdH76zANVLE6S5YMyAwMAJSRQxuVSjqrIM0vyyQ4jeRZCHibva
NvYnv/xRRF+BKyNthNAz1m69K3y8UV5gvP/otezHInGd5/b527UoLXdFl+wQvdJm
aJwCYSFgQbAsoAh4kWCUmYXGwc1h6aQQ3pcHD118yf9Glzjl4vwHOyF12GigfCdQ
cbNo+ceacO3rg/H85zMl8OCMtnPwAlNAU+16MY0JwefKKs6rmRyQeTreQKjjdhTm
/0FVKq1PXJeOdMBqSnrN/tJBIEJxtQlUqE7mx7B2OnczvNpaO4THGlo181nnzPPd
HTb9fXzBJeSSbDGWF8W6MZIleDj+s4V5Z6Qqi0cW9F7Yn4dCw9ghBBkDZtcm+hkb
+q0=
=zjTS
-----END PGP SIGNATURE-----
Merge tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fix from Christoph Hellwig:
- handle chained SGLs in the new tracing code (Christoph Hellwig)
* tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping:
dma-mapping: fix DMA API tracing for chained scatterlists
These are mostly minor updates. There are two drivers (lpfc and
mpi3mr) which missed the initial pull and a core change to retry a
start/stop unit which affect suspend/resume.
Signed-off-by: James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
-----BEGIN PGP SIGNATURE-----
iJwEABMIAEQWIQTnYEDbdso9F2cI+arnQslM7pishQUCZvh4QiYcamFtZXMuYm90
dG9tbGV5QGhhbnNlbnBhcnRuZXJzaGlwLmNvbQAKCRDnQslM7pishQajAQDx561I
cgbPZjZkSOYp+qJowaphyySZ1SS8pfMlVAIiXQEAs4SqhIN8e9QWpgI0bA7X7xtB
UiOUsIHPHM+BFU6kbJQ=
=qjsp
-----END PGP SIGNATURE-----
Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Pull more SCSI updates from James Bottomley:
"These are mostly minor updates.
There are two drivers (lpfc and mpi3mr) which missed the initial
pull and a core change to retry a start/stop unit which affect
suspend/resume"
* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (32 commits)
scsi: lpfc: Update lpfc version to 14.4.0.5
scsi: lpfc: Support loopback tests with VMID enabled
scsi: lpfc: Revise TRACE_EVENT log flag severities from KERN_ERR to KERN_WARNING
scsi: lpfc: Ensure DA_ID handling completion before deleting an NPIV instance
scsi: lpfc: Fix kref imbalance on fabric ndlps from dev_loss_tmo handler
scsi: lpfc: Restrict support for 32 byte CDBs to specific HBAs
scsi: lpfc: Update phba link state conditional before sending CMF_SYNC_WQE
scsi: lpfc: Add ELS_RSP cmd to the list of WQEs to flush in lpfc_els_flush_cmd()
scsi: mpi3mr: Update driver version to 8.12.0.0.50
scsi: mpi3mr: Improve wait logic while controller transitions to READY state
scsi: mpi3mr: Update MPI Headers to revision 34
scsi: mpi3mr: Use firmware-provided timestamp update interval
scsi: mpi3mr: Enhance the Enable Controller retry logic
scsi: sd: Fix off-by-one error in sd_read_block_characteristics()
scsi: pm8001: Do not overwrite PCI queue mapping
scsi: scsi_debug: Remove a useless memset()
scsi: pmcraid: Convert comma to semicolon
scsi: sd: Retry START STOP UNIT commands
scsi: mpi3mr: A performance fix
scsi: ufs: qcom: Update MODE_MAX cfg_bw value
...
