Commit 723e8462a4 ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength
mapping") fixed a long-standing issue in the Qualcomm SPMI PMIC gpio
driver which had the 'low' and 'high' drive strength settings switched
but failed to update the debugfs interface which still gets this wrong.
Fix the debugfs code so that the exported values match the hardware
settings.
Note that this probably means that most devicetrees that try to describe
the firmware settings got this wrong if the settings were derived from
debugfs. Before the above mentioned commit the settings would have
actually matched the firmware settings even if they were described
incorrectly, but now they are inverted.
Fixes: 723e8462a4 ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping")
Fixes: eadff30244 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver")
Cc: Anjelique Melendez <quic_amelende@quicinc.com>
Cc: stable@vger.kernel.org # 3.19
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/20241025121622.1496-1-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In some cases the code uses goto labels to just return an error code.
Replace those with direct return:s and drop unneeded goto labels.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-7-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When we iterate through nports the iterator variable is effectively
being not used outside of the loop. Make it clear by moving its definition
into the for-loop. This makes code cleaner as well.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-6-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use a temporary variable for the struct device pointers to avoid
dereferencing. This makes code a bit neater.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-5-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The device reset assert and deassert length was created by usleep_range()
but that does not ensure optimal handling of all the different values from
device tree properties. By switching to the new flexible sleeping helper
function, fsleep(), the correct delay function is called depending on
delay length, e.g. udelay(), usleep_range() or msleep().
While at it, move out GPIO consumer name setting of the reset conditional,
the all necessary checks are already done there, so logically that call is
not related to the reset sequence.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-4-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The driver does not actively manage regulator state past probe() time,
so we can use devm_regulator_get_enable() to simplify the code.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-3-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use 2-argument strscpy(), which is not only shorter but also provides
an additional check that destination buffer is an array.
Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/20241110210040.18918-2-andy.shevchenko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Adding gpio-line-names property works fine for this
device node, but dtb check drops warning:
'gpio-line-names' does not match any of the regexes: '-cfg$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#
Allow to add property gpio-line-names for this devices.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241105064206.43626-3-hs@denx.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a
separate pinctrl driver later.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-3-e050609b8d6c@skole.hr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the "marvell,pxa1908-padconf" compatible to allow migrating to a
separate pinctrl driver later.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr>
Link: https://lore.kernel.org/20241104-pxa1908-lkml-v13-2-e050609b8d6c@skole.hr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
It should be PINMUX/PINMUX2, not GPIOMUX/GPIOMUX2, see
<dt-bindings/pinctrl/pinctrl-cv1800b.h>.
Fixes: 64aa494de6 ("dt-bindings: pinctrl: Add pinctrl for Sophgo CV1800 series SoC.")
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241029012312.3448287-1-unicornxw@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Document the 8 GPIOs found on PM8937. It has holes on
3,4 and 6 pins.
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-1-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The use of of_property_read_bool() for non-boolean properties is
deprecated in favor of of_property_present() when testing for property
presence.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241104194437.327430-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
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Merge tag 'intel-pinctrl-v6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.13-2
This includes following Intel pinctrl changes for v6.13 merge window:
- Expose DSW community on Elkhart Lake.
- Elaborate in the code comment the pull bias settings.
Both have been in linux-next with no reported issues.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Use the gpiochip_populate_parent_fwspec_twocell() helper.
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Merge tag 'renesas-pinctrl-for-v6.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.13 (take two)
- Use the gpiochip_populate_parent_fwspec_twocell() helper.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hardware has a DSW (Deep Sleep Well) community that might be exposed
by some BIOSes. Add support for it in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Add a human readable decoder for pull bias values in the comment.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Add support for Airoha EN7581 GPIO System Controller which provide a
register map for controlling the GPIO, pinctrl and PWM of the SoC via
dedicated pinctrl and pwm child nodes.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-4-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds the chip-scu document bindings for EN7581 SoC.
The airoha chip-scu block provides a configuration interface for clock,
io-muxing and other functionalities used by multiple controllers (e.g.
clock, pinctrl, ecc.) on EN7581 SoC.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-1-afb0cbcab0ec@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1. Add new pin controller drivers for new Samsung SoCs: Exynos8895,
Exynos9810, Exynos990.
2. Correct the condition when applying further interrupt constraints on
certain Samsung pin controllers. The condition was simply not
effective.
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Merge tag 'samsung-pinctrl-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.13
1. Add new pin controller drivers for new Samsung SoCs: Exynos8895,
Exynos9810, Exynos990.
2. Correct the condition when applying further interrupt constraints on
certain Samsung pin controllers. The condition was simply not
effective.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add drive strength configuration support for GPIO F and G groups.
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/20241023104406.4083460-1-billy_tsai@aspeedtech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The map pointer is freed by pinctrl_utils_free_map(). It must not be a
devm_ pointer or it leads to a double free when the device is unloaded.
This is similar to a couple bugs Harshit Mogalapalli fixed earlier in
commits 3fd976afe9 ("pinctrl: nuvoton: fix a double free in
ma35_pinctrl_dt_node_to_map_func()") and 4575962aee ("pinctrl: sophgo:
fix double free in cv1800_pctrl_dt_node_to_map()").
Fixes: a83c29e1d1 ("pinctrl: spacemit: add support for SpacemiT K1 SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/4b5f1306-dc01-4edc-96d3-b232b930ddf2@stanley.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
YAML binding file provides the conversion of the original text-based
binding for the pinctrl-mcp23s08 to microchip,mcp23s08.yaml.
following compatible strings using the deprecated mcp prefix have been
removed from this binding:
- mcp,mcp23s08
- mcp,mcp23s17
- mcp,mcp23008
- mcp,mcp23017
Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20241028063939.6276-1-himanshu.bhavani@siliconsignals.io
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add Samsung Exynos9810 SoC specific data to enable pinctrl
support for platforms based on Exynos9810.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add the compatible for Samsung Exynos9810 pinctrl eint block
to the schema. It is compatible with Exynos850 EINT controller,
and doesn't have a dedicated IRQ line.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-4-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add a compatible for Samsung Exynos9810 pinctrl block to the schema.
Exynos9810 has 9 total pin banks and it's similar to other Samsung
SoC pinctrl blocks.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241026-exynos9810-v3-3-b89de9441ea8@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
When two client of the same gpio call pinctrl_select_state() for the
same functionality, we are seeing NULL pointer issue while accessing
desc->mux_owner.
Let's say two processes A, B executing in pin_request() for the same pin
and process A updates the desc->mux_usecount but not yet updated the
desc->mux_owner while process B see the desc->mux_usecount which got
updated by A path and further executes strcmp and while accessing
desc->mux_owner it crashes with NULL pointer.
Serialize the access to mux related setting with a mutex lock.
cpu0 (process A) cpu1(process B)
pinctrl_select_state() { pinctrl_select_state() {
pin_request() { pin_request() {
...
....
} else {
desc->mux_usecount++;
desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
if (desc->mux_usecount > 1)
return 0;
desc->mux_owner = owner;
} }
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/20241014192930.1539673-1-quic_mojha@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The IOMUXC controller description is almost identical on i.MX35/5x/6 SoCs,
except for the configuration bits which differ across SoCs. Rename the
fsl,imx6ul-pinctrl.yaml to fsl,imx35-pinctrl.yaml, fill in compatible
strings for the other SoCs and fill in the various bits into desciption.
This way, i.MX35/5x/6 series SoCs can all be converted to DT schema.
Remove the old text DT bindings description.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/20241017211241.170861-1-marex@denx.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since commit 0166dc11be ("of: make CONFIG_OF user selectable"), OF
can be enabled on all architectures. Therefore depending on
COMPILE_TEST as an alternative is no longer needed.
As ARM_SCMI_PROTOCOL already depends on COMPILE_TEST, we also don't
need to add COMPILE_TEST as an alternative dependency for it.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/20241022134017.172411db@endymion.delvare
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add driver for the pincontrol device as present on the Qualcomm
SAR2130P platform. This is based on the msm-5.10 tree, tag
KERNEL.PLATFORM.1.0.r4-00400-NEO.0.
Co-developed-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20241018-sar2130p-tlmm-v2-2-11a1d09a6e5f@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add DT bindings for the TLMM controller on QCS8300 platforms.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/20241018-qcs8300_tlmm-v3-1-8b8d3957cf1a@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Marks GPIOs as used on RZ/A1 and RZ/A2,
- Add open-drain and schmitt-trigger support on RZ/V2H(P),
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-pinctrl-for-v6.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.13
- Marks GPIOs as used on RZ/A1 and RZ/A2,
- Add open-drain and schmitt-trigger support on RZ/V2H(P),
- Miscellaneous fixes and improvements.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
SpacemiT's K1 SoC has a pinctrl controller which use single register
to describe all functions, which include bias pull up/down(strong pull),
drive strength, schmitter trigger, slew rate, mux mode.
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-2-03d395222e4f@gentoo.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add SoC pinctrl configuration for the Exynos 990. The bank types
used are the same as Exynos 850, so we can reuse its macros.
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-4-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add a dedicated compatible for the exynos990-wakeup-eint node.
This SoC pin controller does not mux interrupts. It's compatible with
Exynos 850's node, while also being compatible with the Exynos7
fallback.
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241016154838.64515-3-igor.belwon@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The initialization of muxtype deferences pointer func before func
is sanity checked with a null pointer check, hence we have a null
pointer deference issue. Fix this by only deferencing func with
the assignment to muxtype after func has been null pointer checked.
Fixes: 1fc30cd927 ("pinctrl: th1520: Factor out casts")
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reported-by: Kees Bakker <kees@ijzerbout.nl>
Acked-by: Drew Fustini <dfustini@tenstorrent.com>
Link: https://lore.kernel.org/20241016155655.334518-1-colin.i.king@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
