This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
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Merge tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: core SoC support development
This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:
* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
supports "LP2" mode (CPU power-down), but provides the basis to
implement "LP0"/"LP1" (various levels of core/chip power-down) in the
hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
branch.
This branch is based on the previous cleanup pull request.
* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: pm: remove duplicated include from pm.c
ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
ARM: tegra: pm: add platform suspend support
ARM: dt: tegra: add bindings of power management configurations for PMC
ARM: tegra: irq: add wake up handling
gpio: tegra: add gpio wakeup source handling
ARM: tegra: moving the CPU power timer function to PMC driver
ARM: tegra: add clock source of PMC to device trees
ARM: tegra: add speedo-based process id for Tegra114
ARM: tegra: expose chip ID and revision
ARM: tegra: bring up secondary CPU for Tegra114
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The pull request adds support for MMC/SD and regulator on DA850 EVM.
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Merge tag 'davinci-for-v3.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori <nsekhar@ti.com>:
v3.10 DT updates for DaVinci
The pull request adds support for MMC/SD and regulator on DA850 EVM.
* tag 'davinci-for-v3.10/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: override mmc DT node device name
ARM: davinci: da850: add mmc DT entries
mmc: davinci_mmc: add DT support
ARM: davinci: da850: add tps6507x regulator DT data
ARM: regulator: add tps6507x device tree data
Merged into soc branch rather than DT branch to avoid circular dependencies.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
a) adds support for eHRPWM clocks
b) Fix the way MMC/SD IP versions are communicated to driver
in preparation for DT support
c) Minor cleanup in debug-macro.S
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Merge tag 'davinci-for-v3.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori <nsekhar@ti.com>:
v3.10 SoC updates for DaVinci
a) adds support for eHRPWM clocks
b) Fix the way MMC/SD IP versions are communicated to driver
in preparation for DT support
c) Minor cleanup in debug-macro.S
* tag 'davinci-for-v3.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: remove test for undefined Kconfig macro
ARM: davinci: mmc: derive version information from device name
ARM: davinci: da850: add ECAP & EHRPWM clock nodes
ARM: davinci: clk framework support for enable/disable functionality
Includes an update to Linux 3.9-rc5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch (patch) updates bcm2835_defconfig to enable new features that
were added this kernel cycle. Namely, the SPI controller and HW random
number generator.
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Merge tag 'bcm2835-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: defconfig updates
This branch (patch) updates bcm2835_defconfig to enable new features that
were added this kernel cycle. Namely, the SPI controller and HW random
number generator.
* tag 'bcm2835-for-3.10-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: defconfig updates
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
For OMAP2+ SoCs, convert the SHA/MD5 and AES accelerator integration
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
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Merge tag 'omap-for-v3.10/crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>:
Omap crypto related bus level changes via Paul Walmsley <paul@pwsan.com>:
For OMAP2+ SoCs, convert the SHA/MD5 and AES accelerator integration
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
* tag 'omap-for-v3.10/crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: AM33XX: hwmod: Update and uncomment AES0 module data
ARM: AM33XX: Add aes0 crypto clock data
ARM: OMAP2+: Only manually add hwmod data when DT not used.
ARM: OMAP2+: Remove unnecessary message when no AES IP is present
ARM: OMAP3xxx: hwmod: Convert AES crypto device data to hwmod
ARM: OMAP2xxx: hwmod: Convert AES crypto devcie data to hwmod
ARM: AM33XX: hwmod: Update and uncomment SHA0 module data
ARM: AM33XX: Add sha0 crypto clock data
ARM: OMAP2+: Only manually add hwmod data when DT not used.
ARM: OMAP2+: Remove unnecessary message when no SHA IP is present
ARM: OMAP3xxx: hwmod: Convert SHAM crypto device data to hwmod
ARM: OMAP2xxx: hwmod: Add DMA support for SHAM module
ARM: OMAP2xxx: hwmod: Convert SHAM crypto device data to hwmod
ARM: OMAP2+: clock data: Remove CK_* flags
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds device tree support for davinci_mmc. Also add binding documentation.
As of now tested for non-dma PIO mode and without GPIO card_detect/
write_protect option because of dependencies on EDMA and GPIO module DT
support.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Cc: linux-mmc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: devicetree-discuss@lists.ozlabs.org
Cc: cjb@laptop.org
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: mporter@ti.com
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Adding suspend to RAM support for Tegra platform. There are three suspend
mode for Tegra. The difference were below.
* LP2: CPU voltage off
* LP1: CPU voltage off, DRAM in self-refresh
* LP0: CPU + Core voltage off, DRAM in self-refresh
After this patch, the LP2 suspend mode will be supported.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the wake up handling for legacy irq controller, and using
IRQCHIP_MASK_ON_SUSPEND for wake irq handling.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch add the gpio wakeup source handling for the Tegra platform. It
was be done by enabling the irq for the gpio in the gpio controller and
enabling the bank irq of the gpio in the Tegra legacy irq controller when
the system going to suspend.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.
The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable the following new features:
* SPI controller driver.
* RNG driver.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Add tps6507x regulator device tree data to da850-evm by
adding regulator consumers with tightened constraints
and regulator-name.TPS6507x regulator handle can be obtained
by using this regulator name.
Regulator constraints are added as per da850 board file.
Regulator names are given as per maximum output voltage the
regulator is capable to provide.
for e.g. regulator name for dcdc1 is "VDCDC1_3.3V".
Also, add tps6507x PMIC I2C slave device under I2C0 node.
Tested on da850-evm.
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add device tree data for tps6507x regulator by adding
all tps6507x regulator nodes. Regulators are initialized
based on compatible name provided in tps6507x DT file.
All tps6507x PMIC regulator device tree nodes are placed
in a separate device tree include file (tps6507x.dtsi).
tps6507x.dtsi file is created using datasheet
http://www.ti.com/lit/ds/symlink/tps65070.pdf
Tested on da850-evm.
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The DaVinci debugging macro contains a check for
CONFIG_DEBUG_DAVINCI_DA8XX_UART0. But there's no corresponding Kconfig
symbol, so this test will always evaluate to false. That Kconfig symbol
is not needed because, as __arch_decomp_setup() shows, there are no
DaVinci DA8XX boards that use UART0 for debugging. We can remove two
lines of unneeded code.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Remove specifying mmc controller IP version information via platform
data, instead specify device name so that driver derives it from
platform_device_id table. Also change the clock node name to match
the changed dev_id.
Tested on da850-evm to make sure driver loads without clk_get failures.
Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com>
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This adds support for the Broadcom timer, used in the following SoCs:
BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
Updates from V6:
- Split DT portion into a separate patch
Updates from V5:
- Rebase to latest arm-soc/for-next
Updates from V4:
- Switch code to use CLOCKSOURCE_OF_DECLARE
Updates from V3:
- Migrate to 3.9 timer framework updates
Updates from V2:
- prepend static fns + fields with kona_
Updates from V1:
- Rename bcm_timer.c to bcm_kona_timer.c
- Pull .h into bcm_kona_timer.c
- Make timers static
- Clean up comment block
- Switched to using clockevents_config_and_register
- Added an error to the get_timer loop if it repeats too much
- Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
- Added missing readl to timer_disable_and_clear
Note: bcm,kona-timer was kept as the 'compatible' field to make it
specific enough for when there are multiple bcm timers (bcm,timer is
too generic).
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Introduction of new Atmel Cortex-A5: SAMA5D3 family.
- Modify AT91 Kconfig to plit ARMv4/5 and ARMv7 arch
- Modify PMC driver (clocks)
- Core SAMA5 support
- Board file, DT files and defconfig
* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
ARM: at91: add defconfig for SAMA5
ARM: at91: dt: add device tree files for SAMA5D3 family
ARM: at91: introduce SAMA5 support
ARM: at91: introduce the core type choice to split ARMv4/5 and ARMv7 arch
ARM: at91: add AT91_SAM9_TIME entry to select at91sam926x_time.c compilation
ARM: at91: change name template in AT91_SOC_START macro
ARM: at91: renamme rm9200 dt file
ARM: at91: rename board-dt to more specific name board-dt-sam9
ARM: at91: move non DT Kconfig to Kconfig.non_dt
Signed-off-by: Olof Johansson <olof@lixom.net>
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
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Merge tag 'omap-devel-a-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/crypto
For OMAP2+ SoCs, convert the SHA/MD5 and AES accelerator integration
code and data to use hwmod and omap_device. This is a prerequisite for
moving the hwmod code out of arch/arm.
Basic test logs are available at:
http://www.pwsan.com/omap/testlogs/sham_aes_integration_devel_3.10/20130330155313/
Add ECAP and EHRPWM module clock nodes. Also add a clock
node for TBCLK for EHRWPM.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
DaVinci clock implementation does not support clock enable/disable
functionality on non-PSC clock nodes.
On DA850 SoC, EHRPWM module requires support for enable/disable
of TBCLK controlled using a system module register.
This patch adds a method for enabling/disabling non-PSC clocks
into DaVinci clock implementation.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add defconfig for ape6evm. This is based loosely
on the kzm9g defconfig with fewer devices enabled.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull slave-dmaengine fixes from Vinod Koul:
"Two fixes for slave-dmaengine.
The first one is for making slave_id value correct for dw_dmac and
the other one fixes the endieness in DT parsing"
* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
dw_dmac: adjust slave_id accordingly to request line base
dmaengine: dw_dma: fix endianess for DT xlate function
Pull media fixes from Mauro Carvalho Chehab:
"For a some fixes for Kernel 3.9:
- subsystem build fix when VIDEO_DEV=y, VIDEO_V4L2=m and I2C=m
- compilation fix for arm multiarch preventing IR_RX51 to be selected
- regression fix at bttv crop logic
- s5p-mfc/m5mols/exynos: a few fixes for cameras on exynos hardware"
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] [REGRESSION] bt8xx: Fix too large height in cropcap
[media] fix compilation with both V4L2 and I2C as 'm'
[media] m5mols: Fix bug in stream on handler
[media] s5p-fimc: Do not attempt to disable not enabled media pipeline
[media] s5p-mfc: Fix encoder control 15 issue
[media] s5p-mfc: Fix frame skip bug
[media] s5p-fimc: send valid m2m ctx to fimc_m2m_job_finish
[media] exynos-gsc: send valid m2m ctx to gsc_m2m_job_finish
[media] fimc-lite: Fix the variable type to avoid possible crash
[media] fimc-lite: Initialize 'step' field in fimc_lite_ctrl structure
[media] ir: IR_RX51 only works on OMAP2
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Merge tag 'for-linus-20130331' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
"Alright, this time from 10K up in the air.
Collection of fixes that have been queued up since the merge window
opened, hence postponed until later in the cycle. The pull request
contains:
- A bunch of fixes for the xen blk front/back driver.
- A round of fixes for the new IBM RamSan driver, fixing various
nasty issues.
- Fixes for multiple drives from Wei Yongjun, bad handling of return
values and wrong pointer math.
- A fix for loop properly killing partitions when being detached."
* tag 'for-linus-20130331' of git://git.kernel.dk/linux-block: (25 commits)
mg_disk: fix error return code in mg_probe()
rsxx: remove unused variable
rsxx: enable error return of rsxx_eeh_save_issued_dmas()
block: removes dynamic allocation on stack
Block: blk-flush: Fixed indent code style
cciss: fix invalid use of sizeof in cciss_find_cfgtables()
loop: cleanup partitions when detaching loop device
loop: fix error return code in loop_add()
mtip32xx: fix error return code in mtip_pci_probe()
xen-blkfront: remove frame list from blk_shadow
xen-blkfront: pre-allocate pages for requests
xen-blkback: don't store dev_bus_addr
xen-blkfront: switch from llist to list
xen-blkback: fix foreach_grant_safe to handle empty lists
xen-blkfront: replace kmalloc and then memcpy with kmemdup
xen-blkback: fix dispatch_rw_block_io() error path
rsxx: fix missing unlock on error return in rsxx_eeh_remap_dmas()
Adding in EEH support to the IBM FlashSystem 70/80 device driver
block: IBM RamSan 70/80 error message bug fix.
block: IBM RamSan 70/80 branding changes.
...
This reverts commit 6aa9707099.
Commit 6aa9707099 ("lockdep: check that no locks held at freeze time")
causes problems with NFS root filesystems. The failures were noticed on
OMAP2 and 3 boards during kernel init:
[ BUG: swapper/0/1 still has locks held! ]
3.9.0-rc3-00344-ga937536 #1 Not tainted
-------------------------------------
1 lock held by swapper/0/1:
#0: (&type->s_umount_key#13/1){+.+.+.}, at: [<c011e84c>] sget+0x248/0x574
stack backtrace:
rpc_wait_bit_killable
__wait_on_bit
out_of_line_wait_on_bit
__rpc_execute
rpc_run_task
rpc_call_sync
nfs_proc_get_root
nfs_get_root
nfs_fs_mount_common
nfs_try_mount
nfs_fs_mount
mount_fs
vfs_kern_mount
do_mount
sys_mount
do_mount_root
mount_root
prepare_namespace
kernel_init_freeable
kernel_init
Although the rootfs mounts, the system is unstable. Here's a transcript
from a PM test:
http://www.pwsan.com/omap/testlogs/test_v3.9-rc3/20130317194234/pm/37xxevm/37xxevm_log.txt
Here's what the test log should look like:
http://www.pwsan.com/omap/testlogs/test_v3.8/20130218214403/pm/37xxevm/37xxevm_log.txt
Mailing list discussion is here:
http://lkml.org/lkml/2013/3/4/221
Deal with this for v3.9 by reverting the problem commit, until folks can
figure out the right long-term course of action.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: Jeff Layton <jlayton@redhat.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: <maciej.rutecki@gmail.com>
Cc: Fengguang Wu <fengguang.wu@intel.com>
Cc: Trond Myklebust <Trond.Myklebust@netapp.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Ben Chan <benchan@chromium.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Update the AES0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add clock data for for the SHA0 crypto module
on the am33xx SoC.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The omap_init_aes() routine in devices.c only needs to be
called when there is no device tree present.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Remove the error message that prints when there is no AES IP
present to make it consistent with all the other IPs.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Convert the device data for the OMAP3 AES crypto IP
from explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Convert the device data for the OMAP2 AES crypto IP from
explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Update the SHA0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add clock data for for the SHA0 crypto module
on the am33xx SoC.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The omap_init_sham() routine in devices.c only needs to be
called when there is no device tree present.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Remove the error message that prints when there is no SHA IP
present to make it consistent with all the other IPs.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Convert the device data for the OMAP3 SHAM2 (SHA1/MD5) crypto IP
from explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: updated to use per-SoC registration lists for GP-only hwmods;
fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The current OMAP2 SHAM support doesn't enable DMA
so add that support so it can use DMA just like OMAP3.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Convert the device data for the OMAP2 SHAM crypto IP from
explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Pull SCSI target fixes from Nicholas Bellinger:
"This includes the bug-fix for a >= v3.8-rc1 regression specific to
iscsi-target persistent reservation conflict handling (CC'ed to
stable), and a tcm_vhost patch to drop VIRTIO_RING_F_EVENT_IDX usage
so that in-flight qemu vhost-scsi-pci device code can detect the
proper vhost feature bits.
Also, there are two more tcm_vhost patches still being discussed by
MST and Asias for v3.9 that will be required for the in-flight qemu
vhost-scsi-pci device patch to function properly, and that should
(hopefully) be the last target fixes for this round."
* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
target: Fix RESERVATION_CONFLICT status regression for iscsi-target special case
tcm_vhost: Avoid VIRTIO_RING_F_EVENT_IDX feature bit
On some hardware configurations we have got the request line with the offset.
The patch introduces convert_slave_id() helper for that cases. The request line
base is came from the driver data provided by the platform_device_id table.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
