This reverts commit 555641725f ("drm/amd/display: Request DMUB HW cursor offload").
[WHY]
This commit causes the following failures on DCN42:
igt@kms_plane_cursor@viewport
igt@kms_plane_cursor@overlay
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Qi <Haoming.Qi@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
The cursor programming path caches the last-written cursor state in SW
and, for the enable bit, skips the register write when the cache already
matches the request. Under cursor offload the SW cache is updated even
though the actual register write is deferred to firmware. When an
offloaded cursor update is aborted (e.g. an overlay geometry change
reprograms the cursor directly in the same frame), the queued firmware
write is dropped but the cache is left stale, so the following direct
programming pass skips the enable write and the cursor disappears over
the overlay plane.
Add a refresh_cursor_state() hubp/dpp hook that reads the cursor
position and attribute registers back from hardware into the SW cache,
and call it from dcn35_abort_cursor_offload_update() so the cache is
truthful after an abort. This keeps the enable-change optimization
intact for all ASICs and is race-robust regardless of whether firmware
applied the queued write before the abort. Only dcn60 (the sole offload
user) wires up the hook.
Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
There can be more than 2 DCFCLK values for DCN6, so the assert is not
applicable.
Remove it.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit contains renames, adding const to pipe_ctx in
build_cursor_pos_update_params and also removing unnecessary checks
before dc_dmub_srv_is_cursor_offload_enabled().
[Why]
It improves code clarity.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
dcn401_build_cursor_position() clamped x_hotspot to 0xFF before
publishing *pos_out, but that field is also stored into hubp->curs_pos
and forwarded to dpp1_set_cursor_position(), which derives
src_x_offset from it. The ODM/MPC slice adjustments earlier in the same
function deliberately grow x_hotspot past 255 to keep the cursor
visible across a slice boundary, so the clamp corrupted DPP source
addressing in exactly the case it was meant to handle.
[How]
Clamp in hubp401_cursor_set_position() instead, where the 8-bit
CURSOR_HOT_SPOT_X field lives. A local is used for the register write
only; pos->x_hotspot passes through unmodified.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
UT mirror headers still declared the old prototypes and hwss_gtest still
called the callback directly. Separately, the divide by
param.pixel_clk_khz used to sit after hubp401_cursor_set_position()'s
"curs_attr.address == 0" early return; hoisting the math into the
builder moved it ahead of that guard, so it now traps on streams with
no timing programmed.
[How]
Guard the dst_x_offset block with "if (param.pixel_clk_khz)"
Route the test through hwss_program_cursor_position().
Update dc_hwss_ut.h / dc_hwseq_ut.h and the BLS docs to the new signatures.
Move the pos/param declarations to the top of the loop body.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flatten the executor params for the initial set of HWSS block sequence ops
for SET_CURSOR_POSITION to separate SW and HW logic
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
pipe_ctx is not allowed to reach a block sequence step. Several operations
still carried it into the executor, which then walked the logical state at
execute time (pipe_ctx->stream->timing, pipe_ctx->plane_state and similar)
instead of acting on data resolved during build.
[How]
Give each operation a flat parameter list holding only the hardware objects
and values the final hwss call needs, and change the matching hooks to take
it. The function pointer, the params struct, the executor, the builder
helpers and all call sites are updated together.
Operations covered:
- OPTC_PROGRAM_MANUAL_TRIGGER - takes tg
- HUBP_PROGRAM_TRIPLEBUFFER - program_triplebuffer takes (hubp, bool)
- DPP_SETUP_DPP, DPP_PROGRAM_BIAS_AND_SCALE - take (dpp, plane_state)
- DSC_ENABLE_WITH_OPP - takes (dsc, opp_inst)
- OPP_PROGRAM_BIT_DEPTH_REDUCTION - opp
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Clean up the AMDGPU DM KUnit tests after checkpatch reported an
invalid sizeof(void) allocation, typed kzalloc patterns, and a
repeated word in a kernel-doc summary. Clarify the test name that
covers an active CRTC state transition.
[HOW]
- Use sizeof(cpu_ptr) for the fake CPU pointer allocation.
- Replace typed kzalloc(sizeof(*object), ...) calls with
kzalloc_obj(*object, ...) in the connector, IRQ, plane, and
atomic-state tests.
- Rename the CRTC active-state test and update its kernel-doc and
suite registration.
Assisted-by: Copilot:GPT-5.6-Luna
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Folding the MCCS FreeSync checks into the do_mccs block dropped the
other half of the original condition: the check that clears
freesync_capable for HDMI or PCON-in-whitelist sinks that expose no
EDID FreeSync VCP code. That check does not depend on the MCCS caps
and must run regardless of do_mccs.
As a result, when do_mccs is false such a sink without a FreeSync VCP
code is still reported as FreeSync-capable.
[HOW]
Restore the VCP code check outside the do_mccs block so it is
evaluated whether or not MCCS caps were read.
Fixes: 115bf5ca31 ("drm/amd/display: Consult MCCS FreeSync cap only if requested & supported")
Reviewed-by: Roman Li <roman.li@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Writeback mode tests call drm_mode_probed_add without holding
mode_config.mutex, producing a warning for every generated mode.
[HOW]
Hold the mutex around writeback mode enumeration and release it before
checking the returned count or inspecting the generated modes.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Vblank and interrupt-management tests need discoverable CRTCs with
complete vblank callbacks and balanced teardown.
[HOW]
Add the callbacks, link the fake CRTCs, and register cleanup actions
to disable vblank before unlinking. Pass the CRTC directly so cleanup
does not reinterpret two different fixture types through one layout.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The MST add-connector fixture registers an unmanaged master connector
but does not clean it up before its KUnit-owned storage is released.
[HOW]
Register a KUnit action after successful connector initialization to
run drm_connector_cleanup before freeing the master connector.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
IRQ tests leave vblank active when removing their fake CRTCs, causing
warnings during DRM device teardown.
[HOW]
Turn off initialized vblank before unlinking each test CRTC in the
existing cleanup action.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The real connector fixture lacks atomic state callbacks required by
DRM connector initialization.
[HOW]
Install the DRM atomic connector duplicate and destroy state helpers
alongside the existing reset callback.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The VRR transition test needs a discoverable CRTC and balanced vblank
teardown. Assertion failures must not leave freed CRTCs linked.
[HOW]
Supply a vblank counter callback and link the test CRTC. Register a
KUnit cleanup action to disable vblank and unlink it on every exit.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The cursor offset test binds a CRTC without a framebuffer, triggering
a plane-state consistency warning before the intended offset check.
[HOW]
Provide a test framebuffer in the new plane state while retaining the
invalid offset and its expected rejection.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Incomplete CRTC callbacks and vblank teardown cause DRM warnings in
CRTC tests.
[HOW]
Provide the required CRTC callbacks, link fake CRTCs for vblank lookup,
and register cleanup actions to disable vblank before unlinking them.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Connector mode population without mode_config.mutex produces warning
stack traces. Legacy property reads also warn on atomic DRM devices.
[HOW]
Lock mode-population calls and release the mutex before assertions.
Read stored property values with the atomic-compatible default getter.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Like DCN42, the alpha field is 12 bits compared to the 16 bit value in
plane_state; must convert it.
Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Inbox1 was previously being used for cursor and DIG locking with
DMUB doing the relevant programming on behalf of driver.
With the Inbox0 lock the driver is expected to do the programming
itself and the Inbox0 lock acts as nothing more than a SW mutex.
There are still a few gaps in how Inbox1 was being leveraged in the
cursor path that need to be addressed for Inbox0.
[How]
Add a `should_use_dmub_inbox0_lock_for_link` helper to help
check if we support the Inbox0 locking infrastructure and we should
be locking it if the specific link in question requires it.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an inst member to struct clock_source and struct dio. The DCE110
and DCE112 clock sources derive it from their clock_source_id; the
DCN10 DIO is a singleton and uses 0.
Also move the (void)encoding cast in dcn401_program_pix_clk() below the
local declarations, where it belongs.
No functional change; the inst field has no readers yet.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an inst member to struct link_encoder, struct stream_encoder and
struct hpo_frl_stream_encoder, and populate it in the DCN10 through
DCN60 construct paths.
No functional change; the field has no readers yet.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Thirteen tests in the amdgpu_dm_irq suite only re-ran a path that
another test already covered, and five more repeated setup that the
fixtures added by the preceding patches now provide.
[HOW]
Delete the tests whose executed path is a strict subset of
another's, and fold the remaining duplicated setup onto the shared
fixtures.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
handle_hpd_rx_irq() left its whole post-detect block untested
apart from a failing re-detect, and never dispatched a CP_IRQ.
[HOW]
Add four tests covering a failing connection-type probe, a
connector forced on that is emulated instead of detected, a successful
re-detect that notifies userspace, and a CP_IRQ that must be handed to
the HDCP work queue for the connector that raised it.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
handle_hpd_irq_helper() never ran its HDCP reset, its forced
connector branch or its successful re-detect branch.
[HOW]
Add a minimal HDCP work queue fixture and three tests: an HPD on
a driver that carries an HDCP work queue, which must reset the display
and flag the connector state; a connector forced on that reports no
connection and is emulated instead of detected; and a successful
re-detect that notifies userspace.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
amdgpu_dm_hdmi_hpd_debounce_work() only ran with detection
failing, so neither outcome of the sink comparison that decides whether
an HPD toggle was spurious was covered.
[HOW]
Add a fixture for the debounce work item and two tests: a
re-detect finding the same sink, which re-enables internally without
notifying userspace, and one finding a different sink, which sends the
hotplug event.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
dm_handle_hpd_rx_offload_work() was covered only for its
automated-test and link-loss branches. The connection-type failure, the
GPU-reset drop, the MST message-ready drain and the forced reconnect
were never entered.
[HOW]
Add a fixture that builds a queued offload work item on a
DisplayPort link and four tests: a failing connection-type probe, a
device already in reset, a deferred UP_REQ_MSG_RDY drained through an
AUX that fails every transfer, and an automated test whose timing
changed, which forces the connector off and back on. The last one
registers the DRM device so the hotplug uevent helpers find a sysfs
minor on the primary node.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
dm_pflip_high_irq() only ever ran with VRR inactive, so the
scanout position query and the front-porch path that queues the
pageflip event on the vblank event list were never reached.
[HOW]
Add a fake timing generator reporting a scanout position past the
start of the front porch, plus a fixture that puts a submitted flip on
an active-VRR stream.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
amdgpu_dm_get_crtc_by_otg_inst() had no test for an OTG instance
of -1, so its WARN_ON guard and the fallback to the first CRTC were
never executed.
[HOW]
Add dm_test_get_crtc_by_otg_inst_unassigned_otg(), which installs
a CRTC as mode_info.crtcs[0] and asserts the lookup returns it rather
than walking the CRTC list.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add a KUnit test to cover dm_helpers_dp_mst_start_top_mgr() its
success path.
[HOW]
Mark the topology manager as already in MST mode, so
drm_dp_mst_topology_mgr_set_mst() returns success without touching the
AUX channel or queueing the link probe work, and the helper reports
that MST was started.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for the AUX paths of dm_helper_dmub_aux_transfer_sync(),
dm_helpers_read_mccs_caps() and dm_helpers_mccs_vcp_set(). Only their
early returns and the plain I2C branch were covered before.
[HOW]
dm_helper_dmub_aux_transfer_sync() is called with HPD connected so it
forwards the payload to the DMUB transfer. dc->link_count is zero, so
the async transfer is rejected and the engine-acquire error is
reported.
Both MCCS helpers pick their DDC adapter from link->aux_mode. Add a
fake AUX channel that ACKs every I2C-over-AUX transaction and counts
the sized writes, then route the shared MCCS fixture through it. The
VCP set completes on the first write. The VCP request gets an empty
reply, so every attempt is retried and the request finally fails.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Add KUnit tests for three EDID paths in amdgpu_dm_helpers.c the SDC
panel PSR PHY power-down quirk in apply_edid_quirks(), the HDMI
compliance-auto branch of dm_helpers_parse_edid_caps(), and the VBIOS
fallback and corrupt-EDID paths of dm_helpers_read_local_edid().
[HOW]
apply_edid_quirks() is driven twice with the SDC panel ids, once on a
DisplayPort signal and once on eDP, showing the quirk is embedded-only.
dm_helpers_parse_edid_caps() runs against an HDMI connector whose
hdmi_comp_auto flag is set, so the FRL and FRL DSC debug options are
forced on and the quirk is recorded in the panel patch.
dm_helpers_read_local_edid() is given an embedded link with no DDC
line, so it falls back to the EDID hardcoded in the VBIOS embedded
panel info that the existing fake dc_bios supplies. A second test
corrupts the base block checksum served by the fake AUX DDC, so the
read fails, the real checksum is written back and EDID_BAD_CHECKSUM is
reported.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Description]
Re-enable P-State message to SMU now that support has been added on
SMU side
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Description]
When sending the indicate P-Stat message to PMFW, the wait_resp flag
should be set based on fw_based_mclk_switching in order to maintain
the logic from previous product.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Document the amdgpu_dm struct members and function parameters reported
by kernel-doc. Convert non-kernel-doc prose comments to regular
comments and clarify the HDMI FRL polling fields.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202609051521.dVjPj9Zw-lkp@intel.com/
Assisted-by: Copilot:GPT-5.6-Luna
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an inst member to struct pg_cntl and set it to 0 in
pg_cntl35_create() and pg_cntl42_create(), since PG cntl is a singleton.
No functional change; the field has no readers yet.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
HWS_APPLY_UPDATE_FLAGS_FOR_PHANTOM and HWS_UPDATE_PHANTOM_VP_POSITION
program no hardware. They only mutate driver state: pipe update flags,
the phantom plane viewport and the phantom scaling params.
A block sequence is built first and executed later, so both ops ran only
after the builder had already inspected pipe_ctx->update_flags to decide
which steps to emit. The phantom pipe was therefore built from stale
flags.
[How]
Call apply_update_flags_for_phantom() and update_phantom_vp_position()
directly from hwss_build_post_unlock_full_sequence(), before
program_pipe_sequence(), matching the legacy
dcn401_post_unlock_program_front_end() ordering.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Hwss executors shouldn't be coupled to complex dc structs such as
pipe_ctx. The DPP_PROGRAM_UPSP executor took a whole pipe_ctx only to
reach two fields.
[How]
Change program_upsp_params to hold the dpp and the dscl_prog_data that
dpp_program_upsp() actually needs, and extract them in the generic HWSS
layer. Add hwss_add_dpp_program_upsp() so the build site uses a helper
with the standard bounds check instead of assigning the step inline.
Update the BLS specs.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the four viewport KUnit tests for
amdgpu_dm_plane_helper_check_state() to one, and the three rejection
tests for amdgpu_dm_plane_atomic_check() to one.
[HOW]
Drive the viewport cases from a table of CRTC rectangles and display
sizes, and rebuild the atomic state between the helper-check, color
pipeline conflict and scaling-info sub-cases of the atomic check test.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the two KUnit tests for
amdgpu_dm_plane_get_min_max_dc_plane_scaling() to one, and the two for
amdgpu_dm_plane_get_cursor_position() to one.
[HOW]
Populate the fp16 scaling caps alongside the NV12 and ARGB8888 ones and
query all three formats from one device, and append the oversized cursor
rejection to the existing clipping test.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the five KUnit tests for the GFX9 DCC block modes of
amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers() to one, and the three
for amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers() to one.
[HOW]
Drive both from a table of modifier bits and the expected HUBP
independent block mode, allocating the device, DC and framebuffer once
and resetting the tiling, DCC and address outputs per row.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the seven KUnit tests for amdgpu_dm_plane_validate_dcc() to
three.
[HOW]
Split them into a table-driven test for the checks that run before the
DC capability query and a table-driven test for the rejections that come
out of it, leaving the success and scan-mapping test unchanged.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the four KUnit tests for
amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier() to one, and the
three for amdgpu_dm_plane_calc_gfx6_mod() to one.
[HOW]
Build the linear, rejected, 1D tiled and 2D tiled modifiers as locals
and decode them in sequence, and drive the micro tiled, GFX7-8 and GFX6
modifier calculations from two devices inside a single test.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the two KUnit tests for
amdgpu_dm_plane_fill_gfx9_tiling_info_from_device() to one, and the
three for amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier() to one.
[HOW]
Reprogram the device configuration and re-run the helper in sequence
inside a single test per function, so the pre-10.3, 10.3-and-later,
linear, pre-NV and NV-and-later cases all stay covered.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the four KUnit tests for amdgpu_dm_plane_add_modifier() to two,
and the two tests for amdgpu_dm_plane_add_modifier_dedup() to one.
[HOW]
Group the append and capacity-growth cases into one test and the
NULL-list and allocation-failure cases into another, and run the
duplicate-skip and NULL-list dedup cases in sequence within a single
test.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the six KUnit tests for amdgpu_dm_plane_get_plane_modifiers() to
three, keeping every family dispatch covered.
[HOW]
Merge the GFX10.1, GFX10.3 and GFX12 cases into one table-driven test
over the family and GC IP version, and merge the two RV cases into a
table over the external revision id that selects the constant-encode
modifier variants.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the two KUnit tests for amdgpu_dm_plane_get_plane_formats() to
one.
[HOW]
Allocate a second plane cap with the DCN universal type in the existing
test and check the overlay format count against it, then drop the
standalone test.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Reduce the five KUnit tests for
amdgpu_dm_plane_fill_blending_from_plane_state() to two, keeping every
covered path.
[HOW]
Turn the opaque, premultiplied and coverage cases into one table-driven
test over the pixel blend mode, and fold the DCN 4.2 case into the
global alpha test as a second table row selecting the DCE IP version.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
