The common (i.e. identical for ll/sc and lse) atomic macros in atomic.h
are needlessley different for atomic_t and atomic64_t.
This patch tidies up the definitions to make them consistent across the
two atomic types and factors out common code such as the add_unless
implementation based on cmpxchg.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
cmpxchg doesn't require memory barrier semantics when the value
comparison fails, so make the barrier conditional on success.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We can perform the cmpxchg comparison using eor and cbnz which avoids
the "cc" clobber for the ll/sc case and consequently for the LSE case
where we may have to fall-back on the ll/sc code at runtime.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our cmpxchg_double primitives
so that the LSE casp instruction is used instead.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our cmpxchg primitives so that
the LSE cas instruction is used instead.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our xchg primitives so that
the LSE swp instruction (yes, you read right!) is used instead.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our bitops functions so that
LSE atomic instructions are used instead.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our locking functions so that
LSE atomic instructions are used for spinlocks and rwlocks.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of atomic_t and atomic64_t
routines so that the call-site for the out-of-line ll/sc sequences is
patched with an LSE atomic instruction when we detect that
the CPU supports it.
If binutils is not recent enough to assemble the LSE instructions, then
the ll/sc sequences are inlined as though CONFIG_ARM64_LSE_ATOMICS=n.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
In order to patch in the new atomic instructions at runtime, we need to
generate wrappers around the out-of-line exclusive load/store atomics.
This patch adds a new Kconfig option, CONFIG_ARM64_LSE_ATOMICS. which
causes our atomic functions to branch to the out-of-line ll/sc
implementations. To avoid the register spill overhead of the PCS, the
out-of-line functions are compiled with specific compiler flags to
force out-of-line save/restore of any registers that are usually
caller-saved.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This is required for DPMS to work correctly, during a modeset
the DPMS property should be turned off, unless the state is
crtc is made active in which case it should be set to DPMS on.
Changes since v1:
- Set DPMS to off when a connector is removed from a crtc too.
- Update the legacy dpms property too.
- Add an exception for the legacy dpms paths, it updates its own state.
Changes since v2:
- Do not preserve dpms property.
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This is required to properly handle failing dpms calls.
When making a wait in i915 interruptible, I've noticed
that the dpms sequence could fail with -ERESTARTSYS because
it was waiting interruptibly for flips. So from now on
allow drivers to fail in their connector dpms callback.
Encoder and crtc dpms callbacks are unaffected.
Changes since v1:
- Update kerneldoc for the drm helper functions.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Resolve conflicts due to different merge order.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
In intel it's useful to keep track of some state changes with old
crtc state vs new state, for example to disable initial planes or
when a modeset's prevented during fastboot.
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
[danvet: squash in fixup for exynos provided by Maarten.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Use managed resource functions like devm_kasprintf and
devm_power_supply_register in bq24735_charger_probe. To be
compatible with the change, replace various gotos by direct
returns and drop unneeded labels.
Also, remove bq24735_charger_remove as it is now redundant.
Signed-off-by: Vaishali Thakkar <vthakkar1994@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Add a CPU feature for the LSE atomic instructions, so that they can be
patched in at runtime when we detect that they are supported.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The ARM v8.1 architecture introduces new atomic instructions to the A64
instruction set for things like cmpxchg, so advertise their availability
to userspace using a hwcap.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
In preparation for the Large System Extension (LSE) atomic instructions
introduced by ARM v8.1, move the current exclusive load/store (LL/SC)
atomics into their own header file.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Including ARM related header file cause build failure
in i386 build because COMILE_TEST also involve building
zx driver. Remove the unnecessary include file.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
cpufeature.h makes use of DECLARE_BITMAP, which in turn relies on the
BITS_TO_LONGS and DIV_ROUND_UP macros.
This patch includes kernel.h in cpufeature.h to prevent all users having
to do the same thing.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
STXR can fail for a number of reasons, so don't fail an rwlock trylock
operation simply because the STXR reported failure.
I'm not aware of any issues with the current code, but this makes it
consistent with spin_trylock and also other architectures (e.g. arch/arm).
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
platform_driver and i2c_driver do not need to set an owner because core
will set it.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Fix the clocks property documentation and use lower case for
hex values in the example.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Rob Herring <robh@kernel.org>
With this change the stub has the same signature as the actual function,
preventing this compiler warning when building without CONFIG_OF:
drivers/base/property.c: In function 'fwnode_driver_match_device':
>> drivers/base/property.c:608:38: warning: passing argument 2 of 'of_driver_match_device' discards 'const' qualifier from pointer target type
return of_driver_match_device(dev, drv);
^
In file included from drivers/base/property.c:18:0:
include/linux/of_device.h:61:19: note: expected 'struct device_driver *' but argument is of type 'const struct device_driver *'
static inline int of_driver_match_device(struct device *dev,
^
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
On UML builds, of_address.c fails to compile:
../drivers/of/address.c:873:2: error: implicit declaration of function ‘ioremap’ [-Werror=implicit-function-declaration]
This is due to CONFIG_OF now being user selectable. Add a dependency on
HAS_IOMEM to OF_ADDRESS in order to fix this.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Grant Likely <grant.likely@linaro.org>
We no longer have to do GPIO initialization before the
pinctrl initialization, instead we can initialize the pinctrl
portions of the driver first and then the GPIO. Thus we can
move GPIO initialization to a subsystem_initcall(), but
not yet to a device_initcall().
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This gets the GPIO ranges out of the driver and into the device
tree where they belong. Standard DT bindings already exist for
this. Since no systems with this are deployed we can just augment
all device trees and the drivers at the same time and simplify
the world.
This also defines the array of GPIO chips related to the pin
controller.
Cc: arm@kernel.org
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the GIO block in the ARTPEC-3 SoC. The basic
functionality is essentialy the same as the version in the ETRAX FS,
except for a different set of ports, including a read-only port.
Cc: devicetree@vger.kernel.org
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Allow chips to indicates that they are input-only and thus cannot set
the output value. This will be used by the gpio-etraxfs driver.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
BGPIO_F_UNREADABLE_REG_SET is incorrect, since the set register _is_
readable. What's really required is BGPIO_F_READ_OUTPUT_REG_SET:
reading the set register reads the set output value.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The current interrupt parsing code was working by accident, because the
default was actually parsing the first node of interrupts.
While that was mostly working (and the flags were actually ignored), this
binding has never been documented, and doesn't work with SoCs that have
multiple interrupt banks anyway.
Add a proper interrupt xlate function, that uses the same description than
the GPIOs (<bank> <pin> <flags>), that will make things less confusing.
The EINT number will still be used as the hwirq number, but won't be
exposed through the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This clarifies the location of the files maintained by me.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The DT nodes in uniphier-pinctrl.dtsi provide the default pinctrl
settings that would be suitable for most boards. You can still
override them in your board DTS file if necessary.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the pinctrol device nodes for UniPhier PH1-LD4, PH1-Pro4,
and PH1-sLD8.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
There is mostly one evolution on the dma side, to enable cooperation
of the legacy pxa DMA API, and the new dmaengine API.
Once all drivers using DMA are converted, the legacy DMA API should
be removed.
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Merge tag 'pxa-for-4.3-v2' of https://github.com/rjarzmik/linux into next/soc
This is the pxa changes for v4.3 cycle.
There is mostly one evolution on the dma side, to enable cooperation
of the legacy pxa DMA API, and the new dmaengine API.
Once all drivers using DMA are converted, the legacy DMA API should
be removed.
* tag 'pxa-for-4.3-v2' of https://github.com/rjarzmik/linux:
ARM: pxa: Use setup_timer
ARM: pxa: Use module_platform_driver
ARM: pxa: transition to dmaengine phase 1
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch converts gpio_bank.lock from a spin_lock into a
raw_spin_lock. The call path is to access this lock is always under a
raw_spin_lock, for instance
- __setup_irq() holds &desc->lock with irq off
+ __irq_set_trigger()
+ omap_gpio_irq_type()
- handle_level_irq() (runs with irqs off therefore raw locks)
+ mask_ack_irq()
+ omap_gpio_mask_irq()
This fixes the obvious backtrace on -RT. However the locking vs context
is not and this is not limited to -RT:
- omap_gpio_irq_type() is called with IRQ off and has an conditional
call to pm_runtime_get_sync() which may sleep. Either it may happen or
it may not happen but pm_runtime_get_sync() should not be called with
irqs off.
- omap_gpio_debounce() is holding the lock with IRQs off.
+ omap2_set_gpio_debounce()
+ clk_prepare_enable()
+ clk_prepare() this one might sleep.
The number of users of gpiod_set_debounce() / gpio_set_debounce()
looks low but still this is not good.
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These changes make dm814x boot and adds minimal board support for
dm814x-evm and hp t410.
Note that to boot these depend on omap-for-v4.3/soc-signed branch,
but as dm814x support is currently broken, these can be merged
separately with the other dts changes.
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Merge tag 'omap-for-v4.3/dt-dm814x' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
omap dts changes for minimal dm814x support for v4.3 merge window.
These changes make dm814x boot and adds minimal board support for
dm814x-evm and hp t410.
Note that to boot these depend on omap-for-v4.3/soc-signed branch,
but as dm814x support is currently broken, these can be merged
separately with the other dts changes.
* tag 'omap-for-v4.3/dt-dm814x' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Add custom abort handler for t410
ARM: dts: Add minimal support for HP T410
ARM: dts: Add minimal dts support for dm8148-evm
ARM: dts: Add minimal clocks for dm814x
ARM: dts: Add minimal dm814x support
Signed-off-by: Olof Johansson <olof@lixom.net>
Use dev_err() rather than pr_err() to display the error message.
pinctrl_dev_get_name(pctldev) is no longer necessary because
dev_err() shows which device the message is related to.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use dev_err() rather than pr_err() to display the error message.
(Besides, dev_err() is already used 7 lines below in this function.)
Also, drop the redundant information "on %s" because dev_err() shows
which device the message is related to.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some device present proprietary collections with a usage min of 0x00 and
a usage max of 0xffff. hid-core currently reject them while most of the
time this is harmless.
Let's ignore the exceeding usages, and hope for the best.
Reported-by: Simon Wörner <mail@simon-woerner.de>
Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Jiri Kosina <jkosina@suse.com>
This variable is used as an iterator and initialized in the
list_for_each() loop.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Clean-up omap4_local_timer_init to drop deal legacy code
- Provide proper IO map table for dra7
- Clean-up IOMMU layer init code as it now uses IOMMU framework
- A series of changes to fix up dm814x support that's been in a broken
half-merged state for quite some time
- A series of PRCM and hwmod changes via Paul Walmsley <paul@pwsan.com>:
- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
bugs
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Merge tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omaps for v4.3 merge window:
- Clean-up omap4_local_timer_init to drop deal legacy code
- Provide proper IO map table for dra7
- Clean-up IOMMU layer init code as it now uses IOMMU framework
- A series of changes to fix up dm814x support that's been in a broken
half-merged state for quite some time
- A series of PRCM and hwmod changes via Paul Walmsley <paul@pwsan.com>:
- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
bugs
* tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: OMAP2: Add minimal dm814x hwmod support
ARM: OMAP2+: Prepare dm81xx hwmod code for adding minimal dm814x support
ARM: PRM: AM437x: Enable IO wakeup feature
ARM: OMAP4+: PRM: Add AM437x specific data
ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets
ARM: dts: AM4372: Add PRCM IRQ entry
ARM: AM43xx: Add the PRM IRQ register offsets
ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
ARM: OMAP2+: Add support for initializing dm814x clocks
ARM: OMAP2+: Add custom prwdm_operations for 81xx to support dm814x
ARM: OMAP2+: Add minimal clockdomains for dm814x
ARM: OMAP2+: Fix scm compatible for dm814x
ARM: OMAP2+: Fix dm814x DT_MACHINE_START
ARM: OMAP2+: Remove module references from IOMMU machine layer
ARM: DRA7: Provide proper IO map table
ARM: OMAP2+: Clean up omap4_local_timer_init
ARM: OMAP2: Delete an unnecessary check
ARM: OMAP2+: sparse: add missing function declarations
ARM: OMAP2+: sparse: add missing static declaration
ARM: OMAP2+: hwmod: add support for lock and unlock hooks
...
Signed-off-by: Olof Johansson <olof@lixom.net>
We should release "sd" before returning.
Fixes: 0fa12ad1b285 ('ext4: Handle error from dquot_initialize()')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jan Kara <jack@suse.com>
* Add Audio MIX and CTU support to r8a779[01] SoCs
* Correct IRQ sense for adv7511 on lager board
* Add sound label to koelsch and lager boards
* Add IIC support to emev2 SoC
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Merge tag 'renesas-dt2-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.3
* Add Audio MIX and CTU support to r8a779[01] SoCs
* Correct IRQ sense for adv7511 on lager board
* Add sound label to koelsch and lager boards
* Add IIC support to emev2 SoC
* tag 'renesas-dt2-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Add Audio MIX support on DTSI
ARM: shmobile: r8a7791: Add Audio CTU support on DTSI
ARM: shmobile: r8a7790: Add Audio MIX support on DTSI
ARM: shmobile: r8a7790: Add Audio CTU support on DTSI
ARM: shmobile: lager: Fix adv7511 IRQ sensing
ARM: shmobile: koelsch: add sound label on DTS
ARM: shmobile: lager: add sound label on DTS
ARM: shmobile: emev2: kzm9d: enable IIC busses
ARM: shmobile: emev2: add IIC cores to dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
-----------
- Add RCC clocks support to STM32F429
- Add STM32429i-EVAL board support
- Use stdout-path instead of linux,stdout-path in Disco board
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Merge tag 'stm32-dt-for-v4.3-1b' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32 into next/dt
STM32 DT updates for v4.3, round 1.
Highlights:
-----------
- Add RCC clocks support to STM32F429
- Add STM32429i-EVAL board support
- Use stdout-path instead of linux,stdout-path in Disco board
* tag 'stm32-dt-for-v4.3-1b' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/stm32:
ARM: dts: Use stdout-path in STM32F429 Discovery board
ARM: dts: Add STM32429i-EVAL board support
ARM: dts: stm32f429: Adopt STM32F4 clock driver
Signed-off-by: Olof Johansson <olof@lixom.net>
