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Author SHA1 Message Date
Arnd Bergmann
86a24899c2 STM32 DT updates for v5.12, round 1
Highlights:
 ----------
 
 MCU part:
  -Rename mmc nodes to match with yaml validation.
 
 MPU part:
  -Rename mmc nodes to match with yaml validation.
  -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
   to SoC dtsi file.
 
  -LXA:
   -Fix leds schema for yaml validation.
 
  -DH:
   -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
    on DHCOM.
   -Add SDMMC1 init state inorder to use some gpios during probing phase.
   -Disable KS8851 and FMC on PicoITX board.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmATyQUdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX84BAAlVkBo4MqpaSDUVTS
 TGdwGoZMWmY848xb5x5RSMhXoDPgqOCWNF+iprhUii7QT6jgZMxy5JkwXFFpaK7K
 aIGYyegx/7BoUiyhEnzLHDO2brqzbwy6bRwVpVeqPFgPrOW7Tv6lfN9kpA06EQJ8
 nQNpGlXrcmeiCmD/iGX50JGC5X2ldqcLjAIEdgvGzRd/pGkyFkh6WIAvTf1wkgvi
 BqM5swKNWVeB3PloSxqfU5YE4ZBNkdjyjPCaIqB47or3WztyBaqH3KlEYTwwcJcw
 EaARNkl2sLvuu5p2CEpYwjW0TPG/RivQFpAYDTOGEjAOzZ4C2tWnQQzDTdlAIsCp
 FgrpWF9R/k43ea11Wr9A/vgh2kimQbBJtr5OoohxsxzxM/RqvFXBPzmm+sAGCgJ6
 YH8AEeKYECDLr4Xw1F05sAibWJsUWX8dktbtG2ZRa7JT5AshzaISDbQmt1qUiRG4
 duxDmaW3Gh0AYBXVVA0bH1hmIADVn2OjfryNHM3LFIELiowZwYY6VxksYVD2VF8l
 uqkSxoYp041luJDXJEAWCKcGzlBprVoqpjzNiasKKPlTFmgh9qMLI6f5zM7tHNCM
 0Bvt4kCGT9yJAJMJV/UvYwYuiCHan8ZMkbEjJCx4FQcTQnJ8NMKVTdASsZT6917A
 aFkwN46HsDoAWL/3GOeUPhKnazo=
 =j5vm
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.12, round 1

Highlights:
----------

MCU part:
 -Rename mmc nodes to match with yaml validation.

MPU part:
 -Rename mmc nodes to match with yaml validation.
 -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
  to SoC dtsi file.

 -LXA:
  -Fix leds schema for yaml validation.

 -DH:
  -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
   on DHCOM.
  -Add SDMMC1 init state inorder to use some gpios during probing phase.
  -Disable KS8851 and FMC on PicoITX board.

* tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
  ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
  ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
  ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
  ARM: dts: stm32: Rename mmc controller nodes to mmc@
  ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
  ARM: dts: stm32: Add additional init state for SDMMC1 pins
  ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
  ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
  ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
  ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect

Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29 16:29:20 +01:00
Arnd Bergmann
af91156490 Renesas ARM DT updates for v5.12 (take two)
- Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U
     SoC on the Renesas Falcon board,
   - Disable SD functions for plain eMMC,
   - A minor fix.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYBPPvQAKCRCKwlD9ZEnx
 cEHnAQCBtMhyCTcj4iMQKMNVWgLTqFQUazatj7KCL2hUriOq2QD/Sn3gHAD1rYEu
 bMsS/qPEntlBpM/z6PXAtUfJ9N+xjAg=
 =KNSo
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.12 (take two)

  - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U
    SoC on the Renesas Falcon board,
  - Disable SD functions for plain eMMC,
  - A minor fix.

* tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: beacon: Fix EEPROM compatible value
  arm64: dts: renesas: falcon: Enable MMC
  arm64: dts: renesas: r8a779a0: Add MMC node
  arm64: dts: renesas: r8a779a0: Add HSCIF support
  arm64: dts: renesas: falcon: Complete SCIF0 nodes
  arm64: dts: renesas: r8a779a0: Add & update SCIF nodes
  arm64: dts: renesas: falcon: Add Ethernet-AVB0 support
  arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
  arm64: dts: renesas: falcon: Add I2C0,1,6 support
  arm64: dts: renesas: r8a779a0: Add I2C nodes
  arm64: dts: renesas: Disable SD functions for plain eMMC
  arm64: dts: renesas: r8a779a0: Add MSIOF device nodes

Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29 14:02:50 +01:00
Arnd Bergmann
0b9c5cdda9 ARM64: DT: Hisilicon ARM64 DT updates for 5.12
- Further cleanups of the hisilicon DTS to align with the dtschema
 - Add or update the I2C, pinctrl and reset nodes for Hikey970
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJgE84JAAoJEAvIV27ZiWZceFoP/1dCnJIa0L1cMdljleEM2HRO
 Nd9qHcC4wU3sNQdAsZ1AvQZhxHbFYWRU3Zq+n45NbnSAELALXbfNNwzBRZHavRnU
 luUaQK8y2NcyRNhCIs9V5XuZfRFsrNKCVpGexBpXicsG2j47V2PnzjcoZeilybyM
 aqsDfMisWlEFmXaLEttdE0ZEwYdGiGiKqRlkCLnW77yepMteykx6wCnT2CihEucC
 I0Pbs1cq3BCGR32oQjp26JNDRJD07WwxYhsEcAVMI3aE6WcUJ2e2eUVOEXt685ZL
 rZfUcNByWNnL/e79XW3f++j5p7RTYxU+6gBKNFmxzpNsm5Ty+mthWEfffrs0jKyU
 z1HySYW/arJl93ikMDuNqb7hfFhRc6VaIIoaIycFCR71myFwl7pX0mJnISPWOVIg
 ZFPL7gZ8hdm2ijXrMAZ/idAa+fo6RFill48p8b0hAVL28aiVcUaT80zXcW86ge9k
 sVTn0gGfrn3fv3b/Jvxu7I66CkhnFt054eE3a4yOXcnb62rDaLV3euq/+68cPdOU
 es5+22cBZBP4EiVaGdYfgA4meCPFO+Os4chOzjoY/XhrVmMdjVzKqSJDlN3NTCaB
 d2tHS6wt6hnH/Zknya+R5K+5yJfEdAaabiyLAdoTkT3Ew2csTUH7kZXRU3glJi1k
 QS8T6EcV6cJgmPMntaLR
 =SHmD
 -----END PGP SIGNATURE-----

Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 DT updates for 5.12

- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970

* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
  arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
  arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
  arm64: dts: hisilicon: delete unused property smmu-cb-memtype
  arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
  arm64: dts: hisilicon: normalize the node name of the localbus
  arm64: dts: hisilicon: normalize the node name of the module thermal
  arm64: dts: hisilicon: place clock-names "bus" before "core"
  arm64: dts: hisilicon: separate each group of data in the property "ranges"

Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-29 13:57:06 +01:00
Mauro Carvalho Chehab
b6e141eec8 arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:40:07 +08:00
Mauro Carvalho Chehab
62b4c3514b arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
There are several pinctrl settings that are missing at this
DT file.

Also, the entries are out of order.

Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.

Reorder the entres, adding the missing bits.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:39:44 +08:00
Mauro Carvalho Chehab
305656e098 arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
This is required in order to support USB.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:36:25 +08:00
Zhen Lei
ccf43e0201 arm64: dts: hisilicon: delete unused property smmu-cb-memtype
The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.

Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:26 +08:00
Zhen Lei
b2bbc8687e arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property

Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:26 +08:00
Zhen Lei
a328818ee7 arm64: dts: hisilicon: normalize the node name of the localbus
Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:25 +08:00
Zhen Lei
dbbf51315a arm64: dts: hisilicon: normalize the node name of the module thermal
1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:25 +08:00
Zhen Lei
1860a51823 arm64: dts: hisilicon: place clock-names "bus" before "core"
Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
  items:
    - const: bus
    - const: core

The "bus" needs to be placed before the "core".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:25 +08:00
Zhen Lei
47a6ca1172 arm64: dts: hisilicon: separate each group of data in the property "ranges"
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:

soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2021-01-29 16:33:24 +08:00
Amelie Delaunay
36be90f536 ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
usbphyc is a 48Mhz clock provider: the clock can be used as clock source
for USB OTG. Add #clock-cells property to usbphyc node to reflect this
capability.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-29 09:20:01 +01:00
Amelie Delaunay
c96f8d3ca7 ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs.
Remove them from usbphyc child phy nodes now that they are managed in
usbphyc parent node at SoC level.

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-29 09:20:01 +01:00
Amelie Delaunay
c9669b4692 ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
vdda1v1 and vdda1v8 supplies are required by USB PLL. Add them in usbphyc
node.

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-29 09:20:01 +01:00
Jagan Teki
3bb48247ea ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
Add SDA/SCL pinmux lines for I2C6 on STM32MP1.

This support adds both in default and sleep states.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-29 09:20:01 +01:00
Geert Uytterhoeven
74477936a8 arm64: dts: renesas: beacon: Fix EEPROM compatible value
"make dtbs_check" fails with:

    arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
	    'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'

Fix this by dropping the bogus "at" prefix.

Fixes: a1d8a344f1 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
2021-01-29 09:11:27 +01:00
Arnd Bergmann
1f99bd1a51 Samsung DTS ARM64 changes for v5.12
Correct Samsung PMIC and S3FWRN5 NFC interrupts trigger levels on
 TM2/TM2E and Espresso boards.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmAPBUwQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD19xPEACX14MjDi/YglhTj+tAQh8dtovyXoR7F+hY
 Fa3fZjUYZ7YMVlngm/dJTCT9i4lmjVQrFidhmx3oNO0LETNU8q0bUT4DevpKCf7J
 Im8hZcSNnIobgpfmiuy45wftgCjOBf4aKF6jUPmyhrPzDQ086udV8np5aGaT8Z2b
 s9Mlke1a3SYvJi5zsVD0un6pGdBwn+sBZwevAeitTj5qlv0nqOCMkbC58XGOgrig
 U+XfMnLowrxiemtDnlCbVz6YyYDPV6GnAEgyLYyQu/ftkRg4LHPUxT+6Z5mYPnZg
 xvFGyINdmb/5ABSOx+QjRv99piyJILqQ6skfcWwgAeUxNhoXCAXdVLitFfUIgKgF
 gsMR7jWQEsjGaQNTfpuhOxgU3bZl9mr0vVdyJrYfEg8R+ht1IBAF7y1zRyBi9Cgk
 t10OtHksjLsKT72Wv68nBYfPU04w/wuLrab10t5k/cZuVX0d0lLT1DT7+ziSPNvg
 A1WC6I/Ez/m+yYx3AE9IqqRMSTdPqRFcHQ+Xu/dcOFgNDkjs/ulutKDcXfHD0CER
 QjLrCDVHDYwoKWfUbd+As1ufwCZsBNybNiqR9MaXTo2hbKU1G9iJJhYnH55hfQo8
 +C7weMwFDxsjLl/N4aDwuy7nC89MXz/7rj6vbJ+LtCr9lHxEpsAz/X517/edEGIC
 d+UbWfKNgg==
 =PJA4
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.12

Correct Samsung PMIC and S3FWRN5 NFC interrupts trigger levels on
TM2/TM2E and Espresso boards.

* tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: correct S3FWRN5 NFC interrupt trigger level on TM2
  arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso
  arm64: dts: exynos: correct PMIC interrupt trigger level on TM2

Link: https://lore.kernel.org/r/20210125191240.11278-4-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-26 23:13:07 +01:00
Marek Vasut
5562255b68 ARM: dts: stm32: Rename mmc controller nodes to mmc@
Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" ,
so adjust the node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: devicetree@vger.kernel.org
Acked-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25 15:23:54 +01:00
Marek Vasut
c6499becd7 ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
The DHCOM SoM uSD slot has an optional voltage level translator, add
DT bindings which permit the MMCI driver to detect the translator
automatically.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25 15:17:20 +01:00
Marek Vasut
1769b7f92a ARM: dts: stm32: Add additional init state for SDMMC1 pins
Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not
configured, so they can be claimed as GPIOs early on in driver probe().
This is used for probing optional voltage level translator.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25 15:17:20 +01:00
Arnd Bergmann
cfd7eed903 Visconti device tree updates for 5.11
- Add watchdog support for TMPV7708 SoC
 - Add entries for Toshiba Visconti5 watchdog driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEXmKe5SMhlzV7hM9DMiR/u0CtH6YFAmAOD7gACgkQMiR/u0Ct
 H6bx7g/+MXaA3BoH0QCVHp0iLf04a93JMov4fBprolPHuTiNm+iZFP5ClwNFGHig
 rLoNr0Ppjoj7YRrPvYsnam5siuVD3KF9Id3Y86vuL/mLs3F3FryX3Z0eHb0ShvQ2
 828dN5z1iY/+Qh52GUjgNn4UhAbqTSUm1YVbZ1h30YkfO+xkeZtirOveYA5aSIEh
 k94cKe0THLJNKVpLddHiOz9VOZsq3ZwPV2Y1ZDwcrRt3K5z/eCDwOG25f7SwpeUA
 DaXl++IZLqmB9wTKplgrlktDBLPSRLbUzcTHJjnVdFxQ3B+s79GZoNeTlwSC1NjL
 ck25MYSCVKxFxDckfWEnCGTi9JcwdzIUPqsL4Mtm1HWCkxzfC1sBbcMSkvWjulqr
 5xw5W4qMS4Ufa09YZrTcNMyDSFYjfH9b8wOoAkC1pcCl4qYB3r7/QqcDHtaxmrv9
 gwbfigyllFQNPbxj5ZPPjZy2Jgs70XfIGDykXB2fSTOTw91sZgbz4n61UCeqmsxk
 VuQp2oBdcIzk6vJnsTQGe3iJQsReQBEnq0X3SE9DFygWqxWv10d2aHNp2QYt9UYR
 DGIVWAapNEmnE7d3mHQxf7fdjzGa3eIxTZyzxmPkUKjUqUTzBmpN+b1fbH66gTQw
 St4QV8JSNo9FZCX14RKEpZZfYUCMgjM5oZha1qWhwmcNB1nvJe8=
 =czKg
 -----END PGP SIGNATURE-----

Merge tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti device tree updates for 5.11

- Add watchdog support for TMPV7708 SoC
- Add entries for Toshiba Visconti5 watchdog driver

* tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: dts: visconti: Add watchdog support for TMPV7708 SoC
  MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver

Link: https://lore.kernel.org/r/20210125003357.yd72y4f5vcdnvhnr@toshiba.co.jp
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-25 11:17:57 +01:00
Takeshi Saito
ee33cd6934 arm64: dts: renesas: falcon: Enable MMC
Enable MMC on the Falcon board.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: double checked, rebased, slightly improved, moved to falcon-cpu]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210125075845.3864-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Takeshi Saito
6b159d547d arm64: dts: renesas: r8a779a0: Add MMC node
Add a device node for MMC.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: double checked & rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210125075845.3864-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Linh Phung
088e6b2305 arm64: dts: renesas: r8a779a0: Add HSCIF support
Define the generic parts of the HSCIF[0-3] device nodes.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Link: https://lore.kernel.org/r/20210121110008.15894-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Wolfram Sang
9e921faa30 arm64: dts: renesas: falcon: Complete SCIF0 nodes
SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Wolfram Sang
bff4e5dac9 arm64: dts: renesas: r8a779a0: Add & update SCIF nodes
This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Wolfram Sang
e8ac55a5e7 arm64: dts: renesas: falcon: Add Ethernet-AVB0 support
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Tho Vu
5a633320f0 arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
tested because it was the only port with a PHY on current hardware.

Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[wsa: double checked, rebased, added "internal-delay" properties]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Wolfram Sang
0e6fb83ef2 arm64: dts: renesas: falcon: Add I2C0,1,6 support
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121095420.5023-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Koji Matsuoka
34c0e3e111 arm64: dts: renesas: r8a779a0: Add I2C nodes
Add I2C devicetree description to V3U

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: rebased and double checked]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121095420.5023-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:39 +01:00
Wolfram Sang
d68c9edfda arm64: dts: renesas: Disable SD functions for plain eMMC
Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Adam Ford <aford173@gmail.com> (beacon)
Link: https://lore.kernel.org/r/20210119133322.87289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 09:50:40 +01:00
Nobuhiro Iwamatsu
4fd18fc387 arm64: dts: visconti: Add watchdog support for TMPV7708 SoC
Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's
dts.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
2021-01-25 09:20:47 +09:00
Nobuhiro Iwamatsu
7b18e43d08 MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver
Add entries for Toshiba Visconti5 watchdog driver and binding.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
2021-01-25 09:20:47 +09:00
Linus Walleij
f5e4bf9060 ARM: dts: nomadik: Fix up MMC node names
Fix the node names for the MMC/SD card controller to conform
to the standard node name mmc@..

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210122222038.2888747-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 23:38:33 +01:00
Arnd Bergmann
0c09604d1e Ux500 DTS updates for the v5.12 kernel cycle:
- A new DTS file for the Samsung GT-I9070 (Janice)
 - Fix up ADC channel name attributes
 - Add charger interrupts
 - Add thermistors to the HREF boards
 - Remove the non-existing AB8505 HW ADC IRQ
 - Push down the VMMCI setting to each board
 - Add the die temperature channel to teh AB8505
 - Fix up the MMC host names to follow the standard
   naming convention
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmALOmIACgkQQRCzN7AZ
 XXMXLhAArBAoa0teToDo0DiNufdP4Tgn6cVrz10r4rLyxlLC/+ahFitd4qmv7ZMz
 H7O3caGPMp+Xi2htO59c6CYVNVj0CG58YSkYjboP0b12VDKgO04J2mzw1AsI72nR
 mJ+Qr4+KdJsIrFRSqCPEbnN23D1NoQsqUx684b5ndPieXWSs57BlystExD80QKSw
 9iFsIDl2vlQ5niR53KZDYAdggq/zJGSuu8k3TpMaVVx4DxB7+Ox/f1bOwakQWCMN
 dqzPrTNS3gE/13vKmvFn5Q/Nod6yYo7iJRlaAjMi4toHy7yGloo/FSoo7SRzCJvV
 gpKrcM02Z8Nx2a7cr661LH2b5lmNXISVGAzcnoJ5ao+9OJirQZNDDXu1SkRfmTsg
 xxSoczEqSWRaoaHx4uKC6fp519UUPdc8JT90U2KvzkisWeQjVLDK6mTvWhEdjm7v
 +YE03n4OAm6BG6lrvMQsNBYtlDLtCccOd8ybje+rdPla95Ihb6XBeSGcLo3a4JVg
 6yjk4V62RoFmkff544HwdzD5ALe7ANvyCxEnzp8HHRkHYcawzmIQQT38U/36uwNw
 bf5Wvd5dlZ9NgJFi/RwVZQEEuN2hN76on9+ew3mwpiiHveYzzuK/AuHZ1aFF8A2l
 LRSkiJPrXTb33BVf3SODdCYE3C8wSOKw3ywzB1W8cKEe9D0uf/E=
 =zDx3
 -----END PGP SIGNATURE-----

Merge tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt

Ux500 DTS updates for the v5.12 kernel cycle:

- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
  naming convention

* tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: Fix up MMC host node names
  ARM: dts: ux500: Add die temperature to AB8505
  ARM: dts: ux500: Push VMMCI down to each tree
  ARM: dts: ux500: Remove the GPADC HW IRQ
  ARM: dts: ux500: Add thermistors to the HREF
  ARM: dts: ux500: Add interrupts to charger
  ARM: dts: ux500: Fix channel names attributes
  ARM: dts: ux500: Add a device tree for Janice

Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 23:37:20 +01:00
Linus Walleij
28734f87a0 ARM: dts: Fix up MMC host node names
The standard mandates that these nodes be named
mmc@... not sdi_foo@...

Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-22 21:45:43 +01:00
Daniel Palmer
8367611892 ARM: mstar: Unify common parts of BreadBee boards into a dtsi
The BreadBee and the BreadBee Crust are the same PCB with a different
SoC mounted. There are two top level dts to handle this.

To avoid deduplicating the parts that are more related to the PCB than
the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can
be included in both top level dts.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 17:40:48 +01:00
Arnd Bergmann
8a4e89a16a AT91 DT for 5.12:
- removing a property never documented nor used
 - adding i2c recovery GPI for one more board
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEEAbEK3+sX+gUxe5RcpMrf1MU8doFAmAK5coACgkQcpMrf1MU
 8druSxAAzhEzmkWMV9ApibcL9txr8FZcZQKIoML00mnfecxbS86xrR7YOrv078jK
 lDkmxJ8NUJiYtU54q398jFeHyYQMQTcwu2q9/IwP/qC8vo+43DMR9uGZ7YiMN9j7
 ERRmuvBF6tU5Gbr8BJ6w2Zn7I7V5HhXwq2oHnxvgHLZ7jH8z1THEUZgkD87I5wzX
 oV0dEKznTaon0DsStcQMyMvnGlbsPHtYunc12hzfiMRPv961hX1mHG+yWqV/t86P
 Zw87cIrCWzkBqE9bUK0JyB/ltIXfSk/28iRI+YOHSANmvx2sE4Ulss7g6qlacds0
 g0MBRcCpteTw0ZM9wMClpsEzyWR961HAbehGakkTjmdpuEtd6fl03iAQHcEE6szN
 xP5BEd6PS6auEmXf0yBa84tDnaOJ8D+13w5u0DiapMl4Wm85Y9ecl9gvmmkNJJ/4
 mtZa5A8DkydFKBjfZwOYbzieVw2edN4rZQdRutnbXf4KuJw2phd0lV99TPSljYe1
 DpI59quMr7txnlsCpd50FxNFb2wU4HRWDUv7k6g8YmQ2WgSxWuS/pyh8JJq/pL/U
 R2ldSO2S/0CnxKi5tFN+TQWXxd2a+tnloIx7BmWsYGHazkk9A5yhrshsQMSvrzc6
 xruSunjssd15gFLtMZiIAfQDPMPKvcZkRm4PzDcUx8B37gvWm6M=
 =SfGI
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for 5.12:

- removing a property never documented nor used
- adding i2c recovery GPI for one more board

* tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
  ARM: dts: at91-sama5d27_wlsom1: add i2c recovery

Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 16:03:21 +01:00
Arnd Bergmann
7c348d8de8 SoCFPGA DTS updates for v5.12
- Add DTS file for eASIC N5X platform
 - Use generic ngpios in GPIO entries
 - Add PMU node for Arria10
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmAHgXEUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSngRAAjRY2Byuk4mxVNJPpwgq5wIaJwq2W
 rSJInz+/jflpzcTO8tFDRmZGugfJhjz4MR6w0dB7c+K7CJl3PtEm/3HIw+DopRrv
 9fDsrPG4cUmQrteCLPVNQFOnwzSYOM+AXyKiWhy8nA8Ny/wqu1lwiTw5qeh11SFK
 VZOA5nOZL2nPXDM5bUiis4W4doSNWAndDb3U+j/xrdZwGZyPCc6z5cvXzVMENkgs
 R/9tcSSvuPMLcAtiDwbJpXbHUkR+EwLWMMtOzkG/WJHmL28b24AwmqZ6oCabHtwx
 zbKHPD4O4g+PguQjtFBDn15lLPU9Yon2de89bAECohJBCdi7kLLwZRkXEW0VyNwl
 DsQagDHt1wKYijoTd5SGd5gjv9K2a/YxFuAseKOUwcLRdxNDM47aYX9lbq2PRWBs
 YVhDRuwc8gZRn5m/JZVnbCunjosVQYGTRbRr2aSE7G0czkW9VyzfaUiODvnkztGq
 Li1t2ldfYWV7Dwj7UGp1qkjX1Y6F8lR8ADioW5FuJmDa2pkNZmMM7PjWXQ0PYCWV
 cdWWLa+kZqxyfON34poHu78d4tU+QNPI6CsrSwRIewg1fME/OhQytIGNaJckKShc
 +4w07rWIDE9AMg6hKJJyp/rASVAiEWIUHzyg6Yzttt0++vMHkIaqCj9S+HKylX+n
 ewmnKGy9Xf40ssg=
 =MGbg
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.12
- Add DTS file for eASIC N5X platform
- Use generic ngpios in GPIO entries
- Add PMU node for Arria10

* tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: arria10: add PMU node
  arm64: dts: n5x: Add support for Intel's eASIC N5X platform
  arm64: dts: socfpga: Use generic "ngpios" rather than "snps,nr-gpios"

Link: https://lore.kernel.org/r/20210120012334.25730-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22 15:02:34 +01:00
Claudiu Beznea
53efdfbb3b ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
atmel,wakeup-type DT property is not referenced anywhere in the current
and previous version of the code thus remove it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nferre@kernel.org>
Link: https://lore.kernel.org/r/1609845525-10766-1-git-send-email-claudiu.beznea@microchip.com
2021-01-22 13:31:51 +01:00
Nicolas Ferre
984d4374ef ARM: dts: at91-sama5d27_wlsom1: add i2c recovery
Add the i2c gpio pinctrls to support the i2c bus recovery on this board.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20210117183558.5369-1-nicolas.ferre@microchip.com
2021-01-22 13:31:51 +01:00
Koji Matsuoka
896dd923ad arm64: dts: renesas: r8a779a0: Add MSIOF device nodes
Add device nodes for the Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210108104345.2026857-1-geert+renesas@glider.be
2021-01-18 09:50:04 +01:00
Daniel Palmer
f791f1a498 dt-bindings: vendor-prefixes: Fix misordering introduced by honestar prefix
The prefix for honestar should come before honeywell.

Fixes: 43181b5d80 ("dt-bindings: vendor-prefixes: Add honestar vendor prefix")
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/linux-arm-kernel/CAFr9PXmwOEuHHA-kDeL1YS8bWvovrt43MXxyy1J+hGbXwPUFSA@mail.gmail.com/
Link: https://lore.kernel.org/r/20201212012253.373074-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-15 18:05:28 +01:00
Arnd Bergmann
7a367cc8d6 Renesas DT binding updates for v5.12
- Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYAFQswAKCRCKwlD9ZEnx
 cCH1AQCDwQv0zeq5ppVgZGB9zDgpppfmHWjHheCC2BloilpVoQEA+SjHQp3KEYkB
 QJSxiYTwbwuy7fsfOqVU6VW/9c8xmgY=
 =bMmj
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT binding updates for v5.12

  - Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.

* tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: arm: renesas: Add Beacon RZ/G2N and RZ/G2H boards

Link: https://lore.kernel.org/r/20210115094610.2334058-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-15 17:40:51 +01:00
Arnd Bergmann
2555a61090 Renesas ARM DT updates for v5.12
- Timer (CMT/TMU) support for R-Car Gen3 SoCs,
   - Watchdog (RWDT), pincontrol (PFC), GPIO, and DMA (SYS-DMAC) support
     for the R-Car V3U SoC,
   - USB2 clock selector and SPI Multi I/O Bus Controller (RPC-IF)
     support for RZ/G2 SoCs,
   - Support for the Beacon EmbeddedWorks RZ/G2H and RZ/G2N kits,
   - Various fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYAFTAQAKCRCKwlD9ZEnx
 cDMqAP9naqSzYAzuHx+Piv3tmJGFuFUyD4p6znNwdScmywCSqQEA5W8/F51GCcHh
 aCN4fMvP5AqVNLTuCfcEz3PWevkhagU=
 =IfGy
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.12

  - Timer (CMT/TMU) support for R-Car Gen3 SoCs,
  - Watchdog (RWDT), pincontrol (PFC), GPIO, and DMA (SYS-DMAC) support
    for the R-Car V3U SoC,
  - USB2 clock selector and SPI Multi I/O Bus Controller (RPC-IF)
    support for RZ/G2 SoCs,
  - Support for the Beacon EmbeddedWorks RZ/G2H and RZ/G2N kits,
  - Various fixes and improvements.

* tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
  arm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes
  arm64: dts: renesas: r8a779a0: Add GPIO nodes
  arm64: dts: renesas: r8a779a0: Add pinctrl device node
  arm64: dts: renesas: rzg2: Add RPC-IF Support
  arm64: dts: renesas: rzg2: Add usb2_clksel to RZ/G2 M/N/H
  arm64: dts: renesas: r8a774e1: Introduce beacon-rzg2h-kit
  arm64: dts: renesas: r8a774b1: Introduce beacon-rzg2n-kit
  arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions
  arm64: dts: renesas: beacon: Better describe keys
  arm64: dts: renesas: beacon: Configure Audio CODEC clocks
  arm64: dts: renesas: beacon kit: Fix Audio Clock sources
  arm64: dts: renesas: beacon: Configure programmable clocks
  arm64: dts: renesas: falcon: Enable watchdog timer
  arm64: dts: renesas: r8a779a0: Add RWDT node
  arm64: dts: renesas: beacon: Correct I2C bus speeds
  arm64: dts: renesas: beacon: Enable SPI
  arm64: dts: renesas: beacon: Don't make vccq_sdhi0 always on
  arm64: dts: renesas: beacon: Fix RGB Display PWM Backlight
  arm64: dts: renesas: beacon: Fix LVDS PWM Backlight
  arm64: dts: renesas: beacon: Fix audio-1.8V pin enable
  ...

Link: https://lore.kernel.org/r/20210115094610.2334058-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-15 16:39:47 +01:00
Marek Vasut
8ba396551d ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
The PicoITX has only one ethernet routed out, so the KS8851 is not used
at all. Disable the KS8851 and the entire FMC controller.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-14 18:38:27 +01:00
Alexander Dahl
2f9c3506b5 ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
The node names for devices using the pwm-leds driver follow a certain
naming scheme (now).  Parent node name is not enforced, but recommended
by DT project.

  DTC     arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
  CHECK   arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
/home/alex/build/linux/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml: led-rgb: 'led-blue', 'led-green', 'led-red' do not match any of the regexes: '^led(-[0-9a-f]+)?$', 'pinctrl-[0-9]+'
        From schema: /home/alex/src/linux/leds/Documentation/devicetree/bindings/leds/leds-pwm.yaml

Signed-off-by: Alexander Dahl <post@lespocky.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-14 18:38:27 +01:00
Marek Vasut
32d4878b26 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-14 18:38:27 +01:00
Marek Vasut
7cd8567d98 ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-14 18:38:27 +01:00