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1,169,205 commits

Author SHA1 Message Date
Viorel Suman
c7b3c05309 arm64: dts: freescale: imx8: Fix the system-controller node name
The proper name is 'system-controller', not 'scu'.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:37:08 +08:00
Viorel Suman
6003913ac7 arm64: dts: freescale: imx8qxp: Fix the ocotp node name
The proper name is 'ocotp', not 'imx8qx-ocotp'.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:37:06 +08:00
Abel Vesa
b64aebbe79 arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller
Both i.MX8QM and i.MX8DXL use the fallback fsl,scu-clk compatible.
They rely on the same driver generic part as the i.MX8QXP, so
lets add it to i.MX8QXP too, for consitency.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:37:03 +08:00
Abel Vesa
b3993c7adf arm64: dts: freescale: imx8: Fix power controller name
The proper name is power-controller, not imx8qx-pd.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:37:01 +08:00
Viorel Suman
78cba06629 arm64: dts: freescale: imx8qxp: Remove unnecessary clock related entries
XTAL clocks are not exposed by SCU to OS via OS<->SCU communication protocol,
so remove unnecessary entries.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:36:50 +08:00
Abel Vesa
06d6022353 dt-bindings: firmware: Add fsl,scu yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch adds the
fsl,scu.yaml in the firmware bindings folder. This one is only for
the main SCU node. The old txt file will be removed only after all
the child nodes have been properly switch to yaml.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:29 +08:00
Abel Vesa
3115888c97 dt-bindings: watchdog: Add fsl,scu-wdt yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'watchdog' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:26 +08:00
Abel Vesa
636ad31bd2 dt-bindings: thermal: Add fsl,scu-thermal yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'thermal' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:24 +08:00
Abel Vesa
df4381bff7 dt-bindings: rtc: Add fsl,scu-rtc yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'rtc' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:21 +08:00
Abel Vesa
e46902e16f dt-bindings: power: Add fsl,scu-pd yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'power controller' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:19 +08:00
Abel Vesa
470d96c850 dt-bindings: nvmem: Add fsl,scu-ocotp yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'ocotp' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:16 +08:00
Abel Vesa
92dae33a4d dt-bindings: input: Add fsl,scu-key yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'keys' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:14 +08:00
Abel Vesa
aeb871d679 dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'iomux/pinctrl' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:35:11 +08:00
Abel Vesa
9056aa0451 dt-bindings: clk: imx: Add fsl,scu-clk yaml file
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'clock' child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:34:58 +08:00
Michael Walle
86c43ea071 ARM: dts: kswitch-d10: use open drain mode for coma-mode pins
The driver use the coma-mode pins as open-drain. Flag them in the device
tree accordingly. This avoids the following error:
[   14.114180] gpio-2007 (coma-mode): enforced open drain please flag it properly in DT/ACPI DSDT/board file

Fixes: 46a9556d97 ("ARM: dts: kswitch-d10: enable networking")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704150808.1104295-1-michael@walle.cc
2022-07-08 11:31:53 +03:00
Thierry Reding
5060237b0e memory: tegra: Add MGBE memory clients for Tegra234
Tegra234 has multiple network interfaces with each their own memory
clients and stream IDs to allow for proper isolation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:29:40 +02:00
Thierry Reding
8c2261e9f0 Merge branch 'for-5.20/dt-bindings' into for-5.20/memory 2022-07-08 10:29:20 +02:00
AngeloGioacchino Del Regno
4d3ddc9bce soc: mediatek: mutex: Simplify with devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

While at it, also remove a redundant call to of_address_to_resource(),
as this was getting the address of the same resource index 0: we can
as well get the iostart from the 'regs' pointer.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220623121701.107512-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08 10:29:17 +02:00
AngeloGioacchino Del Regno
2b5764fb7b soc: mediatek: pm-domains: Add support for Helio X10 MT6795
Add pm-domains (mtcmos) data for MediaTek Helio X10 MT6795 SoC.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220503141441.125852-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08 10:26:30 +02:00
AngeloGioacchino Del Regno
2b48db01a0 dt-bindings: power: Add MediaTek Helio X10 MT6795 power domains
Add power domains dt-bindings for MediaTek Helio X10 (MT6795).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503141441.125852-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-08 10:26:30 +02:00
Sumit Gupta
68ce0053f0 dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
Add device-tree binding documentation to represent the Control Backbone
(CBB) version 2.0 used on Tegra234 SoCs.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:21:02 +02:00
Sumit Gupta
3bf80f8d4f dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
Add device-tree binding documentation to represent the AXI2APB bridges
used by Control Backbone (CBB) 1.0 on Tegra194 SoCs. All errors for APB
slaves are reported as slave error because APB bas single bit to report
error. So, CBB driver needs to further check error status registers of
all the AXI2APB bridges to find error type.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:21:01 +02:00
Sumit Gupta
476111be5f dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
Add device-tree binding documentation to represent the Control Backbone
(CBB) version 1.0 used on Tegra194 SoCs.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:21:01 +02:00
Thierry Reding
833f5a7eb2 dt-bindings: memory: Add Tegra234 MGBE memory clients
Add the memory client and stream ID definitions for the MGBE hardware
found on Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding
b0aedf342b dt-bindings: Add Tegra234 MGBE clocks and resets
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Thierry Reding
5de7d31b50 dt-bindings: power: Add Tegra234 MGBE power domains
Add power domain IDs for the four MGBE power partitions found on
Tegra234.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-07-08 10:20:59 +02:00
Peng Fan
d4ac6028b9 arm64: dts: imx8mp: add NoC node
Add i.MX8MP NoC node to make the interconnect i.MX8MP driver could work.
Currently dynamic frequency scaling of the i.MX8MP NoC has not been
supported, only NoC initial settings are configured by interconnect
driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Georgi Djakov <djakov@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:20:47 +08:00
Max Krummenacher
6177a50fd3 ARM: dts: colibri-imx6ull: fix snvs pinmux group
A pin controlled by the iomuxc-snvs pin controller must be
specified under the dtb's iomuxc-snvs node.

Move the one and only pin of that category from the iomuxc node
and set the pinctrl-0 using it accordingly.

Fixes: 2aa9d62019 ("ARM: dts: imx6ull-colibri: add touchscreen device nodes")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08 16:12:48 +08:00
Yang Yingliang
d4fac258d9 optee: smc_abi.c: fix wrong pointer passed to IS_ERR/PTR_ERR()
In optee_smc_do_call_with_arg() there is a code path when the argument
struct for RPC is passed appended to the primary argument struct. When
the address of the RPC struct is retrieved there's an invalid check for
success. It should be 'rpc_arg' pass to IS_ERR/PTR_ERR().

Fixes: ed8faf6c8f ("optee: add OPTEE_SMC_CALL_WITH_RPC_ARG and OPTEE_SMC_CALL_WITH_REGD_ARG")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
[jw: added background to the problem]
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2022-07-08 09:56:38 +02:00
Samuel Holland
9167fd5d55 PCI: hv: Take a const cpumask in hv_compose_msi_req_get_cpu()
The cpumask that is passed to this function ultimately comes from
irq_data_get_effective_affinity_mask(), which was recently changed to
return a const cpumask pointer. The first level of functions handling
the affinity mask were updated, but not this helper function.

Fixes: 4d0b829881 ("genirq: Return a const cpumask from irq_data_get_affinity_mask")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220708004931.1672-1-samuel@sholland.org
2022-07-08 08:44:15 +01:00
Arnd Bergmann
d67fe5e3b2 arm64: dts: ZynqMP DT changes for v5.20
- Extend gpio-zynq DT binding (compatible, power-domains, gpio-line-names)
 - Fix sm-k26 gpio comment
 - Wire AMS device
 - Align gpio-keys node names with dtschema
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Merge tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/dt

arm64: dts: ZynqMP DT changes for v5.20

- Extend gpio-zynq DT binding (compatible, power-domains, gpio-line-names)
- Fix sm-k26 gpio comment
- Wire AMS device
- Align gpio-keys node names with dtschema

* tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
  arm64: dts: xilinx: align gpio-key node names with dtschema
  arm64: dts: zynqmp: add AMS driver to device tree
  dt-bindings: gpio: zynq: Describe gpio-line-names
  arm64: zynqmp: Fix comment about number of gpio line names
  dt-bindings: gpio: zynq: Add power-domains
  dt-bindings: gpio: zynq: Add missing compatible strings

Link: https://lore.kernel.org/r/452e8c68-b63b-f4f6-a937-67f65c64a8a0@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:40:31 +02:00
Arnd Bergmann
30a32ee55f ARM: Zynq DT changes for v5.20
- Align gpio-keys node names with dtschema
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Merge tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/dt

ARM: Zynq DT changes for v5.20

- Align gpio-keys node names with dtschema

* tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
  ARM: dts: xilinx: align gpio-key node names with dtschema

Link: https://lore.kernel.org/r/87d2bd4a-b90d-6396-17c5-c95ac64d17d0@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:38:52 +02:00
Joerg Roedel
c51b8f85c4 MAINTAINERS: Remove iommu@lists.linux-foundation.org
The IOMMU mailing list has moved to iommu@lists.linux.dev
and the old list should bounce by now. Remove it from the
MAINTAINERS file.

Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Link: https://lore.kernel.org/r/20220706103331.10215-1-joro@8bytes.org
2022-07-08 09:34:26 +02:00
Ignat Korchagin
79e6e2f3f3 crypto: testmgr - populate RSA CRT parameters in RSA test vectors
Changes from v1:
  * replace some accidental spaces with tabs

In commit f145d411a6 ("crypto: rsa - implement Chinese Remainder Theorem
for faster private key operations") we have started to use the additional
primes and coefficients for RSA private key operations. However, these
additional parameters are not present (defined as 0 integers) in the RSA
test vectors.

Some parameters were borrowed from OpenSSL, so I was able to find the
source. I could not find the public source for 1 vector though, so had to
recover the parameters by implementing Appendix C from [1].

[1]: https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-56Br1.pdf

Fixes: f145d411a6 ("crypto: rsa - implement Chinese Remainder Theorem for faster private key operations")
Reported-by: Tasmiya Nalatwad <tasmiya@linux.vnet.ibm.com>
Signed-off-by: Ignat Korchagin <ignat@cloudflare.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:17 +08:00
Ofer Heifetz
932be3e95b crypto: inside-secure - fix packed bit-field result descriptor
When mixing bit-field and none bit-filed in packed struct the
none bit-field starts at a distinct memory location, thus adding
an additional byte to the overall structure which is used in
memory zero-ing and other configuration calculations.

Fix this by removing the none bit-field that has a following
bit-field.

Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Acked-by: Antoine Tenart <atenart@kernel.org>
Acked-by: Antoine Tenart <atenart@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:17 +08:00
Zhengchao Shao
68740ab505 crypto: hisilicon - Kunpeng916 crypto driver don't sleep when in softirq
When kunpeng916 encryption driver is used to deencrypt and decrypt
packets during the softirq, it is not allowed to use mutex lock.

Fixes: 915e4e8413 ("crypto: hisilicon - SEC security accelerator driver")
Signed-off-by: Zhengchao Shao <shaozhengchao@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:16 +08:00
Zhengchao Shao
02884a4f12 crypto: hisilicon/sec - don't sleep when in softirq
When kunpeng920 encryption driver is used to deencrypt and decrypt
packets during the softirq, it is not allowed to use mutex lock. The
kernel will report the following error:

BUG: scheduling while atomic: swapper/57/0/0x00000300
Call trace:
dump_backtrace+0x0/0x1e4
show_stack+0x20/0x2c
dump_stack+0xd8/0x140
__schedule_bug+0x68/0x80
__schedule+0x728/0x840
schedule+0x50/0xe0
schedule_preempt_disabled+0x18/0x24
__mutex_lock.constprop.0+0x594/0x5dc
__mutex_lock_slowpath+0x1c/0x30
mutex_lock+0x50/0x60
sec_request_init+0x8c/0x1a0 [hisi_sec2]
sec_process+0x28/0x1ac [hisi_sec2]
sec_skcipher_crypto+0xf4/0x1d4 [hisi_sec2]
sec_skcipher_encrypt+0x1c/0x30 [hisi_sec2]
crypto_skcipher_encrypt+0x2c/0x40
crypto_authenc_encrypt+0xc8/0xfc [authenc]
crypto_aead_encrypt+0x2c/0x40
echainiv_encrypt+0x144/0x1a0 [echainiv]
crypto_aead_encrypt+0x2c/0x40
esp_output_tail+0x348/0x5c0 [esp4]
esp_output+0x120/0x19c [esp4]
xfrm_output_one+0x25c/0x4d4
xfrm_output_resume+0x6c/0x1fc
xfrm_output+0xac/0x3c0
xfrm4_output+0x64/0x130
ip_build_and_send_pkt+0x158/0x20c
tcp_v4_send_synack+0xdc/0x1f0
tcp_conn_request+0x7d0/0x994
tcp_v4_conn_request+0x58/0x6c
tcp_v6_conn_request+0xf0/0x100
tcp_rcv_state_process+0x1cc/0xd60
tcp_v4_do_rcv+0x10c/0x250
tcp_v4_rcv+0xfc4/0x10a4
ip_protocol_deliver_rcu+0xf4/0x200
ip_local_deliver_finish+0x58/0x70
ip_local_deliver+0x68/0x120
ip_sublist_rcv_finish+0x70/0x94
ip_list_rcv_finish.constprop.0+0x17c/0x1d0
ip_sublist_rcv+0x40/0xb0
ip_list_rcv+0x140/0x1dc
__netif_receive_skb_list_core+0x154/0x28c
__netif_receive_skb_list+0x120/0x1a0
netif_receive_skb_list_internal+0xe4/0x1f0
napi_complete_done+0x70/0x1f0
gro_cell_poll+0x9c/0xb0
napi_poll+0xcc/0x264
net_rx_action+0xd4/0x21c
__do_softirq+0x130/0x358
irq_exit+0x11c/0x13c
__handle_domain_irq+0x88/0xf0
gic_handle_irq+0x78/0x2c0
el1_irq+0xb8/0x140
arch_cpu_idle+0x18/0x40
default_idle_call+0x5c/0x1c0
cpuidle_idle_call+0x174/0x1b0
do_idle+0xc8/0x160
cpu_startup_entry+0x30/0x11c
secondary_start_kernel+0x158/0x1e4
softirq: huh, entered softirq 3 NET_RX 0000000093774ee4 with
preempt_count 00000100, exited with fffffe00?

Fixes: 416d82204d ("crypto: hisilicon - add HiSilicon SEC V2 driver")
Signed-off-by: Zhengchao Shao <shaozhengchao@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:16 +08:00
Jianglei Nie
32c0f7d419 crypto: hisilicon/sec - fix inconsistent argument
The argument passed to sec_queue_aw_alloc() should be
SEC_QUEUE_AW_FROCE_NOALLOC instead of SEC_QUEUE_AR_FROCE_NOALLOC.

Signed-off-by: Jianglei Nie <niejianglei2021@163.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:16 +08:00
Liang He
8ccc9cc47c crypto: nx - Hold the reference returned by of_find_compatible_node
In nx842_pseries_init(), we should hold the reference returned by
of_find_compatible_node() and use it to call of_node_put to keep
refcount balance.

Signed-off-by: Liang He <windhl@126.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:16 +08:00
Liang He
9984a64473 crypto: amcc - Hold the reference returned by of_find_compatible_node
In crypto4xx_probe(), we should hold the reference returned by
of_find_compatible_node() and use it to call of_node_put to keep
 refcount balance.

Signed-off-by: Liang He <windhl@126.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:16 +08:00
Herbert Xu
cc8166bfc8 crypto: vmx - Fix warning on p8_ghash_alg
The compiler complains that p8_ghash_alg isn't declared which is
because the header file aesp8-ppc.h isn't included in ghash.c.
This patch fixes the warning.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Acked-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:21:15 +08:00
Giovanni Cabiddu
d4cfb144f6 crypto: qat - expose device config through sysfs for 4xxx
qat_4xxx devices can be configured to allow either crypto or compression
operations. At the moment, devices are configured statically according to
the following rule:
- odd numbered devices assigned to compression services
- even numbered devices assigned to crypto services

Expose the sysfs attribute /sys/bus/pci/devices/<BDF>/qat/cfg_services
to allow to detect the configuration of a device and to change it.

The `cfg_service` attribute is only exposed for qat_4xxx devices and it
is limited to two configurations: (1) "sym;asym" for crypto services and
"dc" for compression services.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Co-developed-by: Tomasz Kowallik <tomaszx.kowalik@intel.com>
Signed-off-by: Tomasz Kowallik <tomaszx.kowalik@intel.com>
Reviewed-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Vladis Dronov <vdronov@redhat.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:15:59 +08:00
Giovanni Cabiddu
16c1ed95d1 crypto: qat - relocate and rename adf_sriov_prepare_restart()
The function adf_sriov_prepare_restart() is used in adf_sriov.c to stop
and shutdown a device preserving its configuration.

Since this function will be re-used by the logic that allows to
reconfigure the device through sysfs, move it to adf_init.c and rename
it as adf_dev_shutdown_cache_cfg();

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Vladis Dronov <vdronov@redhat.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:15:59 +08:00
Giovanni Cabiddu
92bf269fbf crypto: qat - change behaviour of adf_cfg_add_key_value_param()
The function adf_cfg_add_key_value_param() allows to insert duplicates
entries in the key value store of the driver.

Change the behaviour of that function to the following policy:
- if the key doesn't exist, add it;
- if the key already exists with a different value, then delete it and
  replace it with a new one containing the new value;
- if the key exists with the same value, then return without doing
  anything.

The behaviour of this function has been changed in order to easily
update key-values in the driver database. In particular this is required
to update the value of the ServiceEnables key used to change the service
loaded on a device.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Vladis Dronov <vdronov@redhat.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:15:59 +08:00
Giovanni Cabiddu
5ee52118ac crypto: qat - expose device state through sysfs for 4xxx
Expose the device state through an attribute in sysfs and allow to
change it. This is to stop and shutdown a QAT device in order to change
its configuration.

The state attribute has been added to a newly created `qat` attribute
group which will contain all _QAT specific_ attributes.

The logic that implements the sysfs entries is part of a new file,
adf_sysfs.c. This exposes an entry point to allow the driver to create
attributes.

The function that creates the sysfs attributes is called from the probe
function of the driver and not in the state machine init function to
allow the change of states even if the device is in the down state.

In order to restore the device configuration between a transition from
down to up, the function that configures the devices has been abstracted
into the HW data structure.

The `state` attribute is only exposed for qat_4xxx devices.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Co-developed-by: Tomasz Kowallik <tomaszx.kowalik@intel.com>
Signed-off-by: Tomasz Kowallik <tomaszx.kowalik@intel.com>
Reviewed-by: Adam Guerin <adam.guerin@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Vladis Dronov <vdronov@redhat.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2022-07-08 15:15:59 +08:00
Arnd Bergmann
a2668c1500 ARM: Zynq SoC changes for v5.20
- Fix refcount leak in zynq_get_revision()
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Merge tag 'zynq-soc-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/soc

ARM: Zynq SoC changes for v5.20

- Fix refcount leak in zynq_get_revision()

* tag 'zynq-soc-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
  cpufreq: zynq: Fix refcount leak in zynq_get_revision

Link: https://lore.kernel.org/r/e1d0a721-afa4-93a0-7119-0e4481a0624b@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:13:24 +02:00
Arnd Bergmann
8fcdf10295 arm64: ZynqMP SoC changes for v5.20
- Register SGI separately out of EEMI
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Merge tag 'zynqmp-soc-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/soc

arm64: ZynqMP SoC changes for v5.20

- Register SGI separately out of EEMI

* tag 'zynqmp-soc-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
  firmware: xilinx: Add TF_A_PM_REGISTER_SGI SMC call

Link: https://lore.kernel.org/r/0196d1f3-e9c7-ef51-143d-e98b14980f63@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:11:25 +02:00
Arnd Bergmann
a902fa8ecc Reset controller fixes for v5.19
Fix the MAINTAINERS entry for the Synopsys AXS10x reset controller
 driver, which still points to a nonexistent .txt file after the device
 tree binding .yaml conversion.
 Also, fix the devm_reset_control_bulk_get_optional_exclusive() call,
 which was defective since its introduction due to a copy & paste error.
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Merge tag 'reset-fixes-for-v5.19' of git://git.pengutronix.de/pza/linux into arm/fixes

Reset controller fixes for v5.19

Fix the MAINTAINERS entry for the Synopsys AXS10x reset controller
driver, which still points to a nonexistent .txt file after the device
tree binding .yaml conversion.
Also, fix the devm_reset_control_bulk_get_optional_exclusive() call,
which was defective since its introduction due to a copy & paste error.

* tag 'reset-fixes-for-v5.19' of git://git.pengutronix.de/pza/linux:
  reset: Fix devm bulk optional exclusive control getter
  MAINTAINERS: rectify entry for SYNOPSYS AXS10x RESET CONTROLLER DRIVER

Link: https://lore.kernel.org/r/20220707101344.3329314-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:10:27 +02:00
Conor Dooley
2058dc831f
MAINTAINERS: add polarfire rng, pci and clock drivers
Hardware random, PCI and clock drivers for the PolarFire SoC have been
upstreamed but are not covered by the MAINTAINERS entry, so add them.
Daire is the author of the clock & PCI drivers, so add him as a
maintainer in place of Lewis.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220707142041.4096246-1-conor.dooley@microchip.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-08 09:09:46 +02:00
Heiko Stuebner
dc5cb7a833
riscv: don't warn for sifive erratas in modules
The SiFive errata code contains code checking applicable erratas
vs. actually applied erratas to suggest missing erratas to the
user when their Kconfig options are not enabled.

In the main kernel image one can be quite sure that all available
erratas appear at least once, so that check will succeed.
On the other hand modules can very well not use any errata-relevant
code, so the newly added module-alternative support may also patch
the module code, but not touch SiFive-specific erratas at all.

So to restore the original behaviour don't warn when patching
modules. This will keep the warning if necessary for the main kernel
image but prevent spurious warnings for modules.

Of course having such a vendor-specific warning may not be needed at
all, as CONFIG_ERRATA_SIFIVE is selected by CONFIG_SOC_SIFIVE and the
individual erratas are default-y so disabling them requires
deliberate action anyway. But for now just restore the old behaviour.

Fixes: a8e910168b ("riscv: implement module alternatives")
Reported-by: Ron Economos <re@w6rz.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Ron Economos <re@w6rz.net>
Link: https://lore.kernel.org/r/20220608120849.1695191-1-heiko@sntech.de
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-07 23:09:16 -07:00