When TLB flush hypercalls (HVCALL_FLUSH_VIRTUAL_ADDRESS_{LIST,SPACE}_EX are
issued in 'XMM fast' mode, the maximum number of allowed sparse_banks is
not 'HV_HYPERCALL_MAX_XMM_REGISTERS - 1' (5) but twice as many (10) as each
XMM register is 128 bit long and can hold two 64 bit long banks.
Cc: stable@vger.kernel.org # 5.14.x
Fixes: 5974565bc2 ("KVM: x86: kvm_hv_flush_tlb use inputs from XMM registers")
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220222154642.684285-4-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
'struct kvm_hv_hcall' has all the required information already,
there's no need to pass 'ex' additionally.
No functional change intended.
Cc: stable@vger.kernel.org # 5.14.x
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220222154642.684285-3-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
'struct kvm_hv_hcall' has all the required information already,
there's no need to pass 'ex' additionally.
No functional change intended.
Cc: stable@vger.kernel.org # 5.14.x
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220222154642.684285-2-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
sc7180 blow fuses got slightly chances to hit qfprom_reg_write timeout.
Current timeout is simply too low. Since blowing fuses is a
very rare operation, so the risk associated with overestimating this
number is low.
Increase fuse blow timeout from 1ms to 10ms.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Knox Chiou <knoxchiou@chromium.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220223223502.29454-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Steffen Klassert says:
====================
1) Fix PMTU for IPv6 if the reported MTU minus the ESP overhead is
smaller than 1280. From Jiri Bohac.
2) Fix xfrm interface ID and inter address family tunneling when
migrating xfrm states. From Yan Yan.
3) Add missing xfrm intrerface ID initialization on xfrmi_changelink.
From Antony Antony.
4) Enforce validity of xfrm offload input flags so that userspace can't
send undefined flags to the offload driver.
From Leon Romanovsky.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
If I'm not mistaken (and I don't think I am), the way in which the
dcbnl_ops work is that drivers call dcb_ieee_setapp() and this populates
the application table with dynamically allocated struct dcb_app_type
entries that are kept in the module-global dcb_app_list.
However, nobody keeps exact track of these entries, and although
dcb_ieee_delapp() is supposed to remove them, nobody does so when the
interface goes away (example: driver unbinds from device). So the
dcb_app_list will contain lingering entries with an ifindex that no
longer matches any device in dcb_app_lookup().
Reclaim the lost memory by listening for the NETDEV_UNREGISTER event and
flushing the app table entries of interfaces that are now gone.
In fact something like this used to be done as part of the initial
commit (blamed below), but it was done in dcbnl_exit() -> dcb_flushapp(),
essentially at module_exit time. That became dead code after commit
7a6b6f515f ("DCB: fix kconfig option") which essentially merged
"tristate config DCB" and "bool config DCBNL" into a single "bool config
DCB", so net/dcb/dcbnl.c could not be built as a module anymore.
Commit 36b9ad8084 ("net/dcb: make dcbnl.c explicitly non-modular")
recognized this and deleted dcbnl_exit() and dcb_flushapp() altogether,
leaving us with the version we have today.
Since flushing application table entries can and should be done as soon
as the netdevice disappears, fundamentally the commit that is to blame
is the one that introduced the design of this API.
Fixes: 9ab933ab2c ("dcbnl: add appliction tlv handlers")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There's a potential leak issue under following execution sequence :
smc_release smc_connect_work
if (sk->sk_state == SMC_INIT)
send_clc_confirim
tcp_abort();
...
sk.sk_state = SMC_ACTIVE
smc_close_active
switch(sk->sk_state) {
...
case SMC_ACTIVE:
smc_close_final()
// then wait peer closed
Unfortunately, tcp_abort() may discard CLC CONFIRM messages that are
still in the tcp send buffer, in which case our connection token cannot
be delivered to the server side, which means that we cannot get a
passive close message at all. Therefore, it is impossible for the to be
disconnected at all.
This patch tries a very simple way to avoid this issue, once the state
has changed to SMC_ACTIVE after tcp_abort(), we can actively abort the
smc connection, considering that the state is SMC_INIT before
tcp_abort(), abandoning the complete disconnection process should not
cause too much problem.
In fact, this problem may exist as long as the CLC CONFIRM message is
not received by the server. Whether a timer should be added after
smc_close_final() needs to be discussed in the future. But even so, this
patch provides a faster release for connection in above case, it should
also be valuable.
Fixes: 39f41f367b ("net/smc: common release code for non-accepted sockets")
Signed-off-by: D. Wythe <alibuda@linux.alibaba.com>
Acked-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
In this driver's ->ndo_open() callback, it enables DMA interrupts,
starts the DMA channels, then requests interrupts with request_irq(),
and then finally enables napi.
If RX DMA interrupts are received before napi is enabled, no processing
is done because napi_schedule_prep() will return false. If the network
has a lot of broadcast/multicast traffic, then the RX ring could fill up
completely before napi is enabled. When this happens, no further RX
interrupts will be delivered, and the driver will fail to receive any
packets.
Fix this by only enabling DMA interrupts after all other initialization
is complete.
Fixes: 523f11b5d4 ("net: stmmac: move hardware setup for stmmac_open to new function")
Reported-by: Lars Persson <larper@axis.com>
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This change adds a new OpenFlow field OFPXMT_OFB_IPV6_EXTHDR and
packets can be filtered using ipv6_ext flag.
Signed-off-by: Toms Atteka <cpp.code.lv@gmail.com>
Acked-by: Pravin B Shelar <pshelar@ovn.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Set regulator voltages for standby state to avoid wrong behavior of
system while in standby. The CPU voltage has been chosen as being the
one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP
as the suspend OPP.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-8-claudiu.beznea@microchip.com
Fix low limit for CPU regulator. Otherwise setting voltages lower than
1.125V will not be allowed (CPUFreq will not be allowed to set proper
voltages on proper frequencies).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-7-claudiu.beznea@microchip.com
Add support for all the six CAN controllers of sama7g5.The internal SRAM of 128KB
is split among the CAN controllers for the message RAM elements leaving a small
portion reserved for power management. The SRAM split up is as below.
Lower 64K:
PM 13K
can-0 17K
can-1 17K
can-2 17K
Higher 64K:
can-3 17K
can-4 17K
can-5 17K
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-2-Hari.PrasathGE@microchip.com
Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
extra run-time self tests of the registered crypto algorithms.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com
Christoph Hellwig and a few others spent a huge effort on removing
set_fs() from most of the important architectures, but about half the
other architectures were never completed even though most of them don't
actually use set_fs() at all.
I did a patch for microblaze at some point, which turned out to be fairly
generic, and now ported it to most other architectures, using new generic
implementations of access_ok() and __{get,put}_kernel_nocheck().
Three architectures (sparc64, ia64, and sh) needed some extra work,
which I also completed.
* 'set_fs-4' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
uaccess: remove CONFIG_SET_FS
ia64: remove CONFIG_SET_FS support
sh: remove CONFIG_SET_FS support
sparc64: remove CONFIG_SET_FS support
lib/test_lockup: fix kernel pointer check for separate address spaces
uaccess: generalize access_ok()
uaccess: fix type mismatch warnings from access_ok()
arm64: simplify access_ok()
m68k: fix access_ok for coldfire
MIPS: use simpler access_ok()
MIPS: Handle address errors for accesses above CPU max virtual user address
uaccess: add generic __{get,put}_kernel_nofault
nios2: drop access_ok() check from __put_user()
x86: use more conventional access_ok() definition
x86: remove __range_not_ok()
sparc64: add __{get,put}_kernel_nofault()
nds32: fix access_ok() checks in get/put_user
uaccess: fix nios2 and microblaze get_user_8()
uaccess: fix integer overflow on access_ok()
Fixes for devkit8000 timer regression. Similar to the earlier beagleboard
fixes, we must not configure the clocksource drivers to use an alternative
timer configuration. It causes unnecessary issues with power management.
Only some old designs based on early beagleboard revisions with a miswired
timer need to use the alternative timer.
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Merge tag 'omap-for-v5.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps
Fixes for devkit8000 timer regression. Similar to the earlier beagleboard
fixes, we must not configure the clocksource drivers to use an alternative
timer configuration. It causes unnecessary issues with power management.
Only some old designs based on early beagleboard revisions with a miswired
timer need to use the alternative timer.
* tag 'omap-for-v5.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Use 32KiHz oscillator on devkit8000
ARM: dts: switch timer config to common devkit8000 devicetree
Link: https://lore.kernel.org/r/pull-1645606483-876944@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP151 is a single A7.
STM32MP153/157 is a dual A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Remove the following warnings seen when building with W=1.
Warning (unique_unit_address): /soc/timer@40000c00: duplicate unit-address
(also used in node /soc/timers@40000c00)
This approach is based on some discussions[1], to restructure the dtsi
and dts files.
Timer5 is enabled by default on stm32f7 series, to act as clockevent. In
order to get rid of the W=1 warning, and be compliant with dt-schemas
(e.g. dtbs_check):
- In stm32f746.dtsi:
. Keep the more complete timers5 description
. Remove the most simple timer5 node that is duplicate
- In each board:
. adopt "st,stm32-timer" compatible for timers5, also add the interrupt
. use /delete-property/ and /delete-node/ so the it matches the
clockevent bindings
Note: all this is done in one shot (e.g. not split) to keep clockevent
functionality.
[1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Several unused "timer" are duplicate nodes of "timers" nodes.
There are two dt-schemas:
- timer/st,stm32-timer.yaml: A timer is needed on STM32F7 series, on all
boards, to act as clockevent.
- mfd/st,stm32-timers.yaml: Timers can be used for other purpose.
By default, timer5 is left enabled to be used as clockevent. Remove all
other timer clockevent nodes that are currently unused and duplicated.
This removes several messages: Warning (unique_unit_address): /soc/timer@..
duplicate unit-address (also used in node /soc/timers@...)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
As EXTI/GIC mapping has changed between STM32MP15 and STM32MP13, a new
compatible is needed to choose mp13 mapping table in stm32-exti driver.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcor-avenger96 board device
tree to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcom-som board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-picoitx
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 DMA property in stm32mp15xx-dhcom-pdk2 board
device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-drc02
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-odyssey board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-lxa-mc1 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-stinger96 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0-of7 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-iot-box board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-edimm2.2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-ctouch2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dkx board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Delete also uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-ed1 board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add DMA configuration in stm32mp15x uart nodes by selecting dma direct
mode and alternate REQ/ACK dma protocol for uart.
DMA direct mode allows to bypass DMA FIFO. Each DMA request immediately
initiates a transfer from/to the memory. This allows USART to get data
transferred, even when the transfer ends before the DMA FIFO completion.
Default REQ/ACK DMA protocol consists in maintaining ACK signal up to the
removal of REQuest and the transfer completion.
In case of alternative REQ/ACK protocol, ACK de-assertion does not wait the
removal of the REQuest, but only the transfer completion.
Due to a possible DMA stream lock when transferring data to/from STM32
USART/UART, select this alternative protocol in STM32 USART/UART nodes.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link between GIC and exti line is now done inside EXTI driver. So in order
to be wake up source exti irqchip has to be used.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add reserved memory nodes for CortexM4 on the STM32MP1 DHCOR SoM, enable
rproc to control the CM4 and IPCC mailbox to interact with it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
MDMA on STM32MP13x SoCs is the same than on STM32MP15x SoCs: it offers up
to 32 channels and supports 48 requests.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA1 and DMA2 on STM32MP13x SoCs are the same than on STM32MP15x SoCs: they
offer up to 8 channels and request lines are routed through DMAMUX1.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Calculate the offset of center and primary frequencies to get hardware
indices of center channel and primary channel, and then use them to
configure hardware to a specific channel.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220222032103.29392-1-pkshih@realtek.com
The code uses uart_amba_port::port on many places. Sometimes it even
needs not uart_amba_port itself. So simplify the code on many places
and remove the need of uart_amba_port on some places completely.
No functional changes intended. The objdump -d output shows only a code
move in pl010_rx_chars().
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Russell King <linux@armlinux.org.uk>
Link: https://lore.kernel.org/r/20220224111028.20917-5-jslaby@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Remove the hello print among with version and name definitions. Drivers
should print nothing if they are successful.
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Link: https://lore.kernel.org/r/20220224111028.20917-3-jslaby@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
All these return bitmasks, so it makes more sense to return unsigned --
this is what a reader and also all the callers expect.
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Link: https://lore.kernel.org/r/20220224111028.20917-2-jslaby@suse.cz
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
