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1,169,205 commits

Author SHA1 Message Date
Dmitry Baryshkov
62db82f9c8 clk: qcom: dispcc-qcm2290: get rid of test clock
The test clock apparently it's not used by anyone upstream. Remove it.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-9-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Dmitry Baryshkov
477c404428 dt-bindings: clock: qcom: gcc-sm8450: drop test clock
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-8-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Dmitry Baryshkov
ca0844a2b9 dt-bindings: clock: qcom: gcc-sm8350: drop test clock
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-7-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Dmitry Baryshkov
9fffb2baae dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-6-dmitry.baryshkov@linaro.org
2023-01-10 22:44:29 -06:00
Dmitry Baryshkov
3727ce670b dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-4-dmitry.baryshkov@linaro.org
2023-01-10 22:43:43 -06:00
Dmitry Baryshkov
5fe4abe32e dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-3-dmitry.baryshkov@linaro.org
2023-01-10 22:43:43 -06:00
Dmitry Baryshkov
fc8b0a52f0 dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
The test clock apparently it's not used by anyone upstream. Remove it.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-2-dmitry.baryshkov@linaro.org
2023-01-10 22:43:43 -06:00
Krzysztof Kozlowski
e35b4b9e83 clk: gcc-sm8350: drop PLL test clock
There is no user of core_bi_pll_test_se test clock so drop it.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228140917.118861-3-krzysztof.kozlowski@linaro.org
2023-01-10 22:43:01 -06:00
Krzysztof Kozlowski
412df0f95a clk: gcc-sm8150: drop PLL test clock
There is no user of core_bi_pll_test_se test clock so drop it.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228140917.118861-2-krzysztof.kozlowski@linaro.org
2023-01-10 22:43:01 -06:00
Krzysztof Kozlowski
3db8732c55 dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se input
Drop unused core_bi_pll_test_se clock input to the clock controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228140917.118861-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:43:01 -06:00
Krzysztof Kozlowski
5eafe69af4 arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt name
The bindings expect second Soundwire interrupt to be "wakeup" (Linux
driver takes by index):

  sm8450-hdk.dtb: soundwire-controller@33b0000: interrupt-names:1: 'wakeup' was expected

Fixes: 14341e76db ("arm64: dts: qcom: sm8450: add Soundwire and LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223132121.81130-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:41:48 -06:00
Krzysztof Kozlowski
3c4af3ab1f dt-bindings: clock: qcom,spmi-clkdiv: convert to DT schema
Convert Qualcomm SPMI PMIC clock divider bindings to DT schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223111835.37610-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:41:37 -06:00
Eric Chanudet
ceb01bb895 arm64: dts: qcom: pm8941-rtc add alarm register
A few descriptions including a qcom,pm8941-rtc describe two reg-names
for the "rtc" and "alarm" register banks, but only one offset.
For consistency with reg-names, add the "alarm" register offset.
No functional change is expected from this.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-5-echanude@redhat.com
2023-01-10 22:41:03 -06:00
Eric Chanudet
e1deaa8437 arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics
Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com
2023-01-10 22:41:03 -06:00
Eric Chanudet
650fed7806 arm64: dts: qcom: sa8450p-pmics: add rtc node
Add the rtc block on the first pmic to enable the rtc for sa8540p-ride.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-3-echanude@redhat.com
2023-01-10 22:41:03 -06:00
Eric Chanudet
2e1cec6e1b arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics
pm8450a.dtsi was introduced for the descriptions of pmics used on
sa8540p based boards. Rename the dtsi to make this relationship
explicit.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-2-echanude@redhat.com
2023-01-10 22:41:03 -06:00
Konrad Dybcio
8503babc3d arm64: dts: qcom: sm8350: Drop standalone smem node
SM8350 is one of the last SoCs whose DTSI escaped the smem node
conversion. Use the newer memory-node binding instead of a memory *and*
smem node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219162618.873117-1-konrad.dybcio@linaro.org
2023-01-10 22:40:43 -06:00
Dmitry Baryshkov
7438bb31ba arm64: dts: qcom: sm8450-hdk: add missing PMIC includes
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-6-dmitry.baryshkov@linaro.org
2023-01-10 22:40:37 -06:00
Vinod Koul
30464456a1 arm64: dts: qcom: sm8450-hdk: add pmic files
SM8450 HDK features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-5-dmitry.baryshkov@linaro.org
2023-01-10 22:40:36 -06:00
Dmitry Baryshkov
69d46573ca arm64: dts: qcom: sm8450-qrd: add missing PMIC includes
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-4-dmitry.baryshkov@linaro.org
2023-01-10 22:40:36 -06:00
Vinod Koul
b070c7493b arm64: dts: qcom: sm8450-qrd: add pmic files
SM8450 QRD features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-3-dmitry.baryshkov@linaro.org
2023-01-10 22:40:36 -06:00
Melody Olvera
5b8db5b4f7 dt-bindings: firmware: scm: Add QDU1000/QRU1000 compatible
Add compatible for scm driver for QDU1000 and QRU1000 platforms. These
drivers only require the compatible field, so update the bindings
accordingly for these platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221216231312.22574-1-quic_molvera@quicinc.com
2023-01-10 22:39:23 -06:00
Brian Masney
a251655f1b arm64: defconfig: enable crypto userspace API
Enable CONFIG_CRYPTO_USER so that libkcapi can be used. This was tested
using kcapi-rng on a Qualcomm SA8540p automotive development board.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214174607.2948497-1-bmasney@redhat.com
2023-01-10 22:36:51 -06:00
Krzysztof Kozlowski
47c6315ea6 dt-bindings: arm: qcom: add board-id/msm-id for MSM8956, SDM636 and SM4250
Allow qcom,board-id and qcom,msm-id leagcy properties on these older
platforms: MSM8956, SDM636 and SM4250.  Also mention more OnePlus
devices using modified qcom,board-id field.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214150605.173346-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:36:28 -06:00
Krzysztof Kozlowski
1364acc3f6 arm64: dts: qcom: replace underscores in node names
Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.  In few places adjust the name to
match other nodes (e.g. xxx-regulator).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:25:21 -06:00
Owen Yang
f6df873315 arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie with NVMe
Add DT for sc7280-herobrine-zombie with NVMe

Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214114706.2.I1a0c709f8ec86cc5b38f0fe9f9b26694b1eb69d6@changeid
2023-01-10 22:25:04 -06:00
Owen Yang
3219c9b28e dt-bindings: arm: qcom: Add zombie with NVMe
Add entries in the device tree binding for sc7280-zombie with NVMe.

Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214114706.1.Ie4ca64ad56748de5aacd36237d42c80dd003c1a9@changeid
2023-01-10 22:24:56 -06:00
Konrad Dybcio
71b7c2df31 arm64: dts: qcom: sm8450: Add fallback CCI compatible
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-5-konrad.dybcio@linaro.org
2023-01-10 22:24:32 -06:00
Konrad Dybcio
dd45008b74 arm64: dts: qcom: sm8250: Add fallback CCI compatible
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-4-konrad.dybcio@linaro.org
2023-01-10 22:24:32 -06:00
Konrad Dybcio
84c611c5bc arm64: dts: qcom: sdm845: Add fallback CCI compatible
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-3-konrad.dybcio@linaro.org
2023-01-10 22:24:31 -06:00
Konrad Dybcio
6d88aafa6f arm64: dts: qcom: msm8916: Add fallback CCI compatible
Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-2-konrad.dybcio@linaro.org
2023-01-10 22:24:31 -06:00
Konrad Dybcio
7ca5618520 arm64: dts: qcom: sm8450-nagara: Disable empty i2c bus
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-3-konrad.dybcio@linaro.org
2023-01-10 22:24:01 -06:00
Konrad Dybcio
71b4fb83a9 arm64: dts: qcom: sm8350-sagami: Disable empty i2c bus
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-2-konrad.dybcio@linaro.org
2023-01-10 22:24:01 -06:00
Konrad Dybcio
2a87b55555 arm64: dts: qcom: sm8250-edo: Remove misleading comments
As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip).

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-1-konrad.dybcio@linaro.org
2023-01-10 22:24:01 -06:00
Srinivasa Rao Mandadapu
76ee8cd530 arm64: dts: qcom: sc7180: Set performance state for audio
Set a performance state for audio clks so that the minimally
correct corner voltage is picked when audio is active.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1670932566-22923-1-git-send-email-quic_srivasam@quicinc.com
2023-01-10 22:23:45 -06:00
Krzysztof Kozlowski
bb99820dd2 arm64: dts: qcom: rename AOSS QMP nodes
The Always On Subsystem (AOSS) QMP is not a power domain controller
since commit 1357804562 ("arm64: dts: qcom: sc7180: Use QMP property
to control load state") and few others.  In fact, it was never a power
domain controller but rather control of power state of remote
processors.  This power state control is now handled differently, thus
the AOSS QMP nodes do not have power-domain-cells:

  sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property
  From schema: Documentation/devicetree/bindings/power/power-domain.yaml

AOSS QMP is an interface to the actuall AOSS subsystem responsible for
some of power management functions, thus let's call the nodes as
"power-management".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-4-krzysztof.kozlowski@linaro.org
2023-01-10 22:22:33 -06:00
Krzysztof Kozlowski
76d9e8b4d5 arm64: dts: qcom: sc8280xp: correct SPMI bus address cells
The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-3-krzysztof.kozlowski@linaro.org
2023-01-10 22:22:33 -06:00
Krzysztof Kozlowski
8da3786a91 arm64: dts: qcom: sc7280: correct SPMI bus address cells
The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 14abf8dfe3 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-2-krzysztof.kozlowski@linaro.org
2023-01-10 22:22:33 -06:00
Krzysztof Kozlowski
1f75745537 arm64: dts: qcom: sc7180: correct SPMI bus address cells
The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 0f9dc5f09f ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:22:32 -06:00
Shazad Hussain
2eb4cdcd5a arm64: dts: qcom: sa8540p-ride: enable pcie2a node
Add the pcie2a, pcie2a_phy, and respective tlmm nodes that are needed to
get pcie 2a controller enabled on Qdrive3.

This patch enables 4GB 64bit memory space for PCIE_2A to have BAR
allocations of 64bit pref mem needed on this Qdrive3 platform with dual
SoCs for root port and switch NT-EP. Hence this ranges property is
overridden in sa8540p-ride.dts only.

Moved tlmm node at the end as it tends to become rahter long.

Link: https://lore.kernel.org/lkml/Y49k1k8ayI9%2FrK+R@hovoldconsulting.com/
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213095922.11649-1-quic_shazhuss@quicinc.com
2023-01-10 22:22:10 -06:00
Krzysztof Kozlowski
af657876c6 ARM: dts: qcom: msm8960: add qcom,kpss-wdt-mdm9615
Add specific compatible to timer/watchdog device node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-12-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
f630f8205c ARM: dts: qcom: msm8960: drop second clock frequency from timer
Keep only one clock frequency for timer, because:
1. DT schema does not allow multiple frequencies in such property,
2. The Linux timer driver reads only first frequency.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-11-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
501d1437d5 ARM: dts: qcom: mdm9615: drop second clock frequency from timer
Keep only one clock frequency for timer, because:
1. DT schema does not allow multiple frequencies in such property,
2. The Linux timer driver reads only first frequency.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-10-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
aa482e69cd ARM: dts: qcom: ipq8064: drop second clock frequency from timer
Keep only one clock frequency for timer, because:
1. DT schema does not allow multiple frequencies in such property,
2. The Linux timer driver reads only first frequency.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-9-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
462671ab04 ARM: dts: qcom: apq8064: drop second clock frequency from timer
Keep only one clock frequency for timer, because:
1. DT schema does not allow multiple frequencies in such property,
2. The Linux timer driver reads only first frequency.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-8-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
25da76a92f ARM: dts: qcom: reverse compatibles to match bindings
The most specific compatible should be upfront.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212163532.142533-7-krzysztof.kozlowski@linaro.org
2023-01-10 22:20:15 -06:00
Krzysztof Kozlowski
3bd21131d8 arm64: dts: qcom: sdm845: order top-level nodes alphabetically
Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff, except phandle changes).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212100232.138519-2-krzysztof.kozlowski@linaro.org
2023-01-10 22:15:47 -06:00
Krzysztof Kozlowski
41d31fa487 arm64: dts: qcom: sc7180: order top-level nodes alphabetically
Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212100232.138519-1-krzysztof.kozlowski@linaro.org
2023-01-10 22:15:47 -06:00
Dmitry Baryshkov
a622c1dc84 clk: qcom: clk-spmi-pmic-div: convert to use parent_data
The clk-spmi-pmic-div driver gets the parent name from the first (and
the only) clock parent. So, use parent data, index 0 to setup the clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210191013.453040-1-dmitry.baryshkov@linaro.org
2023-01-10 22:12:18 -06:00
Dmitry Baryshkov
3e727c3e63 arm64: defconfig: build SDM_LPASSCC_845 as a module
Enable the low-power clock controller driver used on Qualcomm SDM845
platform (Thundercomm RB3 board).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221210194500.464556-3-dmitry.baryshkov@linaro.org
2023-01-10 22:11:43 -06:00