- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJgE84JAAoJEAvIV27ZiWZceFoP/1dCnJIa0L1cMdljleEM2HRO
Nd9qHcC4wU3sNQdAsZ1AvQZhxHbFYWRU3Zq+n45NbnSAELALXbfNNwzBRZHavRnU
luUaQK8y2NcyRNhCIs9V5XuZfRFsrNKCVpGexBpXicsG2j47V2PnzjcoZeilybyM
aqsDfMisWlEFmXaLEttdE0ZEwYdGiGiKqRlkCLnW77yepMteykx6wCnT2CihEucC
I0Pbs1cq3BCGR32oQjp26JNDRJD07WwxYhsEcAVMI3aE6WcUJ2e2eUVOEXt685ZL
rZfUcNByWNnL/e79XW3f++j5p7RTYxU+6gBKNFmxzpNsm5Ty+mthWEfffrs0jKyU
z1HySYW/arJl93ikMDuNqb7hfFhRc6VaIIoaIycFCR71myFwl7pX0mJnISPWOVIg
ZFPL7gZ8hdm2ijXrMAZ/idAa+fo6RFill48p8b0hAVL28aiVcUaT80zXcW86ge9k
sVTn0gGfrn3fv3b/Jvxu7I66CkhnFt054eE3a4yOXcnb62rDaLV3euq/+68cPdOU
es5+22cBZBP4EiVaGdYfgA4meCPFO+Os4chOzjoY/XhrVmMdjVzKqSJDlN3NTCaB
d2tHS6wt6hnH/Zknya+R5K+5yJfEdAaabiyLAdoTkT3Ew2csTUH7kZXRU3glJi1k
QS8T6EcV6cJgmPMntaLR
=SHmD
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.12
- Further cleanups of the hisilicon DTS to align with the dtschema
- Add or update the I2C, pinctrl and reset nodes for Hikey970
* tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hi3670.dtsi: add I2C settings
arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings
arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst
arm64: dts: hisilicon: delete unused property smmu-cb-memtype
arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes
arm64: dts: hisilicon: normalize the node name of the localbus
arm64: dts: hisilicon: normalize the node name of the module thermal
arm64: dts: hisilicon: place clock-names "bus" before "core"
arm64: dts: hisilicon: separate each group of data in the property "ranges"
Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The I2C buses are not declared at the device tree. As this will
be needed by further patches, add them, keeping all in
disabled state. Per-board settings can override it.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
There are several pinctrl settings that are missing at this
DT file.
Also, the entries are out of order.
Add the missing bits, as they'll be required by the DRM driver - and
probably by other drivers not upstreamed yet.
Reorder the entres, adding the missing bits.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This is required in order to support USB.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The "smmu-cb-memtype" is a private property developed by the Hisilicon
driver in the early stage and is not used now. So delete it.
Otherwise, below YAML check warnings are reported:
arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \
'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Currently, the names of several nodes incorrectly match common PHY
provider schema. And the phy-provider.yaml requires them must have
property "#phy-cells". As a result, false positives similar to the
following are reported:
usb2-phy@120: '#phy-cells' is a required property
Change their names slightly so that they do not match pattern:
"^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Change the node name of the localbus to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error
is detected by simple-bus.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Change the node name of the thermal zone to match
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal".
2. Change the node name of the trip point to match
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Look at the clock-names schema defined in arm,mali-utgard.yaml:
clock-names:
items:
- const: bus
- const: core
The "bus" needs to be placed before the "core".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Do not write the "ranges" of multiple groups of data into a uint32 array,
use <> to separate them. Otherwise, the errors similar to the following
will be reported:
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \
any of the given schemas (Possible causes of the failure):
soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean'
soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \
100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
"make dtbs_check" fails with:
arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed:
'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$'
Fix this by dropping the bogus "at" prefix.
Fixes: a1d8a344f1 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
SCIF0 has been enabled by the firmware, so it worked already. Still, add
the proper nodes to make it work in any case.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.
Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
tested because it was the only port with a PHY on current hardware.
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[wsa: double checked, rebased, added "internal-delay" properties]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Some SDHI instances are solely used for eMMC. Disable SD and SDIO
for faster initialization.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Adam Ford <aford173@gmail.com> (beacon)
Link: https://lore.kernel.org/r/20210119133322.87289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
naming convention
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmALOmIACgkQQRCzN7AZ
XXMXLhAArBAoa0teToDo0DiNufdP4Tgn6cVrz10r4rLyxlLC/+ahFitd4qmv7ZMz
H7O3caGPMp+Xi2htO59c6CYVNVj0CG58YSkYjboP0b12VDKgO04J2mzw1AsI72nR
mJ+Qr4+KdJsIrFRSqCPEbnN23D1NoQsqUx684b5ndPieXWSs57BlystExD80QKSw
9iFsIDl2vlQ5niR53KZDYAdggq/zJGSuu8k3TpMaVVx4DxB7+Ox/f1bOwakQWCMN
dqzPrTNS3gE/13vKmvFn5Q/Nod6yYo7iJRlaAjMi4toHy7yGloo/FSoo7SRzCJvV
gpKrcM02Z8Nx2a7cr661LH2b5lmNXISVGAzcnoJ5ao+9OJirQZNDDXu1SkRfmTsg
xxSoczEqSWRaoaHx4uKC6fp519UUPdc8JT90U2KvzkisWeQjVLDK6mTvWhEdjm7v
+YE03n4OAm6BG6lrvMQsNBYtlDLtCccOd8ybje+rdPla95Ihb6XBeSGcLo3a4JVg
6yjk4V62RoFmkff544HwdzD5ALe7ANvyCxEnzp8HHRkHYcawzmIQQT38U/36uwNw
bf5Wvd5dlZ9NgJFi/RwVZQEEuN2hN76on9+ew3mwpiiHveYzzuK/AuHZ1aFF8A2l
LRSkiJPrXTb33BVf3SODdCYE3C8wSOKw3ywzB1W8cKEe9D0uf/E=
=zDx3
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.12 kernel cycle:
- A new DTS file for the Samsung GT-I9070 (Janice)
- Fix up ADC channel name attributes
- Add charger interrupts
- Add thermistors to the HREF boards
- Remove the non-existing AB8505 HW ADC IRQ
- Push down the VMMCI setting to each board
- Add the die temperature channel to teh AB8505
- Fix up the MMC host names to follow the standard
naming convention
* tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Fix up MMC host node names
ARM: dts: ux500: Add die temperature to AB8505
ARM: dts: ux500: Push VMMCI down to each tree
ARM: dts: ux500: Remove the GPADC HW IRQ
ARM: dts: ux500: Add thermistors to the HREF
ARM: dts: ux500: Add interrupts to charger
ARM: dts: ux500: Fix channel names attributes
ARM: dts: ux500: Add a device tree for Janice
Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The standard mandates that these nodes be named
mmc@... not sdi_foo@...
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BreadBee and the BreadBee Crust are the same PCB with a different
SoC mounted. There are two top level dts to handle this.
To avoid deduplicating the parts that are more related to the PCB than
the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can
be included in both top level dts.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- removing a property never documented nor used
- adding i2c recovery GPI for one more board
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEEAbEK3+sX+gUxe5RcpMrf1MU8doFAmAK5coACgkQcpMrf1MU
8druSxAAzhEzmkWMV9ApibcL9txr8FZcZQKIoML00mnfecxbS86xrR7YOrv078jK
lDkmxJ8NUJiYtU54q398jFeHyYQMQTcwu2q9/IwP/qC8vo+43DMR9uGZ7YiMN9j7
ERRmuvBF6tU5Gbr8BJ6w2Zn7I7V5HhXwq2oHnxvgHLZ7jH8z1THEUZgkD87I5wzX
oV0dEKznTaon0DsStcQMyMvnGlbsPHtYunc12hzfiMRPv961hX1mHG+yWqV/t86P
Zw87cIrCWzkBqE9bUK0JyB/ltIXfSk/28iRI+YOHSANmvx2sE4Ulss7g6qlacds0
g0MBRcCpteTw0ZM9wMClpsEzyWR961HAbehGakkTjmdpuEtd6fl03iAQHcEE6szN
xP5BEd6PS6auEmXf0yBa84tDnaOJ8D+13w5u0DiapMl4Wm85Y9ecl9gvmmkNJJ/4
mtZa5A8DkydFKBjfZwOYbzieVw2edN4rZQdRutnbXf4KuJw2phd0lV99TPSljYe1
DpI59quMr7txnlsCpd50FxNFb2wU4HRWDUv7k6g8YmQ2WgSxWuS/pyh8JJq/pL/U
R2ldSO2S/0CnxKi5tFN+TQWXxd2a+tnloIx7BmWsYGHazkk9A5yhrshsQMSvrzc6
xruSunjssd15gFLtMZiIAfQDPMPKvcZkRm4PzDcUx8B37gvWm6M=
=SfGI
-----END PGP SIGNATURE-----
Merge tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.12:
- removing a property never documented nor used
- adding i2c recovery GPI for one more board
* tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: remove atmel,wakeup-type references
ARM: dts: at91-sama5d27_wlsom1: add i2c recovery
Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device nodes for the Clock-Synchronized Serial Interface with
FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210108104345.2026857-1-geert+renesas@glider.be
- Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYAFQswAKCRCKwlD9ZEnx
cCH1AQCDwQv0zeq5ppVgZGB9zDgpppfmHWjHheCC2BloilpVoQEA+SjHQp3KEYkB
QJSxiYTwbwuy7fsfOqVU6VW/9c8xmgY=
=bMmj
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.12
- Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits.
* tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add Beacon RZ/G2N and RZ/G2H boards
Link: https://lore.kernel.org/r/20210115094610.2334058-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device nodes for the General Purpose Input/Output (GPIO) block on
the Renesas R-Car V3U (r8a779a0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210114111117.2214281-1-geert+renesas@glider.be
The AB8505 mixed signal ASIC variant has a die temperature
channel that is missing in the AB8500 variant. Add it to
the DTSI.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The setting of VMMCI differs so much between different
boards that we need to handle it on a per-board basis
rather that complicating things by overriding stuff from
the included DTSI:s. Push it down into top-level tree
instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the two temperature-monitoring thermistors to the
HREF reference design, defines a thermal zone for the
chassis and sets some reasonable thermal limits.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The different charger nodes in the AB8500 and AB8505
includes was missing the interrupt assignments for the
interrupts necessary to drive the AB8500/AB8505 charging
state machine.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The AB8500/AB8505 is providing ADC channels and do so
using the standard property "io-channel-names" not the
mistakenly singular form "io-channel-name".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF).
Add the nodes, but make them disabled by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Per the reference manual for the RZ/G Series, 2nd Generation,
the RZ/G2M, RZ/G2N, and RZ/G2H have a bit that can be set to
choose between a crystal oscillator and an external oscillator.
Because only boards that need this should enable it, it's marked
as disabled by default for backwards compatibility with existing
boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201228202221.2327468-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>