Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG4vUdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU4oQ/8CUQbDKstyUVvvyyh
LuXYukVD8GMCoP5yJrpZm3kWBxQvG6LIDpALpo4C5wcuRGCUUcighYh/4cqSyMjR
OHg27YeeasaXQG271aLlJ9/FjzZagJNW682uhwIhL14FB7sbJfh630wHdj/YOph8
lR99AFxYomd4aVKbV8LLLk5Eb6hS9ZKRxhb8Hn1J2GlWjg1S2oHJm8WInc4QR4Xh
J6gCvnYvN9facvQvzUu5mpWhkBF5kMT4kGhj2HWgBurZSVuxfLklcyfXETr7gSoo
oEyHzTI1Oq9YC0nU7r+sCmWMHpVxDY02eLsDwXpEC1ww66ZNYpkB7V1C2GDsnJKV
OFcLe9phs3yNrONia1pyyySCUV+VZIovuOl6iVh2g2ADfP4CPtq+RkAS9qPwT5j9
SAvyfCIiYaYEVT8k+jZOP/HajLpJuWl6SOgGtk8NpP2vWCjIEJuUj5XHj5K0iei9
8Lp2tIy1kVNHT97gG9YKEbtd2wrluE/1mff1iZIPArG0alwGNgiGTwGzesbXXjk6
zuvDlQIwL1b8P3Pg+zKR8sawZcSS2uXZsFWO9wNVsWfQM5JUAiy52KLoygvOdgpO
/qKyOl+QfVXJPRwQgNOMEcquzL+CHqXs2IaN3i9B3TAQ5g3il8xIY36swX2aN30P
lxTR/D+/yQ1Cw/L+55DPKCXn2WU=
=kf1Q
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDJoACgkQYKtH/8kJ
Uif9qxAAnrSnL55CNXoWGiGjhyZxw4Vscm1cBYlSHINoH4wdumRteV3Ux74SCsyy
rlny5kIi2g5Le/EXYA0cH4GbEtXUzm+xyrPGUM7M67AStIE3es51OCoOS4JBYw34
jv82s+rzuXUTogruS5EhkZ6NDve2Oo+sPIjdJWKhf/kV90uocrsQt7AwYs9MSs0t
cr46LaTUqXIHYyig8TbW7bNYqZTKn+0xCLo5DSeToru1dhBNraNkATapGglv7P1q
tcVexjf0SpsST8K7AW0R796urxrSCLBw3bFLqGodArs5N76RObcBLWasVqZPEC8q
Uy2JAyiNGWzSPjAznUBnllCndxOd+0wqSKYkffR8jjSpYvcL0aoqi8F+Lqa+C/Dv
I2SHA2JhAwYdKj5Zc9SGFuVcwb7ABNBi4uimjm9rwlYmKHeHzFrIh5pcROpPi3qe
4/8YNjyx5LyvZ7su+GFGhLAi7XmhtJ7j07BuRfMJJcOdw6AxOvzvNxIZvmNN8evV
U9r6/NXJaLw4SmhhlXTTatWnU/oxx8GvXja/tFfReotFuefBjwYYhhsjRcebtaXr
RFEtCjtauVHdQRxsJbeuCZ56l5Sjliqg4EJ5AuOEpXf4s4Z98ZEoO5KPWWTFlwjp
Th2zLU3pbJPqbQcp9lxN+ETBemuYhr97XrNmFpitec7kTjl/hTM=
=kRKO
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.5, round 1
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
* tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
ARM: dts: stm32: add vrefint calibration on stm32mp15
ARM: dts: stm32: add adc internal channels to stm32mp15
ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
ARM: dts: stm32: fix warnings on stm32f469-disco board
ARM: dts: stm32: Shorten the AV96 HDMI sound card name
ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15
ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15
ARM: dts: stm32: add STM32MP1-based Phytec board
...
Link: https://lore.kernel.org/r/08d711de-bb6d-a976-735b-5e18b19818ea@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs,
- Add HSCIF1 serial port support on Renesas ULCB boards equipped with
the Shimafuji Kingfisher extension,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZIL2yQAKCRCKwlD9ZEnx
cMjqAP4p6n7kV6iRh7sJPIzinFvIEPn5t+q5D/72PdycUoRFugEArHYwMkrebDBc
saar6dT/71Wa14hIkg3ZXWvj6E/+pwg=
=4Gv2
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDImkACgkQYKtH/8kJ
UidShA//TgAs7KVOXwe9ZhSUFr7M06cT3/Z3YXOXF1aOQ72/nKxp7pNjb+Q8kYzz
/aDEjbcoODRql2ERrWD7uzXoRUbuFgmVI1HjvFDT+tm7rdIsFsfXD2nLR6Q91QxZ
Xy7XDxs0+k6o7oJSN8ji5nzx7OmGFVTZgwFWQlUg7ETLVjG5xCAAR2uWphoFaJKt
zfJ55AUTqMbNUec7jaZf4MtiAaaE0OEuno2BupMSPXSSqsVznyiGf7hkouAL0V60
tLxsIHVIfl1c1YE9DIOJFQ6UcM9EEXrS55mFclUdJ9viMHQ2kPKFLNMzt3jHXfcb
X1wmAwrYtM976v6H8cYBKkZLVdWsruZgDO15CR2palBwHFCle10tEIWU0I01B/mT
/ewV8pNb5GXfXBYMSAzmp5DJLVcPEs+Bukdad7kq2Dd1qNgNjF/CYXDv4aRPHOCG
R3juJT1VfNcUejwsWWWwuNaxeziLRJu9aKrQt3Pby0XezFAIuF16/1SLMpSqWWGm
GsvMoc+yptmLrAoRqpwC5X11MD/BIdRjR4Stp9fiSFVUi5MB1d/Hn6XlmIxaSOvW
sZx8BgwzCcsqyQy2PCxqQs/H/J2d18FyGBIg/OHCi3fodubdOwVTy9YV8KFVN+OO
a4Vm+wUaLBElOfNdgAnU69We48XuL3gazVTxfFDOtNI0ihq7oV4=
=Gs3L
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.5 (take two)
- Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs,
- Add HSCIF1 serial port support on Renesas ULCB boards equipped with
the Shimafuji Kingfisher extension,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: ulcb-kf: Add HSCIF1 node
arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1
ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier
arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes
Link: https://lore.kernel.org/r/cover.1686304614.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
To avoid producing lots of make dtbs checks warnings when the yaml binding
for pinctrl-single gets merged, let's fix up the pin group node names. We
want to do this rather than add non-standard node name workarounds to the
yaml binding.
Also included is a non-urgent fix to move gta04 model name out of the pinmux
node that can wait for the merge window.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmR5v28RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOxshAA4dioIg3bNSQIIyK2Z23KuT7tnK3D2QqZ
CBBqdj4K/IqEfDQmqq8urLed/pbaMEbVngCg/25tEtSaQ3o93EebjU0bZnOeLRU9
1wruwGugrKrLA6FmSdpiddpW2KLFFeEqXzB6ktP8G7A6EM8dPle9Im6RIPUI1wCC
QP2Nk6IRFhc5fR7Es3pNFTYmtpm2mdQ2HalO8LvVawu7lpnfNA9YMpRWLxWp2Q7l
47CJ6jfitE1qdMkIsIsdjX2Te43QwFTifm5P/q/6LHNofO2tTItMRwjXK4GsPCuk
iGmiwCv1S+tJbw8gMO4r+FPfejuxEuFeSRgqRFxMgb+lTHKfF+7iSupP2JH/XiFp
KVEL45inw83f3iOycDWB4zcXPMLdWQcQwKGpNpsLb+h9Frtmu4D2EgH3tIooqj3w
fw5krbq8HiUTLgy5W4yOdMXofUCKN6gmzQyhmJ+OcRMk0HfwoKV9rHjD1Dyi51vb
B60xZcfK42RQUOxwbErGHzvNTJPv9fcurD4Dre1fBjmJzueeKgfAu4flhfVjisc+
LuZjYpWpWDZLszKFrP6IlQPn2h2NxJJDWyvdaKRoGYvVUNPgsJbPU1ktG6wRhInI
tjUYAZijy70Y2A7HuaWOHfg8wtHXn2bs0mXMg4sDZQ0e6rlBwqVTpxGQChx9NUx5
+dxcKj9i/rU=
=UyIV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIQkACgkQYKtH/8kJ
UieLfBAAoN1wCdKB8YC9w8mfcwKippLcqO6lwAL0A6EGdf1bkbQsGS1whHvFFnuU
BdYC+vI7DsaHO79GMEHIqzNW4sAGUytN3f0sLVDyUy90DKpdgI+1HOhkvYm2RoE6
ZPb3XUrQZhq8eF28jc+ByyCWL5hEed1VOAHNp1I1MhE4/VUKesaHhjV3+U4EqNfJ
6Gz2biVR/4Ft/SAI5JfCwQIzQSKeEhOa8WXIiSSMmw8B/gS0f74u1hnhDrGT2nvW
I6iZ8Zs91YWsSfA4O+1ggtO3B6XaGsgJk8BNJI1dTNB+VHSlatIH+b+OjCez5T/b
0T1GNjKdlI1cz35TaZEbLpPrnaNW5BcnR7dkTRbXsFLom+JfwYsWmKot7k5VRxnT
WWLC5g88mcAaouFSBQsOeIFfjxpbPLYcIfL4tUKufIMB1eV+ObfHNamOfx3IYpox
wbP+QCN8iY2bS0a/P+ZgcqFVgBI5HsBBCraIvwQ1tKpM6Tr0zRDP8+c6URfBMoCc
AINvC2++j9YiH2D//14k5NpMFJFA2Z8zYFV8XB3eJxstBe+rSauJkb3PsMGS7QN8
0yPrf5lDML652w1gLvxMT2JoXI/Nrc8mGVmc/areI08zmT0Xe1BgJbxZEE3nS6f0
kWjf8X+bjoK+TQCUwGf6IGciNQ8if4hfT2YK0ByLYPYPn6hSiK4=
=Tmi7
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Clean-up for pinctrl-single node names for omaps for v6.5
To avoid producing lots of make dtbs checks warnings when the yaml binding
for pinctrl-single gets merged, let's fix up the pin group node names. We
want to do this rather than add non-standard node name workarounds to the
yaml binding.
Also included is a non-urgent fix to move gta04 model name out of the pinmux
node that can wait for the merge window.
* tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Unify pinctrl-single pin group nodes for dra7
ARM: dts: Unify pinctrl-single pin group nodes for am4
ARM: dts: Unify pinctrl-single pin group nodes for am33xx
ARM: dts: Unify pinctrl-single pin group nodes for ti81xx
ARM: dts: Unify pinctrl-single pin group nodes for omap5
ARM: dts: Unify pinctrl-single pin group nodes for omap4
ARM: dts: Unify pinctrl-single pin group nodes for omap2
ARM: dts: Unify pinctrl-single pin group nodes for omap3
ARM: dts: gta04: Move model property out of pinctrl node
Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Amlogic C3 is an advanced edge AI processor designed for smart IP camera
applications.
Add basic support for the C3 based Amlogic AW409 board, which describes
the following components: CPU, GIC, IRQ, Timer, UART. It's capable of
booting up into the serial console.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Use "dai-format" to configure DAI audio format as specified in
audio-graph-port.yaml bindings.
Fixes: 144d1ba705 ("ARM: dts: stm32: Adapt STM32MP157 DK boards to stm32 DT diversity")
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The audio routing flow is not correct, the flow should be from source
(second element in the pair) to sink (first element in the pair). The
flow now is from "HP_OUT" to "Playback", where "Playback" is source
and "HP_OUT" is sink, i.e. the direction is swapped and there is no
direct link between the two either.
Fill in the correct routing, where "HP_OUT" supplies the "Headphone Jack",
"Line In Jack" supplies "LINE_IN" input, "Microphone Jack" supplies "MIC_IN"
input and "Mic Bias" supplies "Microphone Jack".
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Let's also correct the pinctrl controller #size-cells to 0 while at it.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Let's also correct the pinctrl controller #size-cells to 0 while at it
and drop unnecessary ranges property.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
1. Final cleanups and improvements as a result of dtbs_checks which rely
on previously merged driver changes thus affecting older or
out-of-tree kernels. The changes are necessary to achieve full
dtbs_check compliance, which justifies affecting out-of-tree users.
Changes affecting them are:
- Drop simple-bus compatible from FIMC: Exynos4 and S5PV210,
- Remove empty camera pinctrl configuration: Exynos4 and S5PV210,
- Re-order MFC clock names to match Exynos and bindings: S5PV210.
2. Except above few more non-intrusive cleanups for dtbs_check for
S5PV210. Fix also some typos.
3. Re-introduce Exynos4212 which was removed because of lack of upstream
users. Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmR5rNgQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD131PD/9b9jaNO3NBJdHCg2e1XOG4Ca4EiZy7+c7g
JUqQcgdy478eXYSF2WM1qNLJjOIlnHgyWPChTHsNK8W0bD0wqR6JQReE5ZYj/hcA
5C1FrL5YMfA9ZHtyLBPl5NEilwtPYnNyJw7+LkPQdZIC8QQ4k4JaZzYtAgESAc3M
0uphSKcTIrT/hdbAA82hBFIGdSVu1GTiKfWAPRTKPyA3BGuYY8dLfMTIQ2czxVDZ
CbH1m2R/d6idppyDEkXmUNwOAOeiWpGbiJEcOEOwXq68hJUpkDjAJXs5QKlhb2Ue
TOR0DJp3ZorWt8WY50JXy/8Kzv3i/QgLugl7+3XMyNSvArxiFyEEDdZl9WXToJmV
hi5KrbWmMdKIuUGpFON5ZGzsTnDUYuvpILCWU7iyP59DA4pJMZW42JTskM1i2aDb
HPXQGCjQDJONuJq9MtB6QK+zCpHMO913hXIG7GsIiW73bimjER3y1rMW93PUL49x
08tNHWcyFN4ghwXcMBBbrf7yWfQ8SVhUSRnD1LGcJYj0gwaJgRPHyKDnApgxxIKB
35lVRH+84SYslLmkrZIJTN1lw2yqHF4+oxrnza0+ItdaJyZk8rmXaP34VKYjXZxs
y5SBjVZ8lrdCIB9kVhy2DtRj8vLO88uzUFRmAQF54TRL62jhC56T2gl7PJQtCfJz
OtyplsT7pQ==
=prN6
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/UdwACgkQYKtH/8kJ
UicS0xAAqi4ctbU0A4KNOUn2y/U1amFrEN9l7nfYjUCb1CH6Z1qAvRTyoOxO4xB/
dK82QdS7f2si4IWurVGeWfdruSqHWure1Py82iD2oIoRm0XIOkx/5EKSmPYrEXrJ
NbFl5lt5ox+nQLdD5mLAKsxswTP3bfor0ILYFYJj5zk5hEhdk72lGmXboO/0ulYn
sqE8JugXgxCehbA3xYbShghIdLrapaAnQDzawTeXKIH0IFdMfj31X7kQr6D6BO8S
EeJTvNwhaX5ZCTAgWmWX4O9fOoxj1FriRuic5WYI7skjwBwgsX2uFK/t5lV2pYn2
9gazldz0Bx5vu/DitsAmK1nyj9ma8996j5Vh5L4DLz4uo566RkNI3cEYHt388oyQ
d/zIloyu14HHr3YtRXieSakTf+FvHlMmHEvOMsAgqibsXFvHTJh5st6grIZHj3iO
zmBNsLW9tcvhLDe72QPcI4ZY/QWyeROuEH/d9OedD+whTpFA45kiG+qPZZYKKcl+
ZxOQC0kib7mW4KxvGLZoonzNC8vUMmiCbsPrkNBerTQdVHAvHt2GiO2aBvibNn/U
QismtyjiMKBLWb27MNngWURlWDv9kmu+p7gnF19sFUhTdJCXfeTiL9PI13tvRHF3
neG1BVchVXPUMUwymqW4RqZI01tp6H5OssGdp3kM6goXYcMlA7M=
=7GAg
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.5
1. Final cleanups and improvements as a result of dtbs_checks which rely
on previously merged driver changes thus affecting older or
out-of-tree kernels. The changes are necessary to achieve full
dtbs_check compliance, which justifies affecting out-of-tree users.
Changes affecting them are:
- Drop simple-bus compatible from FIMC: Exynos4 and S5PV210,
- Remove empty camera pinctrl configuration: Exynos4 and S5PV210,
- Re-order MFC clock names to match Exynos and bindings: S5PV210.
2. Except above few more non-intrusive cleanups for dtbs_check for
S5PV210. Fix also some typos.
3. Re-introduce Exynos4212 which was removed because of lack of upstream
users. Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212.
* tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: Fix typo in comments, fix pinctrl header
ARM: dts: s3c64xx: Fix some typos in comments
ARM: dts: exynos: Fix some typos in comments
dt-bindings: arm: samsung: Add Samsung Galaxy Tab3 family boards
ARM: dts: exynos: Re-introduce Exynos4212 DTSI
ARM: dts: exynos: Move common Exynos4x12 definitions to exynos4x12.dtsi
ARM: dts: s5pv210: remove empty camera pinctrl configuration
ARM: dts: s5pv210: add dummy 5V regulator for backlight on SMDKv210
ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings
ARM: dts: s5pv210: align USB node name with bindings
ARM: dts: s5pv210: align pin configuration nodes with bindings
ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3
ARM: dts: exynos: Remove empty camera pinctrl configuration in Universal C210
ARM: dts: exynos: Remove empty camera pinctrl configuration in Trats
ARM: dts: s5pv210: drop simple-bus from FIMC
ARM: dts: exynos: drop simple-bus from FIMC in Exynos4
Link: https://lore.kernel.org/r/20230602091501.15178-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It contains:
- gpio-line-names addition for at91-tse850-3 board
- support for SMA connectors on lan966x-pcb8309 board
- use drive-open-drain as boolean property as this is how code handles
it
- generic names for clock controller devices
- use of the new clock controller bindings for at91sam9n12 slow clock
controller
- one blank line removal on sama5d2.dtsi
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCZHXRoQAKCRCejrg/N2X7
/aM4AQD9L1shYbMzPEhqj7UxQUXhGmZnoDzd5aP2OicgUS5JDwD/cg3CM29eq8Fj
wW21GjSM/evK3sDfdbDmvatIM41uhw0=
=zMgl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/UX8ACgkQYKtH/8kJ
UieYbw//WnKz+UvPj8HC/HUz8MOKOHGfN4ZOyiV+Hg3Tt8L3AntU7tpPraGwpuy2
9h7rBBIPxk182VpkHIpcVCTH4xt8XQvcZKLaZoe57CaPl5VmpbFBavExtf1wzKbY
f62LaZce/rDI/yw9F6S0+WltzwRhLSMmX/eyGAlNgNfcezd+hFKvOY3/Jt5XsVgA
i53YTMGfryCWEaUW5F5qD5WOqz6d+LmxrKLbnPQpYjqPIaCF2K7GD+FspH0iVNpf
wpmYZK+ku0Q3OXpRL6j5FZhXG3q7haRRB86/fp31wU+IoMEx9Il9G6NHfbe7dc8Z
i1bHQOKUn4OPsftt5ld35v6MsJ1Kc4CWF8Rz7cOIIvDjDfsvlT91uiIMhg7cj+ql
eJvQUlKaj1P0cjv5KlXD2pIUDXlVHNK3YGcyzHf42+P9NSDaggFgvCywtO2Et744
46PHQ+IeuXFpbUuxFEPMn+cmzRZqodBDqSY1EWRwAIvC3nTAA14outEDclWh4rLj
3QZPIcv/r4TMIa+OSUL37eUUhcx8v5vo8qjfSBbGioDSi/XHnJA0Ef1z9cTs6/PQ
bDzwJuF9wAIyqegDkG6wrVbEV0DU6udcpDwibesAt/AnvUGXkX9Dj/K3JTWl7h1q
ImJPRX+YdZSw5zA0s9iFALjp8RxOqQzIKkptlCV3toa2dQ0RCGo=
=aFnJ
-----END PGP SIGNATURE-----
Merge tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.5
It contains:
- gpio-line-names addition for at91-tse850-3 board
- support for SMA connectors on lan966x-pcb8309 board
- use drive-open-drain as boolean property as this is how code handles
it
- generic names for clock controller devices
- use of the new clock controller bindings for at91sam9n12 slow clock
controller
- one blank line removal on sama5d2.dtsi
* tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama5d2: remove extra line
ARM: dts: at91: Return to boolean properties
ARM: dts: lan966x: Add support for SMA connectors
ARM: dts: at91: use clock-controller name for sckc nodes
ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
ARM: dts: at91: use clock-controller name for PMC nodes
ARM: dts: at91: tse850: add properties for gpio-line-names
Link: https://lore.kernel.org/r/20230530105945.11638-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Define the SRAM nodes that will be the preferred way to
specify SRAM segments to drivers going forward.
- Fix up the naming of the STMPE nodes as we are merging
proper YAML bindings which puts restrictions on those.
- Disable charging on the Ux500 HREF boards because these
do not have any real batteries connected.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmR0kGQACgkQQRCzN7AZ
XXPykBAAj9fc1CTWOdLik+8uZ0Al1U1cBL6VoK/nazIf7lla/nCmAJ5zTSC6lnAw
JtdUbyOJPTyKG5JqNvOTFngyNpChDVMQxDqgARxRcq4IRdNnE7YSsQKguUbC8rrv
Vl040G1dPF8HYxdNSjx5hGlgqLUQRVnhe1d8bRQvd68LCEoy7nqfr4aQ0TnW3ZEZ
IulMyA85PYmWlFgl6t5hKkCabf/tCK/mYuOM0dv0v7p1KMBLymtSp1C+89CPU/8F
xODSeRIOHlzYgCEQfx8I4S5TT37h4DAA0nvXMaKk22WzaTqmG0EzJAF22Zad+RzN
vKmYIJcELPV+ItCy9Vewrmwdf3y0mzIOzwTJeBxFc7O8PPyvs5VhOrBz1qjWWb4l
HwchVLQHEQcc3U64+hVEdyAGGNGBrLn/uk3WZu/CuAi2/Nm8C8du0SBDVIfVirYI
8ctjicsju4WUUXoAHvkCu9JCDiRCR7yUh6qoIdrZq+dDcSpPdSYsjY9o2ulJOQ1k
6rzRSNkKs6qSTGs+xKT5lg+hd7uXyKXUn/Cd+8OSPwkWO92VUrdvP8d0k+SxXlI4
vbNGRnsPzm6tRqWBEGK0fYdm8Q3SFOVnE1DpFBjxf0he3bRFNbCnpc8D5C1e6Kmw
857BSmqucGyZ9Ey+CLYChkcz+MIbXXEUbx7FgDgOBsl6u1nYax8=
=2rdu
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/Tc8ACgkQYKtH/8kJ
Uif/CA/+NhW9g/NiJXwZ2+THv+46A+Dhoe+1Yu/wrliN5Li2/awypAWsLBowjuzC
RRf1FzMhMwVNKZL5Sqy6kPUIceDBTlmarZsAc/j4qDql2XffPJBw8cggyNjgCoUO
ufaxgVrFMqQH+dWqjYw2ybOSu0AWmN0D8zRbUwhbdJ4u8QIz1gpgH+evATGdf1Xy
KT+1lLpol54gmC151u+JjqWPiRIgtrJ+8wlRDLTNPDeAeo1WCh+ePrX3XY5iP2+8
dZNigT4lTGF9ByfgrpG4psitN0RdlMoPFPYj/PNjamHZUKXX8gOrgD7RN4OXykhn
eHJqCqF25+vEuNdcHp9uKzG1KVCpGk8sWBeTNvEQSnP6fuoi2OLFIO1Jh9zkCHf4
T+UyRtzITjY38Gxk9tuFwz4sCeqbHbD+EIcnkc12nno0sZgXZYp1bFeZomvl+pTc
XseeM1cR1mbm7zKt7cdfKNtBUeKivwY/M4cRkWLK3ArKko6ffv6Sn8RkqSFPhQzr
VWjEDA6SP0KvBI+sYrXLFUgNMbkVEtcT7s5ZDuDrS7cuxHZQVczDLVanP9M1XbTU
pu3pgWLFbP/ieCb6RJpr083V61JEtT4V45BTDW382DtalUjh8dvPgTmkOJPdSo3g
/ahKav4lWiHGhadUgkw4hxmKLKBBHvIHtfgvDFOlb/5ixl1olZQ=
=QLb5
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt
These are some Ux500 DTS updates for the v6.5 kernel cycle:
- Define the SRAM nodes that will be the preferred way to
specify SRAM segments to drivers going forward.
- Fix up the naming of the STMPE nodes as we are merging
proper YAML bindings which puts restrictions on those.
- Disable charging on the Ux500 HREF boards because these
do not have any real batteries connected.
* tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add eSRAM nodes
ARM: dts: ux500: Fix STMPE device nodes
ARM: dts: ux500: Disable charging on HREF boards
Link: https://lore.kernel.org/r/CACRpkdZ2YLzB-n+1M9u0UqVfct_LAR5cLvYyJhxHsXNR_TFzpQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Correct the following warnings by adding the required supplies (AVDD, DVDD)
for the ov5640 node.
arch/arm/boot/dts/stm32mp157c-ev1.dtb: camera@3c: 'AVDD-supply' is a required property
From schema: Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml
arch/arm/boot/dts/stm32mp157c-ev1.dtb: camera@3c: 'DVDD-supply' is a required property
From schema: Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The generic ADC channel binding is recommended over legacy one, update the
DT to the modern binding. No functional change. For further details, see
commit which adds the generic binding to STM32 ADC binding document:
'664b9879f5 ("dt-bindings: iio: stm32-adc: add generic channel binding")'
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Use STM32 ADC generic bindings instead of legacy bindings on
DHCOR Testbench board.
The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Use STM32 ADC generic bindings instead of legacy bindings on
DHCOR DRC Compact board.
The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Use STM32 ADC generic bindings instead of legacy bindings on
emtrion GmbH Argon boards.
The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Use STM32 ADC generic bindings instead of legacy bindings on
STM32MP157c-ed1 board.
The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
U-Boot enables ADC1&2 to support USB power measurement and ADC
calibration on STM32MP15x Disco boards.
When leaving U-boot the ADCs do not return to power down state
to keep ADC linear calibration available for kernel.
Enable ADC1&2 by default on STM32MP15xx-DKx boards to align kernel
DT with Uboot. This avoids to shutdown the ADCs VDDA, while the
ADCs are not in power down.
Use STM32 ADC generic bindings instead of legacy bindings on
STM32MP15xx-DKx boards.
The ADC pins on Arduino connector are not set by default.
These pins are added in A7 Disco example DTs only.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Set STM32 ADC2 as a consumer of BSEC on STM32MP15, to retrieve
vrefint calibration data saved in OTP.
During the calibration process vrefp is set to 3.3V and the data
acquired is saved to the OTP. This data is used by the ADC driver
to calculated the actual value of vrefp according to the formula:
vrefp = 3.3 x vrefint_cal / vrefint_data
The vrefint channel provides the actual value of vrefp,
which can be used to correct ADC acquisition data.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add STM32 ADC2 internal channels VREFINT and VDDCORE to STM32MP15x SoCs.
VBAT internal channel is not defined by default in SoC DT, and
has be defined in board DT when needed, instead. This avoids unwanted
current consumption on battery, when ADC conversions are performed
on any other channels.
The internal channels are defined in STM32MP15 SoC DT according to the
generic IIO channel bindings. The STM32 driver does not support a mixed
use of legacy and generic channels. When generic channels are defined,
legacy channels are ignored. This involves that the board device trees
using legacy bindings for ADC2, have to be reworked.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Exposed on CN4. Tested by connecting it to a Renesas Ebisu board.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The schematics are misleading, the flow control is for HSCIF1. We need
SCIF1 for GNSS/GPS which does not use flow control.
Fixes: c6c816e22b ("arm64: dts: ulcb-kf: enable SCIF1")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
make dtbs_check:
arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
PWM specifiers referring to R-Car PWM Timer Controllers should contain
only two cells.
Fix this by dropping the bogus third cell.
Fixes: 6f89dd9e93 ("ARM: dts: iwg20d-q7-common: Add LCD support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6e5c3167424a43faf8c1fa68d9667b3d87dc86d8.1684855911.git.geert+renesas@glider.be
Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.
Also change the dma-ranges arguments for IOMMU. Note that dma-ranges
can be used if the IOMMU is disabled.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the devices working with current drivers for the
Epson Moverio BT-200 AR glasses consisting of a control unit
and the glasses itself.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-Id: <20230313110409.2294154-1-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The NAND wait pin is connected to the GPMC, but this is not mentioned
in the DT bindings. Let's fix this.
Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Message-Id: <20230524091157.775960-1-eagle.alexander923@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Change 'specfic' to 'specific' and make the pinctrl DTSI header
more like the s3c64xx pinctrl DTSI (previously it was copied from
the main s5pv210 DTSI, and not changed to match the new contents).
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-4-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Change 'specfic' to 'specific', 'optiosn' to 'options' and remove
duplicated 'are listed' in DTSI heading comments.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-2-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Those concern:
* "#size-cells" and "#address-cells" wrongly used
* residual "reg" property appearing on endpoints where it could be
avoided
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fixes DSI related warnings:
* "#size-cells" and "#address-cells" wrongly used
* Changed 'panel-dsi@0' to 'panel@0' according to dsi-controller.yaml
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
"#address-cells" and "#size-cells" are two properties that are not
mandatory. For instance, the DSI could refer to a bridge outside the scope
of the node rather than include a 'panel@0' subnode. By doing so, address
and size fields become then unnecessary, creating a warning at build time.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Several warnings appear when building and checking stm32f429 device-tree:
arch/arm/boot/dts/stm32f469-disco.dts:182.28-184.5: Warning (unit_address_vs_reg): /soc/display-controller@40016800/port/endpoint@0: node has a unit name, but no reg or ranges property
.../arch/arm/boot/dts/stm32f469-disco.dtb: dsi@40016c00: Unevaluated properties are not allowed ('panel-dsi@0' was unexpected)
From schema: .../Documentation/devicetree/bindings/display/st,stm32-dsi.yaml
Fix those.
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fix the following error in kernel log due to too long sound card name:
"
asoc-audio-graph-card sound: ASoC: driver name too long 'STM32MP1-AV96-HDMI' -> 'STM32MP1-AV96-H'
"
Fixes: e027da3427 ("ARM: dts: stm32: Add bindings for audio on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
- Add partial display support for the RZ/G2L and RZ/V2L SoCs and the
RZ/G2L{,C} SMARC EVK development boards,
- Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC
SMARC EVK development boards,
- Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and
RZ/V2L SoCs,
- Add PWM support for the R-Car V3U SoC.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZHB9rgAKCRCKwlD9ZEnx
cNz9APwJV+1xg9J/erm4JTh8yJFWMywkGq4BDI7BFn//jQsXkwD9HXWJmEqH7sdP
QA/TmM6mBeEN3m3XnKZekuEHLJ7qPgA=
=k6zc
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRwmgAACgkQYKtH/8kJ
UifC7g//UQIpHvzOm/f0IZyh8p2aSh38wYWvi+FEcmzX0ohK/QSLWeDmm/pjLsGg
RacQyhxtb14sHIoYb3kcjdMQrJhP7uJKMsIo1ii+iw4PfhMXz2G9XBzvJjTMXh9C
YZ8hSfH+GgY3YbaKmNQaBNLC3nHkHHjLUajxZd3KFSa/brO1iQXfAQxGopbBrpoi
CNR3JgcJL3hMMYL8oPAMD1k6162HjqGjiJBxDIwfdph4rKery4cDHMG1HkNloONw
eUmtyeFVQ38YnWgswinHzgYGuAH5dm+I7VbdB5QcpMliwgH5I3rPEh12l4YLF+QB
stVvnhhdovIzAg4yk8C1wekLzrsSp8lsm1+6FZZ4UpsXjcNqXfi63BPiAfrsV+LK
vc5UuRITp/PXEEk5i/lgX1twN29ANimFShfP+7jEb2mzqxww/3X1bxp3bImWIZ9O
3/Wv7Di0JVueZBKHm1nM4fbrn9lAPfzaKs389dcbgRI8U2n451TPrqS+bYQVdVct
g/I+t3os9KazDKMCQiwFFJDetAhq8tWGZVHJtAR+iW9EZeONQ64kRhQIwsmbmlF9
rAXa2lOyWszIbAfZK34oTib15vnv0EYoj+aqyPUQ3GsaQ+ZI5YkFRiisJSztZGZP
hqywjw4MLRkkdqMDH7Zs04kiNKkCBTvuNelNfl0N7wyc5gzrPyw=
=mq0o
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.5
- Add partial display support for the RZ/G2L and RZ/V2L SoCs and the
RZ/G2L{,C} SMARC EVK development boards,
- Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC
SMARC EVK development boards,
- Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and
RZ/V2L SoCs,
- Add PWM support for the R-Car V3U SoC.
* tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a779a0: Add PWM nodes
arm64: dts: renesas: r9a07g054: Add MTU3a node
arm64: dts: renesas: r9a07g044: Add MTU3a node
arm64: dts: renesas: rzg2lc-smarc: Enable CRU, CSI support
arm64: dts: renesas: rzv2l-smarc: Enable CRU, CSI support
arm64: dts: renesas: r9a07g054: Add CSI and CRU nodes
arm64: dts: renesas: rzg2lc-smarc: Link DSI with ADV7535
arm64: dts: renesas: rzg2l-smarc: Link DSI with ADV7535
arm64: dts: renesas: r9a07g054: Add DSI node
arm64: dts: renesas: r9a07g044: Add DSI node
arm64: dts: renesas: r9a07g054: Add vspd node
arm64: dts: renesas: r9a07g044: Add vspd node
arm64: dts: renesas: r9a07g054: Add fcpvd node
arm64: dts: renesas: r9a07g044: Add fcpvd node
Link: https://lore.kernel.org/r/cover.1685094244.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>