Commit graph

1,185,887 commits

Author SHA1 Message Date
Arnd Bergmann
b1062d1971 STM32 DT for v6.5, round 1
Highlights:
 ----------
 
 - MCU/MPU:
   - Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
   - Fix LTDC/DSI warnings.
 
 - MPU:
   - STMP32MP15:
     - Add OTP part number and Vrefint calibration in bsec.
     - M4 hold management updated. As SMC call is deprecated,
       the service is moved on a SCMI service.
     - Add ADC internal channels (VREFINT/VDDCORE).
 
   - ST:
     - Enable ADC1&2 on STM32MP15 DKx boards.
     - Adopt generic IIO bindings on STM32MP157C ED1
     - Add supplies for OV5640 in STM32MP157C EV1
       to fix yaml validation.
     - Fix i2s bindings to match with the YAML validation (DKx boards).
 
   - DH:
     - Rearrange MAC EEPROM.
     - Rename AV96 sound card.
     - Adopt generic IIo bindings.
     - Fix audio routing.
 
   -PHYTEC:
     - Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
       This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
       up to 16 MB QSPI and up to 128 GB NAND flash.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG4vUdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU4oQ/8CUQbDKstyUVvvyyh
 LuXYukVD8GMCoP5yJrpZm3kWBxQvG6LIDpALpo4C5wcuRGCUUcighYh/4cqSyMjR
 OHg27YeeasaXQG271aLlJ9/FjzZagJNW682uhwIhL14FB7sbJfh630wHdj/YOph8
 lR99AFxYomd4aVKbV8LLLk5Eb6hS9ZKRxhb8Hn1J2GlWjg1S2oHJm8WInc4QR4Xh
 J6gCvnYvN9facvQvzUu5mpWhkBF5kMT4kGhj2HWgBurZSVuxfLklcyfXETr7gSoo
 oEyHzTI1Oq9YC0nU7r+sCmWMHpVxDY02eLsDwXpEC1ww66ZNYpkB7V1C2GDsnJKV
 OFcLe9phs3yNrONia1pyyySCUV+VZIovuOl6iVh2g2ADfP4CPtq+RkAS9qPwT5j9
 SAvyfCIiYaYEVT8k+jZOP/HajLpJuWl6SOgGtk8NpP2vWCjIEJuUj5XHj5K0iei9
 8Lp2tIy1kVNHT97gG9YKEbtd2wrluE/1mff1iZIPArG0alwGNgiGTwGzesbXXjk6
 zuvDlQIwL1b8P3Pg+zKR8sawZcSS2uXZsFWO9wNVsWfQM5JUAiy52KLoygvOdgpO
 /qKyOl+QfVXJPRwQgNOMEcquzL+CHqXs2IaN3i9B3TAQ5g3il8xIY36swX2aN30P
 lxTR/D+/yQ1Cw/L+55DPKCXn2WU=
 =kf1Q
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDJoACgkQYKtH/8kJ
 Uif9qxAAnrSnL55CNXoWGiGjhyZxw4Vscm1cBYlSHINoH4wdumRteV3Ux74SCsyy
 rlny5kIi2g5Le/EXYA0cH4GbEtXUzm+xyrPGUM7M67AStIE3es51OCoOS4JBYw34
 jv82s+rzuXUTogruS5EhkZ6NDve2Oo+sPIjdJWKhf/kV90uocrsQt7AwYs9MSs0t
 cr46LaTUqXIHYyig8TbW7bNYqZTKn+0xCLo5DSeToru1dhBNraNkATapGglv7P1q
 tcVexjf0SpsST8K7AW0R796urxrSCLBw3bFLqGodArs5N76RObcBLWasVqZPEC8q
 Uy2JAyiNGWzSPjAznUBnllCndxOd+0wqSKYkffR8jjSpYvcL0aoqi8F+Lqa+C/Dv
 I2SHA2JhAwYdKj5Zc9SGFuVcwb7ABNBi4uimjm9rwlYmKHeHzFrIh5pcROpPi3qe
 4/8YNjyx5LyvZ7su+GFGhLAi7XmhtJ7j07BuRfMJJcOdw6AxOvzvNxIZvmNN8evV
 U9r6/NXJaLw4SmhhlXTTatWnU/oxx8GvXja/tFfReotFuefBjwYYhhsjRcebtaXr
 RFEtCjtauVHdQRxsJbeuCZ56l5Sjliqg4EJ5AuOEpXf4s4Z98ZEoO5KPWWTFlwjp
 Th2zLU3pbJPqbQcp9lxN+ETBemuYhr97XrNmFpitec7kTjl/hTM=
 =kRKO
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.5, round 1

Highlights:
----------

- MCU/MPU:
  - Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
  - Fix LTDC/DSI warnings.

- MPU:
  - STMP32MP15:
    - Add OTP part number and Vrefint calibration in bsec.
    - M4 hold management updated. As SMC call is deprecated,
      the service is moved on a SCMI service.
    - Add ADC internal channels (VREFINT/VDDCORE).

  - ST:
    - Enable ADC1&2 on STM32MP15 DKx boards.
    - Adopt generic IIO bindings on STM32MP157C ED1
    - Add supplies for OV5640 in STM32MP157C EV1
      to fix yaml validation.
    - Fix i2s bindings to match with the YAML validation (DKx boards).

  - DH:
    - Rearrange MAC EEPROM.
    - Rename AV96 sound card.
    - Adopt generic IIo bindings.
    - Fix audio routing.

  -PHYTEC:
    - Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
      This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
      up to 16 MB QSPI and up to 128 GB NAND flash.

* tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
  ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
  ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
  ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
  ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
  ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
  ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
  ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
  ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
  ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
  ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
  ARM: dts: stm32: add vrefint calibration on stm32mp15
  ARM: dts: stm32: add adc internal channels to stm32mp15
  ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
  ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
  dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
  ARM: dts: stm32: fix warnings on stm32f469-disco board
  ARM: dts: stm32: Shorten the AV96 HDMI sound card name
  ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15
  ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15
  ARM: dts: stm32: add STM32MP1-based Phytec board
  ...

Link: https://lore.kernel.org/r/08d711de-bb6d-a976-735b-5e18b19818ea@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-20 22:31:22 +02:00
Arnd Bergmann
7b87c164e1 Renesas DTS updates for v6.5 (take two)
- Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs,
   - Add HSCIF1 serial port support on Renesas ULCB boards equipped with
     the Shimafuji Kingfisher extension,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZIL2yQAKCRCKwlD9ZEnx
 cMjqAP4p6n7kV6iRh7sJPIzinFvIEPn5t+q5D/72PdycUoRFugEArHYwMkrebDBc
 saar6dT/71Wa14hIkg3ZXWvj6E/+pwg=
 =4Gv2
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDImkACgkQYKtH/8kJ
 UidShA//TgAs7KVOXwe9ZhSUFr7M06cT3/Z3YXOXF1aOQ72/nKxp7pNjb+Q8kYzz
 /aDEjbcoODRql2ERrWD7uzXoRUbuFgmVI1HjvFDT+tm7rdIsFsfXD2nLR6Q91QxZ
 Xy7XDxs0+k6o7oJSN8ji5nzx7OmGFVTZgwFWQlUg7ETLVjG5xCAAR2uWphoFaJKt
 zfJ55AUTqMbNUec7jaZf4MtiAaaE0OEuno2BupMSPXSSqsVznyiGf7hkouAL0V60
 tLxsIHVIfl1c1YE9DIOJFQ6UcM9EEXrS55mFclUdJ9viMHQ2kPKFLNMzt3jHXfcb
 X1wmAwrYtM976v6H8cYBKkZLVdWsruZgDO15CR2palBwHFCle10tEIWU0I01B/mT
 /ewV8pNb5GXfXBYMSAzmp5DJLVcPEs+Bukdad7kq2Dd1qNgNjF/CYXDv4aRPHOCG
 R3juJT1VfNcUejwsWWWwuNaxeziLRJu9aKrQt3Pby0XezFAIuF16/1SLMpSqWWGm
 GsvMoc+yptmLrAoRqpwC5X11MD/BIdRjR4Stp9fiSFVUi5MB1d/Hn6XlmIxaSOvW
 sZx8BgwzCcsqyQy2PCxqQs/H/J2d18FyGBIg/OHCi3fodubdOwVTy9YV8KFVN+OO
 a4Vm+wUaLBElOfNdgAnU69We48XuL3gazVTxfFDOtNI0ihq7oV4=
 =Gs3L
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.5 (take two)

  - Add IOMMU support for PCIe devices on R-Car Gen3 and RZ/G2 SoCs,
  - Add HSCIF1 serial port support on Renesas ULCB boards equipped with
    the Shimafuji Kingfisher extension,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: ulcb-kf: Add HSCIF1 node
  arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1
  ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier
  arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes

Link: https://lore.kernel.org/r/cover.1686304614.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 15:00:25 +02:00
Arnd Bergmann
1b84450ef0 Amlogic ARM64 DT changes for v6.4:
- Introduce initial DT for Amlogic C4 SoC based AW409
 - add missing cache properties
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmSC4EMACgkQd9zb2sjI
 SdGERg/8CySCny/vxHpA8kZtYhATaZt3a5zeHfuxjxvy3cuFef5tM0PbHfMQWPT+
 8f2qp1DITiCldoLxUyY+lDmKyMMOkb3MODpx+PyNAKmIP/v3TTFD3LjhZfg4ecqL
 DjJtHAwJYHuJ3YdyUYfMB69Ac8ST1X6fWuBD4HqX3qOaS/7aeqUxmp/M2w1KeJE+
 E6cume739EF1AGaRBoHBPgjQtSWGuHxGtxgbbVVk93BxEBgGEegzxjkJn/gWSiej
 wRgk6Wpi0AZSK9ccFSs4KWwDibCpEZ54/LtCsp8PMUVKrCWG9GB/XFS2u2p642mD
 zuJaoVMHQyihNO2LJdWzUAQ4uWikhg6DnFGWq0G27MbpRaaOYOkE4qVHF89itFHe
 fj8DMKSVqnBTUkr+3slf5dXGSXchiBjscS8vWsV2P7NZK7wPf5ErKLX9vLwEH6bB
 mdbo6r5BAJeOre7C3GC2I4GQmNXGA1ObD9MPqYEhrN/gbRNFAW+wovLo/ljUxpCl
 pngzx10r8aLy/QXt8AjSFRxWaesH/H7ZUEbrLAzaH3Dv6tVCqXmU4VEA4+inCL+D
 YBDANwSJrf2lhOVq13sfkJ49cNdnDL4pwZXsJ/RMxPXBokBraSzwYQueLWTtyDl+
 8PFsrJ0SKgKllJE37bsBLWb0z6v7mjLjjJpexrbF8Tb0cb5whyY=
 =zvks
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIiYACgkQYKtH/8kJ
 UiexgxAAkdu3KOek/7RU2Jo0eHKxNgKXI0Vq8VdqnSKAnZNtRx21LMD9OhNhntLJ
 7Ng0tWk3WWe2xpJkEaChdV88Gx8BVgrSHzodlyjVgyADW8joV8CfUWb2duk+VJT4
 kbu8HaQqijKXIWYca8r7CG1ykRUbOuT7waZe93HBj8ew9hM8S7nP+NUHSMcO2NF8
 w/SgrmHD8OKC7cqdH8FZqyzX7C081K7x4edQR4AqwvaMP2t4QURbN6JfF+q59Z3Q
 Q9tVmnxdwW+PFwcLdapFbD0S156pyroG0Uth/reB1KLI/VdZGtfIiyr5GvnqfjOF
 XYSn5rudEaUJ+Ov2Fs1v45M0CTY4ouyGId3Sx01hyLC87tokNPqdpcKYAfG/mnT4
 qJ0ajscSiJMr10fPv7p8grX527DMoqbQMO4MqFfZwda+Wtbdi248igYfW4QSjP+d
 6rQ8r2tNyLRN9vMfOSurdpiNtDmXdm8TMWTUJmDJbAj/wKuSxkHy0pS39dZrkQzu
 bGbxUT/ALVI9hrkHRK/mOq8Jo5tjOJcs9cU76Yb+EWnH3hx8pQ+DGS7nmiZkODve
 /6GUqJZNPotFFTrw24oUERQ7Pko46UhP/s399WQVRVox0XuDDRpjIjUhPv4UNSjU
 ezP/q08qqsHTRrly3DYgDOlENQIZTO8cEB1ZXU+BLmow0zRbdz4=
 =Ubq+
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-arm64-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM64 DT changes for v6.4:
- Introduce initial DT for Amlogic C4 SoC based AW409
- add missing cache properties

* tag 'amlogic-arm64-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: add support for C3 based Amlogic AW409
  arm64: dts: amlogic: add missing cache properties
  dt-bindings: arm: amlogic: add C3 bindings

Link: https://lore.kernel.org/r/37e5de2f-47f1-a3f3-f1e4-4a304192e556@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:59:18 +02:00
Arnd Bergmann
705ebd7768 Amlogic ARM DT changes for v6.5:
- correct uart_B and uart_C clock references for meson8 & meson8b
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmSC33AACgkQd9zb2sjI
 SdF6HQ//T5BjiJMeH6mH5NcppR9CzQotXp57V6eniaKeuDS+KxciPB8eupnJSBLG
 s5E6TUj5YnPu74CH7BdXunzItzDo15Fyfevmmxw2Xzsuwn1kjdRczTP0aP6TWeAY
 WegfueU2xXY/I/tiwMdgtshixd3t234Gh7FEmDE+n/8Krro6XYY37EDzZniVzpt5
 Nm6LSc7+tT4UIpsM75VYYorhsgoFykO0Dt16HlB38hkq2OCg/lcZORoTCL7krA61
 WsGSu5TabiaaOYNDCdtivB+jMlTtka+fyQG5p4K3g5X24v34XNjiIGAmv4a+CxRS
 I9hiSDuxJVViOTrFvsgIlgc8BkFSQVhzZ8MSog+tkneBcR0C51BfLRQ9/zjJToCu
 YtfmBQSB0omolxTouizpRAbPSMDDyQSUTQmUSajEP14ySltS8VTBtB9GRhb/NXU9
 UkuqDBAlyE1iw4JUuLm0Gg9W1jHHzMRqAXAHCNbkWVB/b7Y8N+pQaM4NcP3FYubi
 KvGDOMTutrJTtLnVxuLrkEOhv4HHk2pHVVc25FDU/tJmzNbNwZqEVp41CQ/vfOv9
 GgsyKKu84WktgXI86GOXU7AiPQBCXmpgqc504qDndJs+41umWThgtSeuWlcjFgKO
 +HKb4X6xhRgcQkUVgQ2skwD2l8TCEcM5jz0XsGCjQ0ZRYqNsnQE=
 =AOk2
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIgIACgkQYKtH/8kJ
 UicGkxAAwB3tGmg5vIRhOeulGwRYObDlLilKQkyNnTcIgd3KC7hMmpp6ol4ZAh0T
 vLAHlXHOGru5WOJiiUT22RoX1gGcjA/DgX1Sv4H+/Gz5Osj7SdHnc9vnvbFYwAOs
 YnYNBvJmEV6UbszY8RYNslpHN7pyIUAIOmNhmLCghAnK2Y9LvVfLvuW6eWwv/JTM
 aLBec2M/8YlToYyNX2eRlsj0yBZUz6W8HwTCJ2WL+whE/CjTLnfcmI4+RsbTGRzD
 RDQLi4tSBk6jUE6VvvEMXwOh4JvFyFcgCGYDP/2X+r1EBc7kzekgwU6gkll+w4rx
 e7FmWVxhlrN35geWwX3vw0NBg30Meue3UFxobGFSyZ9CdOR4FlZF+XqbntbGyJ2b
 Fsxhnxt6x7EcokNQHSJzLfSdp18SCwDhX/6OJ6hdp0hfMniw5uhxmbe5MJxcg1+O
 gqAkgYmRT+atvHeQkeimow+A3zRe4pw2fN9DDMuTGYfcIxum9WrioIbMcniTxUCx
 z/QFMOw2QZmi7uDDcXn1WQNj7nVMISWyw9FywK7lfp75kccIq7S1Uf6dUXoZHrcT
 b0DhtvydoGqMLhBF8QsH8yjBxG7OObCTKChTsNnz2GGI45k+n2PsJ9qpbSBFOkFC
 Zyfexbt82Wp5A4auJtkVfY5SUTnt4RGKOt0UBniF6tOsRhD4kkA=
 =yTdE
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-arm-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM DT changes for v6.5:
- correct uart_B and uart_C clock references for meson8 & meson8b

* tag 'amlogic-arm-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: meson8: correct uart_B and uart_C clock references
  ARM: dts: meson8b: correct uart_B and uart_C clock references

Link: https://lore.kernel.org/r/21b55df9-3eda-0a0f-cf76-79b1d7735314@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:58:41 +02:00
Arnd Bergmann
a813efafd5 ARM64: DT: HiSilicon ARM64 DT updates for v6.5
- Clean up the pinctrl-single node names and correct the #size-cells of
 the pinctrl controller nodes
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCgAzFiEEQeMYD8qOQTc1R/snC8hXbtmJZlwFAmR/9o0VHHh1d2VpNUBo
 aXNpbGljb24uY29tAAoJEAvIV27ZiWZcF+IP+gL1x/W+45zJZzhxfjUHNbf3xSJ8
 zvvkFqGvBmY/00Eqg35vuS9awBS4arsMosb+aNocGRnQfwwG8+wUUf55jQ4pTmVB
 AuFTygL7I07POCtAWJPGnYoMts43bAzMM3l0NQ2Mpmifk0I2ncv5cdf5Vw8f/2eT
 M72r7y74UobNRkQ123TqoakZe7Xq20FjJ33uCEI4mcBkhauoQGliHJtT7IzosHox
 iHniPIFVM2AW5c72y+slOWGX4aovy55IdGDdfmu29LUKAzlSNes4vFKZgFdiPjre
 1UJ7aJiTjNeRsCrT/gNEO5w0U1KRYBAxRuh3RL0VqqgQHRiDcQnNY2E8TqDepK4Y
 uIWMlbdyDmzkUHfs8GOKy/OSj5bO8qAYcuM5KkF8hHCH8Kp5/2dZCuAZ7pUELQKr
 xLsZ17pbPHQygSJgt2Oz7uzrH9EQK3asstSZtyTKYc1rfttoszioHfwowA0xxz1R
 vMDNKiS0V1KuMzLQAsw5G6oYLUgMEYTyF1Hx0jdWfRTI20j1eeMlzuho1EchFl+D
 QTcwMFw1248y+XA6sOpQSsAnA2kUQ8EHBNVju+IE+eLuyiF5XM8n+91xpClaec/d
 MUaKoxME6Q/ZX8Xkcx8izANG67iklquMFyFAQfYRdzXdmQ07pn0BCcvmCaM+gHIx
 Se92VqYNS7L6Tzyc
 =Zjh6
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIdUACgkQYKtH/8kJ
 UicHpw/+IDZaqkq+wCgmQyeoUiYx9piWCQBrTG5DIry/TMm7J8jvquv+1Mb1upxO
 GBy+jRdFIVFEdw/fn94k+/+k/3nr383ZuEt0HjfjrbtK33jPM7o5IopGllagogEy
 741+a6GraDBIojfXSeuxZjjhrJsg2TxEvirPKQgUp9GNgRm1jBnyQCeCujXbHixB
 DuUsRbVEwo4rwGAsiowwFLz8mGcqNmznO4ZqCmYzgjA3I1e/oy2zAZ4bhjn7Unz2
 92/o2d+52qZjEogdMmOMmAmFceEBqDgMSdw/na6/BoNyLc7I/HF1GLPVecvhh76S
 1ReVYmdxMAKTC818mUD97Ys3RZ8eS0KHJu+El7JrC6zAf7wNMWFvIEPcACJ1fapo
 XSjkQHQWg534vh7Wk0CrEKnnnWvxazoB9JqZSt/SOuvO/j3Tmn50EZp59Pm4mWz0
 uDESK+CgahIuRRAHERf2h3TzPsL22s875V+th77CAB+1Hpbs1rsX6IYxOey9FTQW
 NijjM+HEeHEVMvRxOMXrf4UQ13UFnV1rpEYGSxLyI3w5Dxc6WllN7DTTe+OmHS5P
 jEyzCn0KKNJUnKW+y34rVeRFNgN0+gut6+1qq3qpXnxZZdzifLYX5S2h+8Zmhs+T
 2Mqo/WRbCA2jJhaGqrS8O7xhYVcHjxhbSgyG4Ev11xNsjWG24xo=
 =nN7b
 -----END PGP SIGNATURE-----

Merge tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi into soc/dt

ARM64: DT: HiSilicon ARM64 DT updates for v6.5

- Clean up the pinctrl-single node names and correct the #size-cells of
the pinctrl controller nodes

* tag 'hisi-arm64-dt-for-6.5' of https://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Unify pinctrl-single pin group nodes

Link: https://lore.kernel.org/r/6482C916.1010507@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:57:57 +02:00
Arnd Bergmann
2ddb56a5c2 ARM: DT: HiSilicon ARM32 DT updates for v6.5
- Clean up the pinctrl-single node names and correct the pinctrl
 controller nodes of the hi3620 SoC
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCgAzFiEEQeMYD8qOQTc1R/snC8hXbtmJZlwFAmR/86oVHHh1d2VpNUBo
 aXNpbGljb24uY29tAAoJEAvIV27ZiWZcmUgQAJai2qGWgj7qpOtSQM/FHbOGp0dT
 /KN/a1pv+ZgWWGsGDTR52sPRu3p1cDn5OW9w5sk3u56WLoopI/CliN8SAFLCrXBK
 6auzxMnZzSsDEEyqGUQlEGhviWPdQarEMuWUGzZxnS755+ezbwepaYg29ZEwvj+8
 hhyAhrWoCr9u1StxET1WNMHlo6vOJ1EC2D6mVJ0GUmtg762g/ffYIl5nx4pndvLD
 LXfYpqNvbMPzKtKdoD/hIMPBTB/VUSK6NXtAkPtlhQZNUgxkWzAD3InvuzmhLDCa
 tJ5Bu5bN4YZKWCWLUmpQtS55SfCs32mjMt0xjYV9hfDUq++MD3Iz08hnUfzRi/jh
 eVzoNSmL3DaVBlSPkyLnCQypwR1rukZ+gEaORIYTH6lSmxYZsO6l2FxoAtmdntuk
 +h2JfrY5yUVqgZcWH7+ki7Xnt4pLXsozc3jPVNLufbWA63skaSalCX0/0X6m4oqP
 8tVDv2nWwY/tDDjyH80OH6PVlhc2soWbdS1mWcY/eLCBMXlLB/7CSo0MOg9Qi6gv
 ObZeR0xW6cMgTxJ34OV2QlqIjcrwVmagb6gZBc6P97WO2cz+Hu71H1fsdjUhCnvD
 QRQXwXHXxcPC3BEtpk/Xfb9EKNRQC4jmJpxQPzrZZyN8YNnM+gL5wdYIjJWqL/IJ
 aX2NvtS1cvCtrjBM
 =AgXp
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIbUACgkQYKtH/8kJ
 UieRVw/+IqUeGmXccYyk4fY22jfyvXNNw2iosSgbBEaHIPU5bAVefli+RbucuahS
 x36ffV3Nr97DOaTfYsO/iOz7IfitUjFELuJ7+CDo9Dknc+NHHZKY/OV01I5qppRf
 xK3bZhzFy20LYGBhN9h5fK+ksQYSMpOEssXNr6RAZhqkOdkLQhTeja0cu8ZljC9Y
 /RdTibS8kL1vU13N1ba/FItOe+XyP0NnWvhc4lWL7cDHrauXqm1EOxYcwlcH3BLX
 TdcvdhyVdN4tLC+M4zEh2nxlqMVTnAi4BNTkPfEwZcv7fyT5CfezD8xvevoJydQG
 LXdoOR3IDFby4EHPnBsgM9oRZ7CxRdAg8IdcrASW9hQBID9oqD3Vlsa9ECQdNmSl
 QKEHvpmP9PGHsNCQP95VTBL0oVdVix2dGjh6epUkMPGxCHMQ69wTHK3X/q2q6ugq
 sQIrbauuRvWOxJs0U+VLHeambxxRRyxhG5VJV1eVw+70f0rjsjxIsWAd9jYM19eq
 u2Zev6ePWj2RqS6dbnXe2sFX+VyUu/sIVnRyrlGkmAE/6FiJvLwdpn0zj+KV2cs0
 RlZquaMSwWGqYwN7/PvvobmWc0u7iqiU+GFUE/amsgdTDrmPDvv+8nNkmSGcTnzt
 e+Z5PNGP9L15UbzPSmkw8rvmERV2i4+1TwEXPfXT+pycdilwccA=
 =XbeL
 -----END PGP SIGNATURE-----

Merge tag 'hisi-arm32-dt-for-6.5' of https://github.com/hisilicon/linux-hisi into soc/dt

ARM: DT: HiSilicon ARM32 DT updates for v6.5

- Clean up the pinctrl-single node names and correct the pinctrl
controller nodes of the hi3620 SoC

* tag 'hisi-arm32-dt-for-6.5' of https://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: Unify pinctrl-single pin group nodes

Link: https://lore.kernel.org/r/6482C732.3060300@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:57:25 +02:00
Arnd Bergmann
08750aa8be ARM: Zynq DT changes for v6.5
- Setup 400k as default i2c frequency
 - Wire i2c recovery via gpio on zc702
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZIHB3wAKCRDKSWXLKUoM
 Ib/JAJ4wns2qNLD6T2ceSbcp+NnOGHzRdACfY9b0V1+ZoDR9KUUKzW8qP1wsFNM=
 =NSh+
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIWcACgkQYKtH/8kJ
 UifMhA/+O2Dg87hzf/v77moxCE4ouLEQbD5N0RHvxFFkfF6c22kxetL76IW7OikJ
 AeOLvNjRPEg0TbY7y7w86yfhAUWy1cP++Qp1Btk9zkJIwxkEA+8GKWR33hCu0XSQ
 rzaneLQNc895vnMYGrxIMfKlfk/PKBc5qRD5WP7bsZ7b7hucQbnBeCZ0I9hbw8gs
 QZaywLPG+etwVQR3gy4b2QITOrCx/CNDtZnn0Ja19P4JeAw0qHcNBvFBDQf1q8Kd
 tGt+dyB9zRXhS3dhaOrpxIKOspg5Zh+WXSEkLIXUIpdIZpTPWxWxSuTRIkH9Ttyr
 WAnTvCYM1JDe7UHoTkSSkCis+StNFfEkcXd6/me6FDRFEy1w8b0X87Ul6mHRL9nN
 EGPRAqP+MSmGNe1gPCS1njTIbwddC9e5uZAM3xL9kKeHxgDCK6BGyf4JShPGrQau
 meVemYb55IqBsTJiUIUscptrTks0JZIBhlTEJOLjYkj74BKnGYw4uLMrx7A282JA
 bKHaSS6/qDa3BSVQkbH4wb0fScKyzMNpN5Y+Q7kSNg7pe1Rw8/4XO/JOpMhhFQAs
 RM8NH5W4GERhrkrfGIIM9AFjljswnItptqU7u9TwvWyHJW61k3IJwg0gdykKoj4W
 WP3JIRPXmYiF5mrUDsC7zukjt50ANql3+ZKIgG31GylIyzZH4vI=
 =h0ha
 -----END PGP SIGNATURE-----

Merge tag 'zynq-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt

ARM: Zynq DT changes for v6.5

- Setup 400k as default i2c frequency
- Wire i2c recovery via gpio on zc702

* tag 'zynq-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: dts: Add SCL & SDA GPIO entries for recovery
  ARM: zynq: dts: Setting default i2c clock frequency to 400kHz

Link: https://lore.kernel.org/r/c5c99ba2-f004-306c-6251-551826f90df8@amd.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:56:07 +02:00
Arnd Bergmann
739c4c317e Clean-up for pinctrl-single node names for omaps for v6.5
To avoid producing lots of make dtbs checks warnings when the yaml binding
 for pinctrl-single gets merged, let's fix up the pin group node names. We
 want to do this rather than add non-standard node name workarounds to the
 yaml binding.
 
 Also included is a non-urgent fix to move gta04 model name out of the pinmux
 node that can wait for the merge window.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmR5v28RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXOxshAA4dioIg3bNSQIIyK2Z23KuT7tnK3D2QqZ
 CBBqdj4K/IqEfDQmqq8urLed/pbaMEbVngCg/25tEtSaQ3o93EebjU0bZnOeLRU9
 1wruwGugrKrLA6FmSdpiddpW2KLFFeEqXzB6ktP8G7A6EM8dPle9Im6RIPUI1wCC
 QP2Nk6IRFhc5fR7Es3pNFTYmtpm2mdQ2HalO8LvVawu7lpnfNA9YMpRWLxWp2Q7l
 47CJ6jfitE1qdMkIsIsdjX2Te43QwFTifm5P/q/6LHNofO2tTItMRwjXK4GsPCuk
 iGmiwCv1S+tJbw8gMO4r+FPfejuxEuFeSRgqRFxMgb+lTHKfF+7iSupP2JH/XiFp
 KVEL45inw83f3iOycDWB4zcXPMLdWQcQwKGpNpsLb+h9Frtmu4D2EgH3tIooqj3w
 fw5krbq8HiUTLgy5W4yOdMXofUCKN6gmzQyhmJ+OcRMk0HfwoKV9rHjD1Dyi51vb
 B60xZcfK42RQUOxwbErGHzvNTJPv9fcurD4Dre1fBjmJzueeKgfAu4flhfVjisc+
 LuZjYpWpWDZLszKFrP6IlQPn2h2NxJJDWyvdaKRoGYvVUNPgsJbPU1ktG6wRhInI
 tjUYAZijy70Y2A7HuaWOHfg8wtHXn2bs0mXMg4sDZQ0e6rlBwqVTpxGQChx9NUx5
 +dxcKj9i/rU=
 =UyIV
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSDIQkACgkQYKtH/8kJ
 UieLfBAAoN1wCdKB8YC9w8mfcwKippLcqO6lwAL0A6EGdf1bkbQsGS1whHvFFnuU
 BdYC+vI7DsaHO79GMEHIqzNW4sAGUytN3f0sLVDyUy90DKpdgI+1HOhkvYm2RoE6
 ZPb3XUrQZhq8eF28jc+ByyCWL5hEed1VOAHNp1I1MhE4/VUKesaHhjV3+U4EqNfJ
 6Gz2biVR/4Ft/SAI5JfCwQIzQSKeEhOa8WXIiSSMmw8B/gS0f74u1hnhDrGT2nvW
 I6iZ8Zs91YWsSfA4O+1ggtO3B6XaGsgJk8BNJI1dTNB+VHSlatIH+b+OjCez5T/b
 0T1GNjKdlI1cz35TaZEbLpPrnaNW5BcnR7dkTRbXsFLom+JfwYsWmKot7k5VRxnT
 WWLC5g88mcAaouFSBQsOeIFfjxpbPLYcIfL4tUKufIMB1eV+ObfHNamOfx3IYpox
 wbP+QCN8iY2bS0a/P+ZgcqFVgBI5HsBBCraIvwQ1tKpM6Tr0zRDP8+c6URfBMoCc
 AINvC2++j9YiH2D//14k5NpMFJFA2Z8zYFV8XB3eJxstBe+rSauJkb3PsMGS7QN8
 0yPrf5lDML652w1gLvxMT2JoXI/Nrc8mGVmc/areI08zmT0Xe1BgJbxZEE3nS6f0
 kWjf8X+bjoK+TQCUwGf6IGciNQ8if4hfT2YK0ByLYPYPn6hSiK4=
 =Tmi7
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt

Clean-up for pinctrl-single node names for omaps for v6.5

To avoid producing lots of make dtbs checks warnings when the yaml binding
for pinctrl-single gets merged, let's fix up the pin group node names. We
want to do this rather than add non-standard node name workarounds to the
yaml binding.

Also included is a non-urgent fix to move gta04 model name out of the pinmux
node that can wait for the merge window.

* tag 'omap-for-v6.5/dt-pin-nodes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Unify pinctrl-single pin group nodes for dra7
  ARM: dts: Unify pinctrl-single pin group nodes for am4
  ARM: dts: Unify pinctrl-single pin group nodes for am33xx
  ARM: dts: Unify pinctrl-single pin group nodes for ti81xx
  ARM: dts: Unify pinctrl-single pin group nodes for omap5
  ARM: dts: Unify pinctrl-single pin group nodes for omap4
  ARM: dts: Unify pinctrl-single pin group nodes for omap2
  ARM: dts: Unify pinctrl-single pin group nodes for omap3
  ARM: dts: gta04: Move model property out of pinctrl node

Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-09 14:54:33 +02:00
Xianwei Zhao
02310be6f0 arm64: dts: add support for C3 based Amlogic AW409
Amlogic C3 is an advanced edge AI processor designed for smart IP camera
applications.

Add basic support for the C3 based Amlogic AW409 board, which describes
the following components: CPU, GIC, IRQ, Timer, UART. It's capable of
booting up into the serial console.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20230515093237.2203171-1-xianwei.zhao@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-09 10:15:46 +02:00
Olivier Moysan
076c74c592 ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
Use "dai-format" to configure DAI audio format as specified in
audio-graph-port.yaml bindings.

Fixes: 144d1ba705 ("ARM: dts: stm32: Adapt STM32MP157 DK boards to stm32 DT diversity")
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08 12:08:54 +02:00
Marek Vasut
e3f2778b1b ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
The audio routing flow is not correct, the flow should be from source
(second element in the pair) to sink (first element in the pair). The
flow now is from "HP_OUT" to "Playback", where "Playback" is source
and "HP_OUT" is sink, i.e. the direction is swapped and there is no
direct link between the two either.

Fill in the correct routing, where "HP_OUT" supplies the "Headphone Jack",
"Line In Jack" supplies "LINE_IN" input, "Microphone Jack" supplies "MIC_IN"
input and "Mic Bias" supplies "Microphone Jack".

Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-08 10:47:17 +02:00
Tony Lindgren
35e6bcd138 arm64: dts: hisilicon: Unify pinctrl-single pin group nodes
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.

Let's also correct the pinctrl controller #size-cells to 0 while at it.

Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-06-07 03:05:31 +00:00
Tony Lindgren
709f6754fa ARM: dts: hisilicon: Unify pinctrl-single pin group nodes
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.

Let's also correct the pinctrl controller #size-cells to 0 while at it
and drop unnecessary ranges property.

Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2023-06-07 02:55:48 +00:00
Arnd Bergmann
c5c3f746c9 Devicetree changes for omaps for v6.5
A non-urgent fix for gpmc,wait-pin property for am335x-myirtech-myc, and
 initial support for Epson Moverio BT-200 AR glasses.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmR5wBQRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXMIFRAAsUrkbnzrvyOtar5Y/9kiAy2fo5pAcv6c
 +X7788afMQPRsjEnsF/m/FHywS6Qea3WLEXSzwr00Ms98jPyrcR7KdSMj/sQNsr3
 KmzhrtxA04La0k66E1ApQEBjHesz0Ba2qIxivlOG0TZOupPahxPU/i62MixK+oW8
 lNBdVTPQcoHzYaaaVRjUih2ssPpvEcRlgefLWWtgN6sdpgdw483Na+Sj8/dRjG6a
 pj63LMVIPZ3vOnMIBS+ETerZMhm4Vn1EU596462vqzjFOaYAWEyfQWhEjoqpd7MQ
 +QjOr2Oh0460sPQKRta+YTAxfzgt9fKkNtpFevjjWH1aTnda6CXtuK+01HnxQFO1
 FD3tEJRFD0WlVDDgH4cBk8vVDVkQI9fLNyVGPXFr1U7bik7iaaIYn9pf0MHpuo5t
 X5QP9AQtInQOw+I65Tx6jYOAVTpl5LxDibzUN+93qjEwonrMOwazHp7RR9MIwBP9
 D+5kX4KuPE9GCYcsV+UpimWZGTpS9kOgc+fsIPKvRW2SUdUg6CV0vFv2AElODYvW
 7FUguGWeQyyi+1axT5SphHmUKBPCbWXz/QMvQs7lR0ElWc4FriKVCmYVrBB/lwLH
 jVJetfjPZtZfVyupEf0MRTYxe/Lnr+VisGzunZsKFSdnhMNqMbZQZ/RmgRuyK+Bn
 ieCB5UDCz4o=
 =WXWj
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/U1AACgkQYKtH/8kJ
 Uic3lQ/+PfLUzVklVbAHnuz3Vedmg4Z6y0Bj5yTXz+UudI3Um+C2AGtvQGTV7E1L
 mXEiZPG/eqRZN33yQww3eCDzVbsseihaKymHVuD7zDIgbmewONq5eFYlFJFbciLS
 Ihy9LAWf4dLn63Ax3smvpa4pDx0Bm7aL4/j4+v+gN40QSxOFBxVFXlhd7WAoNY5w
 jcZO0BhavZJ8C2Sf+KxSfvru+kaoLhBJ0HozH4wqemgCVYo9DuZYk4bz91MJ8br5
 ZwEY5L1kGImNlhoCzEwI/95fRbts7T7ykrDs3tEtIRosruulL2myyJdXoFQbTcvK
 VvQ9GZ8kNzGZFmfHaECZ10nMuOW/dnVVtEmOGcW46+36LvfXNSIXUvRT0BkjZ762
 GqYQETnwi4JNpUfZH9gDSwq5C0pwL5Ght96TcWvDmDZrUpYgI/oiIxeXpjjBjhhS
 lkAW5JoGCQb1xM+tPLxcz0zn2vYF1CWmVSQMuLA/YgkfZdOxDvvF1K8yyhZVeu5z
 eQoAMD2mEU/OebWHjOax0Xj1Kxwjd551G2PbrIAYmIP7DHYhNeamiqisiAHuX8kf
 jHUNQxmCFcO/hAjd/8C3a27UyRZaqKwxea8e93b4w2O3eHKGCxdyTSw0MvewJFsb
 Qq8otBWuUeu4S66bldO+gdLZ6sg69BXZ1gK+NWWs+m6nvJlNAao=
 =ExSy
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v6.5/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt

Devicetree changes for omaps for v6.5

A non-urgent fix for gpmc,wait-pin property for am335x-myirtech-myc, and
initial support for Epson Moverio BT-200 AR glasses.

* tag 'omap-for-v6.5/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap4: add initial support for Epson Moverio BT-200
  ARM: dts: am335x-myirtech: Add missing NAND wait pin definition

Link: https://lore.kernel.org/r/pull-1685700720-242492@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06 17:40:00 +02:00
Arnd Bergmann
33f0ceca11 Samsung DTS ARM changes for v6.5
1. Final cleanups and improvements as a result of dtbs_checks which rely
    on previously merged driver changes thus affecting older or
    out-of-tree kernels.  The changes are necessary to achieve full
    dtbs_check compliance, which justifies affecting out-of-tree users.
    Changes affecting them are:
     - Drop simple-bus compatible from FIMC: Exynos4 and S5PV210,
     - Remove empty camera pinctrl configuration: Exynos4 and S5PV210,
     - Re-order MFC clock names to match Exynos and bindings: S5PV210.
 
 2. Except above few more non-intrusive cleanups for dtbs_check for
    S5PV210.  Fix also some typos.
 
 3. Re-introduce Exynos4212 which was removed because of lack of upstream
    users.  Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmR5rNgQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD131PD/9b9jaNO3NBJdHCg2e1XOG4Ca4EiZy7+c7g
 JUqQcgdy478eXYSF2WM1qNLJjOIlnHgyWPChTHsNK8W0bD0wqR6JQReE5ZYj/hcA
 5C1FrL5YMfA9ZHtyLBPl5NEilwtPYnNyJw7+LkPQdZIC8QQ4k4JaZzYtAgESAc3M
 0uphSKcTIrT/hdbAA82hBFIGdSVu1GTiKfWAPRTKPyA3BGuYY8dLfMTIQ2czxVDZ
 CbH1m2R/d6idppyDEkXmUNwOAOeiWpGbiJEcOEOwXq68hJUpkDjAJXs5QKlhb2Ue
 TOR0DJp3ZorWt8WY50JXy/8Kzv3i/QgLugl7+3XMyNSvArxiFyEEDdZl9WXToJmV
 hi5KrbWmMdKIuUGpFON5ZGzsTnDUYuvpILCWU7iyP59DA4pJMZW42JTskM1i2aDb
 HPXQGCjQDJONuJq9MtB6QK+zCpHMO913hXIG7GsIiW73bimjER3y1rMW93PUL49x
 08tNHWcyFN4ghwXcMBBbrf7yWfQ8SVhUSRnD1LGcJYj0gwaJgRPHyKDnApgxxIKB
 35lVRH+84SYslLmkrZIJTN1lw2yqHF4+oxrnza0+ItdaJyZk8rmXaP34VKYjXZxs
 y5SBjVZ8lrdCIB9kVhy2DtRj8vLO88uzUFRmAQF54TRL62jhC56T2gl7PJQtCfJz
 OtyplsT7pQ==
 =prN6
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/UdwACgkQYKtH/8kJ
 UicS0xAAqi4ctbU0A4KNOUn2y/U1amFrEN9l7nfYjUCb1CH6Z1qAvRTyoOxO4xB/
 dK82QdS7f2si4IWurVGeWfdruSqHWure1Py82iD2oIoRm0XIOkx/5EKSmPYrEXrJ
 NbFl5lt5ox+nQLdD5mLAKsxswTP3bfor0ILYFYJj5zk5hEhdk72lGmXboO/0ulYn
 sqE8JugXgxCehbA3xYbShghIdLrapaAnQDzawTeXKIH0IFdMfj31X7kQr6D6BO8S
 EeJTvNwhaX5ZCTAgWmWX4O9fOoxj1FriRuic5WYI7skjwBwgsX2uFK/t5lV2pYn2
 9gazldz0Bx5vu/DitsAmK1nyj9ma8996j5Vh5L4DLz4uo566RkNI3cEYHt388oyQ
 d/zIloyu14HHr3YtRXieSakTf+FvHlMmHEvOMsAgqibsXFvHTJh5st6grIZHj3iO
 zmBNsLW9tcvhLDe72QPcI4ZY/QWyeROuEH/d9OedD+whTpFA45kiG+qPZZYKKcl+
 ZxOQC0kib7mW4KxvGLZoonzNC8vUMmiCbsPrkNBerTQdVHAvHt2GiO2aBvibNn/U
 QismtyjiMKBLWb27MNngWURlWDv9kmu+p7gnF19sFUhTdJCXfeTiL9PI13tvRHF3
 neG1BVchVXPUMUwymqW4RqZI01tp6H5OssGdp3kM6goXYcMlA7M=
 =7GAg
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM changes for v6.5

1. Final cleanups and improvements as a result of dtbs_checks which rely
   on previously merged driver changes thus affecting older or
   out-of-tree kernels.  The changes are necessary to achieve full
   dtbs_check compliance, which justifies affecting out-of-tree users.
   Changes affecting them are:
    - Drop simple-bus compatible from FIMC: Exynos4 and S5PV210,
    - Remove empty camera pinctrl configuration: Exynos4 and S5PV210,
    - Re-order MFC clock names to match Exynos and bindings: S5PV210.

2. Except above few more non-intrusive cleanups for dtbs_check for
   S5PV210.  Fix also some typos.

3. Re-introduce Exynos4212 which was removed because of lack of upstream
   users.  Artur Weber adds now Samsung Galaxy Tab3 with Exynos4212.

* tag 'samsung-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: s5pv210: Fix typo in comments, fix pinctrl header
  ARM: dts: s3c64xx: Fix some typos in comments
  ARM: dts: exynos: Fix some typos in comments
  dt-bindings: arm: samsung: Add Samsung Galaxy Tab3 family boards
  ARM: dts: exynos: Re-introduce Exynos4212 DTSI
  ARM: dts: exynos: Move common Exynos4x12 definitions to exynos4x12.dtsi
  ARM: dts: s5pv210: remove empty camera pinctrl configuration
  ARM: dts: s5pv210: add dummy 5V regulator for backlight on SMDKv210
  ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings
  ARM: dts: s5pv210: align USB node name with bindings
  ARM: dts: s5pv210: align pin configuration nodes with bindings
  ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3
  ARM: dts: exynos: Remove empty camera pinctrl configuration in Universal C210
  ARM: dts: exynos: Remove empty camera pinctrl configuration in Trats
  ARM: dts: s5pv210: drop simple-bus from FIMC
  ARM: dts: exynos: drop simple-bus from FIMC in Exynos4

Link: https://lore.kernel.org/r/20230602091501.15178-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06 17:33:48 +02:00
Arnd Bergmann
4d1010ff17 AT91 DT for 6.5
It contains:
 - gpio-line-names addition for at91-tse850-3 board
 - support for SMA connectors on lan966x-pcb8309 board
 - use drive-open-drain as boolean property as this is how code handles
   it
 - generic names for clock controller devices
 - use of the new clock controller bindings for at91sam9n12 slow clock
   controller
 - one blank line removal on sama5d2.dtsi
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCZHXRoQAKCRCejrg/N2X7
 /aM4AQD9L1shYbMzPEhqj7UxQUXhGmZnoDzd5aP2OicgUS5JDwD/cg3CM29eq8Fj
 wW21GjSM/evK3sDfdbDmvatIM41uhw0=
 =zMgl
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/UX8ACgkQYKtH/8kJ
 UieYbw//WnKz+UvPj8HC/HUz8MOKOHGfN4ZOyiV+Hg3Tt8L3AntU7tpPraGwpuy2
 9h7rBBIPxk182VpkHIpcVCTH4xt8XQvcZKLaZoe57CaPl5VmpbFBavExtf1wzKbY
 f62LaZce/rDI/yw9F6S0+WltzwRhLSMmX/eyGAlNgNfcezd+hFKvOY3/Jt5XsVgA
 i53YTMGfryCWEaUW5F5qD5WOqz6d+LmxrKLbnPQpYjqPIaCF2K7GD+FspH0iVNpf
 wpmYZK+ku0Q3OXpRL6j5FZhXG3q7haRRB86/fp31wU+IoMEx9Il9G6NHfbe7dc8Z
 i1bHQOKUn4OPsftt5ld35v6MsJ1Kc4CWF8Rz7cOIIvDjDfsvlT91uiIMhg7cj+ql
 eJvQUlKaj1P0cjv5KlXD2pIUDXlVHNK3YGcyzHf42+P9NSDaggFgvCywtO2Et744
 46PHQ+IeuXFpbUuxFEPMn+cmzRZqodBDqSY1EWRwAIvC3nTAA14outEDclWh4rLj
 3QZPIcv/r4TMIa+OSUL37eUUhcx8v5vo8qjfSBbGioDSi/XHnJA0Ef1z9cTs6/PQ
 bDzwJuF9wAIyqegDkG6wrVbEV0DU6udcpDwibesAt/AnvUGXkX9Dj/K3JTWl7h1q
 ImJPRX+YdZSw5zA0s9iFALjp8RxOqQzIKkptlCV3toa2dQ0RCGo=
 =aFnJ
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

AT91 DT for 6.5

It contains:
- gpio-line-names addition for at91-tse850-3 board
- support for SMA connectors on lan966x-pcb8309 board
- use drive-open-drain as boolean property as this is how code handles
  it
- generic names for clock controller devices
- use of the new clock controller bindings for at91sam9n12 slow clock
  controller
- one blank line removal on sama5d2.dtsi

* tag 'at91-dt-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d2: remove extra line
  ARM: dts: at91: Return to boolean properties
  ARM: dts: lan966x: Add support for SMA connectors
  ARM: dts: at91: use clock-controller name for sckc nodes
  ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
  ARM: dts: at91: use clock-controller name for PMC nodes
  ARM: dts: at91: tse850: add properties for gpio-line-names

Link: https://lore.kernel.org/r/20230530105945.11638-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06 17:32:15 +02:00
Arnd Bergmann
35ee6a4deb These are some Ux500 DTS updates for the v6.5 kernel cycle:
- Define the SRAM nodes that will be the preferred way to
   specify SRAM segments to drivers going forward.
 - Fix up the naming of the STMPE nodes as we are merging
   proper YAML bindings which puts restrictions on those.
 - Disable charging on the Ux500 HREF boards because these
   do not have any real batteries connected.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmR0kGQACgkQQRCzN7AZ
 XXPykBAAj9fc1CTWOdLik+8uZ0Al1U1cBL6VoK/nazIf7lla/nCmAJ5zTSC6lnAw
 JtdUbyOJPTyKG5JqNvOTFngyNpChDVMQxDqgARxRcq4IRdNnE7YSsQKguUbC8rrv
 Vl040G1dPF8HYxdNSjx5hGlgqLUQRVnhe1d8bRQvd68LCEoy7nqfr4aQ0TnW3ZEZ
 IulMyA85PYmWlFgl6t5hKkCabf/tCK/mYuOM0dv0v7p1KMBLymtSp1C+89CPU/8F
 xODSeRIOHlzYgCEQfx8I4S5TT37h4DAA0nvXMaKk22WzaTqmG0EzJAF22Zad+RzN
 vKmYIJcELPV+ItCy9Vewrmwdf3y0mzIOzwTJeBxFc7O8PPyvs5VhOrBz1qjWWb4l
 HwchVLQHEQcc3U64+hVEdyAGGNGBrLn/uk3WZu/CuAi2/Nm8C8du0SBDVIfVirYI
 8ctjicsju4WUUXoAHvkCu9JCDiRCR7yUh6qoIdrZq+dDcSpPdSYsjY9o2ulJOQ1k
 6rzRSNkKs6qSTGs+xKT5lg+hd7uXyKXUn/Cd+8OSPwkWO92VUrdvP8d0k+SxXlI4
 vbNGRnsPzm6tRqWBEGK0fYdm8Q3SFOVnE1DpFBjxf0he3bRFNbCnpc8D5C1e6Kmw
 857BSmqucGyZ9Ey+CLYChkcz+MIbXXEUbx7FgDgOBsl6u1nYax8=
 =2rdu
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmR/Tc8ACgkQYKtH/8kJ
 Uif/CA/+NhW9g/NiJXwZ2+THv+46A+Dhoe+1Yu/wrliN5Li2/awypAWsLBowjuzC
 RRf1FzMhMwVNKZL5Sqy6kPUIceDBTlmarZsAc/j4qDql2XffPJBw8cggyNjgCoUO
 ufaxgVrFMqQH+dWqjYw2ybOSu0AWmN0D8zRbUwhbdJ4u8QIz1gpgH+evATGdf1Xy
 KT+1lLpol54gmC151u+JjqWPiRIgtrJ+8wlRDLTNPDeAeo1WCh+ePrX3XY5iP2+8
 dZNigT4lTGF9ByfgrpG4psitN0RdlMoPFPYj/PNjamHZUKXX8gOrgD7RN4OXykhn
 eHJqCqF25+vEuNdcHp9uKzG1KVCpGk8sWBeTNvEQSnP6fuoi2OLFIO1Jh9zkCHf4
 T+UyRtzITjY38Gxk9tuFwz4sCeqbHbD+EIcnkc12nno0sZgXZYp1bFeZomvl+pTc
 XseeM1cR1mbm7zKt7cdfKNtBUeKivwY/M4cRkWLK3ArKko6ffv6Sn8RkqSFPhQzr
 VWjEDA6SP0KvBI+sYrXLFUgNMbkVEtcT7s5ZDuDrS7cuxHZQVczDLVanP9M1XbTU
 pu3pgWLFbP/ieCb6RJpr083V61JEtT4V45BTDW382DtalUjh8dvPgTmkOJPdSo3g
 /ahKav4lWiHGhadUgkw4hxmKLKBBHvIHtfgvDFOlb/5ixl1olZQ=
 =QLb5
 -----END PGP SIGNATURE-----

Merge tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt

These are some Ux500 DTS updates for the v6.5 kernel cycle:
- Define the SRAM nodes that will be the preferred way to
  specify SRAM segments to drivers going forward.
- Fix up the naming of the STMPE nodes as we are merging
  proper YAML bindings which puts restrictions on those.
- Disable charging on the Ux500 HREF boards because these
  do not have any real batteries connected.

* tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Add eSRAM nodes
  ARM: dts: ux500: Fix STMPE device nodes
  ARM: dts: ux500: Disable charging on HREF boards

Link: https://lore.kernel.org/r/CACRpkdZ2YLzB-n+1M9u0UqVfct_LAR5cLvYyJhxHsXNR_TFzpQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-06 17:16:31 +02:00
Alain Volmat
9da2bf3bcd ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
Correct the following warnings by adding the required supplies (AVDD, DVDD)
for the ov5640 node.

arch/arm/boot/dts/stm32mp157c-ev1.dtb: camera@3c: 'AVDD-supply' is a required property
From schema: Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml
arch/arm/boot/dts/stm32mp157c-ev1.dtb: camera@3c: 'DVDD-supply' is a required property
From schema: Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 14:14:44 +02:00
Marek Vasut
9bcfc3cdc9 ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
The generic ADC channel binding is recommended over legacy one, update the
DT to the modern binding. No functional change. For further details, see
commit which adds the generic binding to STM32 ADC binding document:
'664b9879f5 ("dt-bindings: iio: stm32-adc: add generic channel binding")'

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
84cb6d8a0a ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
Use STM32 ADC generic bindings instead of legacy bindings on
DHCOR Testbench board.

The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
1866e1f96c ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
Use STM32 ADC generic bindings instead of legacy bindings on
DHCOR DRC Compact board.

The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
c46e9b6cc9 ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
Use STM32 ADC generic bindings instead of legacy bindings on
emtrion GmbH Argon boards.

The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
765ce359d6 ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
Use STM32 ADC generic bindings instead of legacy bindings on
STM32MP157c-ed1 board.

The STM32 ADC specific binding to declare channels has been deprecated,
hence adopt the generic IIO channels bindings, instead.
The STM32MP151 device tree now exposes internal channels using the
generic binding. This makes the change mandatory here to avoid a mixed
use of legacy and generic binding, which is not supported by the driver.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
7ea81ea58d ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
U-Boot enables ADC1&2 to support USB power measurement and ADC
calibration on STM32MP15x Disco boards.
When leaving U-boot the ADCs do not return to power down state
to keep ADC linear calibration available for kernel.
Enable ADC1&2 by default on STM32MP15xx-DKx boards to align kernel
DT with Uboot. This avoids to shutdown the ADCs VDDA, while the
ADCs are not in power down.

Use STM32 ADC generic bindings instead of legacy bindings on
STM32MP15xx-DKx boards.

The ADC pins on Arduino connector are not set by default.
These pins are added in A7 Disco example DTs only.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
95ee314b38 ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
Set STM32 ADC2 as a consumer of BSEC on STM32MP15, to retrieve
vrefint calibration data saved in OTP.

During the calibration process vrefp is set to 3.3V and the data
acquired is saved to the OTP. This data is used by the ADC driver
to calculated the actual value of vrefp according to the formula:
vrefp = 3.3 x vrefint_cal / vrefint_data

The vrefint channel provides the actual value of vrefp,
which can be used to correct ADC acquisition data.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
5988bd5359 ARM: dts: stm32: add vrefint calibration on stm32mp15
Describe vrefint calibration cell to be retrieved through bsec.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:41 +02:00
Olivier Moysan
04d28eb48f ARM: dts: stm32: add adc internal channels to stm32mp15
Add STM32 ADC2 internal channels VREFINT and VDDCORE to STM32MP15x SoCs.
VBAT internal channel is not defined by default in SoC DT, and
has be defined in board DT when needed, instead. This avoids unwanted
current consumption on battery, when ADC conversions are performed
on any other channels.

The internal channels are defined in STM32MP15 SoC DT according to the
generic IIO channel bindings. The STM32 driver does not support a mixed
use of legacy and generic channels. When generic channels are defined,
legacy channels are ignored. This involves that the board device trees
using legacy bindings for ADC2, have to be reworked.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-06-02 12:24:40 +02:00
Wolfram Sang
c776a2128d arm64: dts: renesas: ulcb-kf: Add HSCIF1 node
Exposed on CN4. Tested by connecting it to a Renesas Ebisu board.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-06-02 11:36:48 +02:00
Wolfram Sang
1a2c4e5635 arm64: dts: renesas: ulcb-kf: Remove flow control for SCIF1
The schematics are misleading, the flow control is for HSCIF1. We need
SCIF1 for GNSS/GPS which does not use flow control.

Fixes: c6c816e22b ("arm64: dts: ulcb-kf: enable SCIF1")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230525084823.4195-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-06-02 11:36:48 +02:00
Geert Uytterhoeven
0501fdec10 ARM: dts: iwg20d-q7-common: Fix backlight pwm specifier
make dtbs_check:

    arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
	    From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
    arch/arm/boot/dts/renesas/r8a7743-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
	    From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
    arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7-dbcm-ca.dtb: backlight: pwms: [[67, 0, 5000000], [0]] is too long
	    From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml
    arch/arm/boot/dts/renesas/r8a7744-iwg20d-q7.dtb: backlight: pwms: [[58, 0, 5000000], [0]] is too long
	    From schema: Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml

PWM specifiers referring to R-Car PWM Timer Controllers should contain
only two cells.

Fix this by dropping the bogus third cell.

Fixes: 6f89dd9e93 ("ARM: dts: iwg20d-q7-common: Add LCD support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6e5c3167424a43faf8c1fa68d9667b3d87dc86d8.1684855911.git.geert+renesas@glider.be
2023-06-02 11:36:48 +02:00
Yoshihiro Shimoda
86d904b6ef arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes
Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.

Also change the dma-ranges arguments for IOMMU.  Note that dma-ranges
can be used if the IOMMU is disabled.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-06-02 11:30:46 +02:00
Martin Blumenstingl
98b503c7fb ARM: dts: meson8: correct uart_B and uart_C clock references
On Meson8 uart_B and uart_C do not work, because they are relying on
incorrect clocks. Change the references of pclk to the correct CLKID
(UART1 for uart_B and UART2 for uart_C), to allow use of the two uarts.

This was originally reported by Hans-Frieder Vogt for Meson8b [0], but
the same bug is also present in meson8.dtsi

[0] https://lore.kernel.org/linux-amlogic/trinity-bf20bcb9-790b-4ab9-99e3-0831ef8257f4-1680878185420@3c-app-gmx-bap55/

Fixes: 57007bfb54 ("ARM: dts: meson8: Fix the UART device-tree schema validation")
Reported-by: Hans-Frieder Vogt <hfdevel@gmx.net> # for meson8b.dtsi
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230516203029.1031174-1-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-05-31 10:55:46 +02:00
Andreas Kemnade
445d5be64b ARM: dts: omap4: add initial support for Epson Moverio BT-200
Add the devices working with current drivers for the
Epson Moverio BT-200 AR glasses consisting of a control unit
and the glasses itself.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-Id: <20230313110409.2294154-1-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-05-31 08:23:48 +03:00
Alexander Shiyan
17ff149eee ARM: dts: am335x-myirtech: Add missing NAND wait pin definition
The NAND wait pin is connected to the GPMC, but this is not mentioned
in the DT bindings. Let's fix this.

Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com>
Message-Id: <20230524091157.775960-1-eagle.alexander923@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-05-31 08:21:02 +03:00
Artur Weber
6a988251c4 ARM: dts: s5pv210: Fix typo in comments, fix pinctrl header
Change 'specfic' to 'specific' and make the pinctrl DTSI header
more like the s3c64xx pinctrl DTSI (previously it was copied from
the main s5pv210 DTSI, and not changed to match the new contents).

Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-4-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-05-30 10:21:42 +02:00
Artur Weber
316c31fba6 ARM: dts: s3c64xx: Fix some typos in comments
Change 'specfic' to 'specific'.

Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-3-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-05-30 10:21:41 +02:00
Artur Weber
2f6905307a ARM: dts: exynos: Fix some typos in comments
Change 'specfic' to 'specific', 'optiosn' to 'options' and remove
duplicated 'are listed' in DTSI heading comments.

Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20230519190625.7844-2-aweber.kernel@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-05-30 10:21:40 +02:00
Raphael Gallais-Pou
5364e37799 ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
Those concern:
  * "#size-cells" and "#address-cells" wrongly used
  * residual "reg" property appearing on endpoints where it could be
    avoided

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-30 10:05:19 +02:00
Raphael Gallais-Pou
f7164b346a ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
Fixes DSI related warnings:

 * "#size-cells" and "#address-cells" wrongly used
 * Changed 'panel-dsi@0' to 'panel@0' according to dsi-controller.yaml

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-30 10:05:01 +02:00
Raphael Gallais-Pou
45e418bd52 dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
"#address-cells" and "#size-cells" are two properties that are not
mandatory. For instance, the DSI could refer to a bridge outside the scope
of the node rather than include a 'panel@0' subnode. By doing so, address
and size fields become then unnecessary, creating a warning at build time.

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-30 10:04:05 +02:00
Raphael Gallais-Pou
0c211488ef ARM: dts: stm32: fix warnings on stm32f469-disco board
Several warnings appear when building and checking stm32f429 device-tree:

arch/arm/boot/dts/stm32f469-disco.dts:182.28-184.5: Warning (unit_address_vs_reg): /soc/display-controller@40016800/port/endpoint@0: node has a unit name, but no reg or ranges property

.../arch/arm/boot/dts/stm32f469-disco.dtb: dsi@40016c00: Unevaluated properties are not allowed ('panel-dsi@0' was unexpected)
	From schema: .../Documentation/devicetree/bindings/display/st,stm32-dsi.yaml

Fix those.

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-30 10:03:57 +02:00
Marek Vasut
0cf765e598 ARM: dts: stm32: Shorten the AV96 HDMI sound card name
Fix the following error in kernel log due to too long sound card name:
"
asoc-audio-graph-card sound: ASoC: driver name too long 'STM32MP1-AV96-HDMI' -> 'STM32MP1-AV96-H'
"

Fixes: e027da3427 ("ARM: dts: stm32: Add bindings for audio on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2023-05-30 09:40:18 +02:00
Arnd Bergmann
c98d589879 DT changes for v6.5:
- Add missing cache properties for s32g2 and s32v234.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEcvBnbeX5l9M+DJu51+cbM2fJkVUFAmRwEdIACgkQ1+cbM2fJ
 kVUioRAAvdav5Tyf9EagMY9onjd0ZDgBT14fgrhBLlsZapSabeecPliI6tVv+zGS
 mCbfc9LS57mxOrC0c0b5XR9743m/i/mh9iI6G+MS/7nM9HkPINWoTg1T2FyFpPjs
 Q9W2yoWEwFGIUQDSAQOIAdR5dHqMIoMngNxfKaNxrwi+Bl3XGF9Ad4nwnZkFT1yY
 R1cO5h42PtPLUrfHcKuAZR8yA/Gd3PYnXogWBe075Ylyu3Up5hfrNZ0fQaOUcNhq
 zchaPaHvDq7obn1KR9zeLz1bOKpLwGkqCmoNPEn/GljvxvCiz1otrJupfxLDyhi+
 ClN/JzyuXUamrSg+oXqlsixKgAFYzn1nYSgX7DEh8sRbwhd0xcgJgCYi2jsIk+NK
 DItirKOtMaxf951dbmtJTl2UyQV4mkuacZkMP7TxKRgZ1P89Ifupe1w1z//Qv8Ay
 qqGoH6Dj4qQ7XhdbygGQOgQZkAbjKSWUb/mAwKCplVIHOzImyakPcePhaeoXP90J
 oWeBRIFwVwarLmSXFxGyPSq9eKiTUqZSZTeMVMO87g1fW+pjlmN/EyS5vuFXObTy
 Mbp0QUbpX/JiDt1FLlU6jc7Ut3kYej4Tq8pIT4jzbSOvabX0hnKJAg9dLOLqOZt0
 ImVbVM9FYKwEGJDd79maPTxqH9QpKgqFxskeHzBknu4iSpVtr4E=
 =ZIwk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRwwigACgkQYKtH/8kJ
 Uie/CQ//bDaKu1hEiQ4buRjfmub+3ebArmGG1Wgy0wdpxGRvYiVTeiKwjvsoRFsD
 Tr5qqhUvQ+wYbsdRyCwnWNkXBklPuv1Eutbz216Z8WLZFGa9ZJfA1+sB3sYKGDxQ
 7bQw/okuBr2kr2xNJG7ka2AjozOPAmRI/h6oqrd7INsMRdiGaT4vneZrAdXAxvoP
 7vqZZa9sji9iawD+RBW2SksfiXflFGFoyZZPmu7zW15EslY3FMWXOqzlcM+EVvV2
 6eU66xZp3jN8m27Zt16EXH4OBvMd4wflQG/6DU+RF4sDU1qI3DfNPudibUR9D3JN
 SnFrqlRFAwFWCnE1jZ38Dk8EgNP+krlB7iZYLDvYMrxDAT9sUr4B6ga5yslb2dLZ
 lJcGLf2SMtsj0h2ZHLW4RBrd0uC/UAEzfKOlYSL3We9BvJmWg7airVfR9VPN+0RD
 +AcjRQnNv0LjaD/v8ljSnF8n0TWWuEwO3qB72cqNfWR22PhiUq7mtwk+K27eV+Hy
 KYnCox+W+FanYxCJoz7EHJnvsT1rPncD3YJOIE1zoN8tSBZLg+8O70S5MBC3+hO/
 grJhMViZEZgTV9n4FipdaWeVH22P/ZFXvma87HwenvjSoaNt4+qrNRLzNfAfYP16
 77rA7opymtk1/7fRFeiWR3iZF8gryskHmnDEAfhqrP9HpKdMx3c=
 =ZzOo
 -----END PGP SIGNATURE-----

Merge tag 's32g2-dt-6.5' of https://github.com/chesterlintw/linux-s32g into soc/dt

DT changes for v6.5:
- Add missing cache properties for s32g2 and s32v234.

* tag 's32g2-dt-6.5' of https://github.com/chesterlintw/linux-s32g:
  arm64: dts: s32: add missing cache properties

Link: https://lore.kernel.org/r/ZHC8PO8lDjTae7nV@linux-8mug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26 16:28:56 +02:00
Arnd Bergmann
1bf42cfed0 Renesas DTS updates for v6.5
- Add partial display support for the RZ/G2L and RZ/V2L SoCs and the
     RZ/G2L{,C} SMARC EVK development boards,
   - Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC
     SMARC EVK development boards,
   - Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and
     RZ/V2L SoCs,
   - Add PWM support for the R-Car V3U SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZHB9rgAKCRCKwlD9ZEnx
 cNz9APwJV+1xg9J/erm4JTh8yJFWMywkGq4BDI7BFn//jQsXkwD9HXWJmEqH7sdP
 QA/TmM6mBeEN3m3XnKZekuEHLJ7qPgA=
 =k6zc
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRwmgAACgkQYKtH/8kJ
 UifC7g//UQIpHvzOm/f0IZyh8p2aSh38wYWvi+FEcmzX0ohK/QSLWeDmm/pjLsGg
 RacQyhxtb14sHIoYb3kcjdMQrJhP7uJKMsIo1ii+iw4PfhMXz2G9XBzvJjTMXh9C
 YZ8hSfH+GgY3YbaKmNQaBNLC3nHkHHjLUajxZd3KFSa/brO1iQXfAQxGopbBrpoi
 CNR3JgcJL3hMMYL8oPAMD1k6162HjqGjiJBxDIwfdph4rKery4cDHMG1HkNloONw
 eUmtyeFVQ38YnWgswinHzgYGuAH5dm+I7VbdB5QcpMliwgH5I3rPEh12l4YLF+QB
 stVvnhhdovIzAg4yk8C1wekLzrsSp8lsm1+6FZZ4UpsXjcNqXfi63BPiAfrsV+LK
 vc5UuRITp/PXEEk5i/lgX1twN29ANimFShfP+7jEb2mzqxww/3X1bxp3bImWIZ9O
 3/Wv7Di0JVueZBKHm1nM4fbrn9lAPfzaKs389dcbgRI8U2n451TPrqS+bYQVdVct
 g/I+t3os9KazDKMCQiwFFJDetAhq8tWGZVHJtAR+iW9EZeONQ64kRhQIwsmbmlF9
 rAXa2lOyWszIbAfZK34oTib15vnv0EYoj+aqyPUQ3GsaQ+ZI5YkFRiisJSztZGZP
 hqywjw4MLRkkdqMDH7Zs04kiNKkCBTvuNelNfl0N7wyc5gzrPyw=
 =mq0o
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.5

  - Add partial display support for the RZ/G2L and RZ/V2L SoCs and the
    RZ/G2L{,C} SMARC EVK development boards,
  - Add camera support for the RZ/GV2L SoC and the RZ/V2L and RZ/G2LC
    SMARC EVK development boards,
  - Add Multi-Function Timer Pulse Unit 3 support for the RZ/G2L and
    RZ/V2L SoCs,
  - Add PWM support for the R-Car V3U SoC.

* tag 'renesas-dts-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a779a0: Add PWM nodes
  arm64: dts: renesas: r9a07g054: Add MTU3a node
  arm64: dts: renesas: r9a07g044: Add MTU3a node
  arm64: dts: renesas: rzg2lc-smarc: Enable CRU, CSI support
  arm64: dts: renesas: rzv2l-smarc: Enable CRU, CSI support
  arm64: dts: renesas: r9a07g054: Add CSI and CRU nodes
  arm64: dts: renesas: rzg2lc-smarc: Link DSI with ADV7535
  arm64: dts: renesas: rzg2l-smarc: Link DSI with ADV7535
  arm64: dts: renesas: r9a07g054: Add DSI node
  arm64: dts: renesas: r9a07g044: Add DSI node
  arm64: dts: renesas: r9a07g054: Add vspd node
  arm64: dts: renesas: r9a07g044: Add vspd node
  arm64: dts: renesas: r9a07g054: Add fcpvd node
  arm64: dts: renesas: r9a07g044: Add fcpvd node

Link: https://lore.kernel.org/r/cover.1685094244.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26 13:37:36 +02:00
Arnd Bergmann
c455856237 Minor improvements in ARM DTS for v6.5
Minor improvements to fix dtbs_check warnings:
 1. STE: Align UART nodes with bindings.
 2. EN7523: add missing cache properties.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmRkyHQQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+0rD/9Y9LplTtyS+clmVXxl2lk21AK5VQCbSGUZ
 j+umV6ye0z0KKO/p8nIA9F/H6dYtlkxP4fanIRzu0WXWYf+goGyjLYq+1GqJdY4I
 TXLX4WoLIJgVN1B4rBuRyGWv7py5/S35nd2KH4NctHzOpFBpU9gZfREP1S7/MV/r
 6DbLn7hp++tdROHw67cvTd9o46hyv8eNeeJ9j62OQrG7XjdjXi7zyt7tq7BO0MHR
 1tKwMrzQc6fwwjgKCI6OgXzXQOPcPz/cvJyEeYk3vmuAR/v0SBQ1qgS23W0pzIR+
 hoRfSUE0WrhlfNCOPZWzr/NGPUupqH0BYDpCbYQkMxS95csFx1qEmg4uoOWX7mRU
 b7P4ruLPXxqlT17/iA2elLKgyJBqQqKLYuwbjccB8sciYuwv5OIpEGRRMDskTLSw
 RfD7Q2532D5kklEEsNpc3dSKorRetbXCkXilHhc/mYXLFrAXqM1XXTUDHzAQKmjV
 r12J3SvbYAsaKWRRMxWDw5nZ8K50gLNymWpZlmzBcWI5HdmFEAPvaPaejIge0BLg
 zmdQFxYyA5qtkSzm57jcS1lexZwANgqifrxZHAiPlDNjzI2aCSVieSpZ4ROw0RV9
 vSCntrx4Te2MV7+UYMuvMLrfBN2MPEVvOiMemtzI/jMxyEakhI7CDdgtqxcNk70k
 WUDI+DQt4g==
 =mdBe
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRwmd8ACgkQYKtH/8kJ
 UifYOA/9ELfl8t9S31iseKrMynmTkt/n9hIGqL/tKz2E4I41KleP1FtzVZpRkrVM
 x2aq6BKfN5yCxM7u8FP00xBc7lCIS+McPMkaQpYPUNuC8P1G2mUQAF0rMOensSXD
 o7Z8voLJPrTCAILKNxE/6OHZJPqcUQpLxNICqnImhVszoyEyBFrAMwePLnXko/za
 NXjrdeXK3NicJTac6PbuFlAMe4bWFTEsnXTxmpvskDvb1vjVKeWaoLC6qf6rqlA/
 xkb1bYUrnuaeSwxUhn8dh90v2/26BCY3dNQ+YEuvWEyCuZnsH2ghQpqw5GB4DMfF
 4aRE3LuM8jrNfkuB+ltZgGmWtUOkf86cTR3IFYXJqh3twylz3ZUzdZmmTp5+hc8i
 YHRAkq8/T3zC+CVF00fM6B1QAX16xx4Q/zZChRXdAhG1aAfXy+0qr/ZYU9of1x0E
 1PEcaDdmeGCnTu5bTZaNiOOvYrf0swTGghpb8t5JeM8rGQ7wVJNfsHMDF2kSOzkC
 ri/GreDqp8QDzY9QfGx+ZsARCtDnUrY8Xq8wc5l2zgeS9NHE8RtB6uU807hE2mQi
 YoLc7BNrFkoTakyjBPhKUgyl8Rz8KCpeZ4SAUT3Zzq3SKjXgzwgEmXGMrRHqlVQd
 HJ+OLIg+73aTd208GXtXNnUgDRZ/SLuz1vgsv5F7xBcv5aTBFqs=
 =ApDr
 -----END PGP SIGNATURE-----

Merge tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

Minor improvements in ARM DTS for v6.5

Minor improvements to fix dtbs_check warnings:
1. STE: Align UART nodes with bindings.
2. EN7523: add missing cache properties.

* tag 'dt-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: en7523: add missing cache properties
  ARM: dts: ste: align UART node name with bindings

Link: https://lore.kernel.org/r/20230517131255.471002-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26 13:37:03 +02:00
Arnd Bergmann
6a02313612 Minor improvements in ARM64 DTS for v6.5
Mostly minor improvements to fix dtbs_check warnings:
 1. mba6ulx: use non-deprecated property for GPIO keys wake-up,
 2. Add missing cache properties (APM, Amazon, HiSilicon, Realtek,
    Synaptics, AllWinner, Microchip).
 
 Few older minor and major fixes which were waiting on mailing lists for
 longer time for Microchip SparX-5:
 1. Fix secondary CPU bring-up and crash when talking to PSCI on reference
    boards (Robert Marko),
 2. Simplify CPU address-cells (Robert Marko),
 3. Align pinctrl node names with bindings (Michael Walle).
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmRkyZAQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD12N8D/9yTunuZ+er4NViWpOe29YwNbn39VzPc74V
 T4FPMezzDC3IFGOCWtesGC8cBAQ6biwFXTEJCSE5iPOsyx9r4zc7+H4ANWkuRUny
 vhEvh+BA/x9Jc9IhHc5ib2lkudQCa5ed+eIaT42v7wuyBqgcPMQxwYETtHaTwm4h
 2H6ZEWhkKlKLxVLi32xZWvEWNurroyi6ywk7cfK/iDIgb8VyK5r34BSINXFBxDUD
 zXDtAYaSUtfp9RDfgroHnEiAr3bbt49t+VhE1KTGNaSjrl7DqLPtpwn+/osE3Sai
 EPilJBGyaMZWbi2H/ra/Pr7nQmCycimUry3b7Dx3ldSZTnwHdpbhGHXOM/FSBdKM
 585hbPLWFAi/IPdwoCMxz5hnAel35zk1vvhxPC/L5qqQq6knt/vdze+S6zi0X7W9
 NRYDtvhV/If1avx2EgYyrg4C4fUKS+zI+eng+B28vpP6lnJXhOGAjMa9OquQ5t6L
 HmbSs3NZOZEwqvx2LUShB41tcBulzJYr0aEqBNjR6VAqkYYXPwRGeGuU11grVk9U
 Z5kHUdWlXJeRNhbCKsBbOp1Nis1XDLiZSU2AczFGSD+hhAVorx/4QDFRtTqBfx4C
 tcbqHXhVb2/dugMcqeMtYebvG97xuM5Va7toKO+oNsTHipZJpRoXWG4W1wMUkaiv
 WXI54i/HPQ==
 =mwl0
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmRwmacACgkQYKtH/8kJ
 UicVWg//dhPb/9wOxzxjgK9TrTVPzRWpDxR1sofRN9f708VHBk59V37lI7r0AI9q
 +acPEJFffxjfKm4RNWr/N534VcBv1lYgpwJ656athW+o8qUiegmO4286pMdv5l41
 l4fxZGr7eOr0G4QY06u7JQKLOCEvP8mSFEw5c/rnzfiFiddxKPWZmt/SEjJsMH8N
 13tEuJFuYzK3rvlM3fS/l65DJ2IHdTW+WVxwOeeWtGnEHDNyKRVHwZoTAyXCp8A5
 eFAZz7Vc5F0WLmvQSzBSqAPJKIeWRzcblvxOWcM1iV/E++EQMvPAu3DqvMAN29Od
 N84sex8sTRJMrYiZNFc8KeHlTTc6uxBP4dfM22vGGHyqlI43Bzg7mIpfnr7M1Uvc
 lGGCY47+ob7j6VdVkPcxMB9Im0GrI6fjpfRvTbMFiej6RJ/usuIrr1Hk5HnYjkuk
 7VpTXsq257/AaeBs132BoHteLyeqcDHdMXwoqpYLVFeIeIARyaD7XAwnmsuaC9iC
 Gq1UL7LStDCYrMnZMNVmLHjdvKi0Gl0dbHUj+TT1Yd8EwD8/gSuyl+dfJmalPJEF
 EOfJGGRPyph4Vyli2yAGOR4rIlHBw6wfDKir0C+U21mXJUuMHYFRK6PeCWyAWAbU
 8UBokvFA8SzdizaPyl81xtCk0azzyfIJG+1/1yfyZBEL6CwTxhg=
 =LFev
 -----END PGP SIGNATURE-----

Merge tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

Minor improvements in ARM64 DTS for v6.5

Mostly minor improvements to fix dtbs_check warnings:
1. mba6ulx: use non-deprecated property for GPIO keys wake-up,
2. Add missing cache properties (APM, Amazon, HiSilicon, Realtek,
   Synaptics, AllWinner, Microchip).

Few older minor and major fixes which were waiting on mailing lists for
longer time for Microchip SparX-5:
1. Fix secondary CPU bring-up and crash when talking to PSCI on reference
   boards (Robert Marko),
2. Simplify CPU address-cells (Robert Marko),
3. Align pinctrl node names with bindings (Michael Walle).

* tag 'dt64-cleanup-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  arm64: dts: sparx5: rename pinctrl nodes
  arm64: dts: microchip: sparx5: correct CPU address-cells
  arm64: dts: microchip: sparx5: do not use PSCI on reference boards
  arm64: dts: microchip: add missing cache properties
  arm64: dts: allwinner: a64: add missing cache properties
  arm64: dts: synaptics: add missing cache properties
  arm64: dts: realtek: add missing cache properties
  arm64: dts: hisilicon: add missing cache properties
  arm64: dts: amazon: add missing cache properties
  arm64: dts: apm: add missing cache properties
  arm64: dts: mba6ulx: correct GPIO keys wakeup

Link: https://lore.kernel.org/r/20230517131255.471002-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-05-26 13:36:07 +02:00
Claudiu Beznea
4ceb0c70d0 ARM: dts: at91: sama5d2: remove extra line
Remove extra line from the definition of slow clock controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230522124812.107227-1-claudiu.beznea@microchip.com
2023-05-24 12:15:29 +03:00
Tony Lindgren
5cb957a188 ARM: dts: Unify pinctrl-single pin group nodes for dra7
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.

Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-05-23 10:59:46 +03:00
Tony Lindgren
7a75ed229f ARM: dts: Unify pinctrl-single pin group nodes for am4
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.

Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-05-23 10:59:46 +03:00
Tony Lindgren
d73ab823ee ARM: dts: Unify pinctrl-single pin group nodes for am33xx
We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.

Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-05-23 10:59:45 +03:00