The macros IN_FROM_REG, TEMP_FROM_REG, and RPM_FROM_REG evaluate their
arguments multiple times. These macros are used in lockless show functions
involving shared driver data, leading to Time-of-Check to Time-of-Use race
conditions.
For example, RPM_FROM_REG checks if a value is 0 or 255, and then uses it
in a division. If the value is modified by another thread to 0 after the
check but before the division, it causes a divide-by-zero error.
Convert these macros to static functions. This guarantees that arguments
are evaluated only once (pass-by-value), fixing the race conditions.
Adhere to the principle of minimal changes by only converting the specific
macros involved in these lockless contexts.
Link: https://lore.kernel.org/all/CALbr=LYJ_ehtp53HXEVkSpYoub+XYSTU8Rg=o1xxMJ8=5z8B-g@mail.gmail.com/
Signed-off-by: Gui-Dong Han <hanguidong02@gmail.com>
Link: https://lore.kernel.org/r/20251120041331.1917570-1-hanguidong02@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Document various new IPs on older chips, as well as some existing
developer kits that were missing compatible strings. Add power domain
IDs on Tegra264 and wake-up support for the XUSB controller on Tegra234.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmkYOpMACgkQ3SOs138+
s6Egqg//bIex7+DYaxtSGkMepOJOlEKjcr981MWbkcsbgujBhIITZSBE9kQDUnQJ
QkjGiBeW5gHRZDmg2SFCKLoS0CKwCco0pGepXt9+jTkjOf33hcgIw1/pmIRus0HB
hF1x0qtA0J09mrsg3aF8z8qlJuhbSXfr+T3xrYYolzyO8i+8PPmnshu3PQv/WoTv
AiB3XF5WVGuAD9PY1/Dy5yHy6e+TogP3nZBe0Cvxs+xyAubNNF+KMcsEm4NcdIDM
USk/r58m99/gOyMbXZuxfkHwX1nKoEVT0SDqkoW+t9spb0rIiowGRAsvw00pOdN9
iMIJkivh1Eh74DTSoFRSmyYdsnwE52YceNpC9kgJ5k9AA8wB1Y3WPdh+Si+TgreG
cUuLuvLMAhqMhSty34QcOMgeohAxlb7nbLI9keug1DVilaDYQtq/H4k7T6UpqxO/
bEyyhAIE5qgWKMAWGB+g40q6OVfrd8wB2fOvU73GvB1MhUQzIfMae+hqEBJJHddq
fHKyOY80piwA6FFLYBS0hye0Fgs9qezkX4YevaObru/o+zwPNbnVtA9ZpRMV+2ng
DQ6n0c7YZTUOeWQmSJvqCzsBws95VpQJPef4rdK1NDJWWdEH+6/QDQzqI3ChxttY
jIniWsilxkqBntIBkzOW/5J0q/BiMI3FzBI6OrlEnYPv6ZUcP5U=
=QUDS
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgifYACgkQmmx57+YA
GNlZNhAAoPGm2JbTF8UgMs7IKWNS0fqONR7Que2Sc0nyOpXvTLWk6MwjTojybY/y
k7ZF4hqjOeiTHV9R/Qdr2UG+jUYUIN0JoAbzgKQPKotjIal9/5inBJ1YBq7cbIl4
JaPhI1w1s0YjTghUilBBzF090lVdK5OfXnnihMj3eMcpCm/e5EY1VJpPOhi6I7PM
WiWFe60f+LtlQNh/c8lj9xjkqCqTZRiQ+5n0JuL2gtY3HESu8OpwI8Fa5EnMQSHg
rTAEK32ukm4c+6/JzQIVEoA6dlpmogDXTsT09Qv1dw5JH0e+5RHMBN813me8X+ex
h+7k2awWXWqeDg5GML6arxuZfkPxJJSd6vuwe6EWC3YeP4/tfrAxTTogRhY7lIVR
excLy+AOWUgdbpN/4xuMGOczdIWVcP32Diutxo2KuwkyZeW6OhWrQACHif2jZcAG
hi8PaX2bo8xTSf9bHFNi+io+BkdfSP50vT7y8/UoyJ9+8SredI++ebRRtvjqNhfL
2D+9PE7Fk9wErpVIbUhbEQo1vCZsnSSmHWfUTS61jzraAG4Yb9R6gOwTJFpzg1dZ
R9UA6n9KaniBvNJLhb+r53x3UHTUiTFBe2xC9H241lKwM9OnqYNQvU3b3kjZA2k0
oqtk7Ajadpm+BIPE4tDJ7G9WMBzx8iUHT7w9Krc2QmU7VOCrejY=
=h8JE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.19-rc1
Document various new IPs on older chips, as well as some existing
developer kits that were missing compatible strings. Add power domain
IDs on Tegra264 and wake-up support for the XUSB controller on Tegra234.
* tag 'tegra-for-6.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller
dt-bindings: devfreq: tegra30-actmon: Add Tegra124 fallback for Tegra210
dt-bindings: display: tegra: Document Tegra20 and Tegra30 CSI
dt-bindings: display: tegra: document EPP, ISP, MPE and TSEC for Tegra114+
dt-bindings: arm: tegra: Document Jetson Nano Devkits
dt-bindings: power: Add power domain IDs for Tegra264
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add Imagination Technologies PowerVR Series 7XE GE7800 GPU support
for the R-Car M3-N and V3U SoCs,
- Add Ethernet support for the RZ/T2H and RZ/N2H SoCs and their
evaluation boards,
- Add ADC support for the RZ/N1D SoC,
- Add thermal, NMI pushbutton, and RTC support for the RZ/V2H SoC and
the RZ/V2H EVK development board,
- Add USB2.0 support for the RZ/G3S SoC and the RZ/G3S SMARC Carrier
II board.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaRcAkgAKCRCKwlD9ZEnx
cF89AP9Vkd0D3KNWvaGX8aKc7D0PQSPfhiE5YSLhmalIYd/HkwEAzEJTbBE6mOdB
HdSO2CdHQNRJ0ApFcEfwU4Pvr+dLYgA=
=lnh0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgiVwACgkQmmx57+YA
GNmc4Q/9ExdOkSXZFzD9AiAOFb/aQjhLg/GQrGucG01a8OiWDIvSy9r2nk+40JwS
Vs27cy1ondJ06YIj52pV1rnlfpOb6UUuLVJ3ClvNOFmfL+BRURnpyhV+kkBR+EI7
T4aMb9azwyIFYSiAjMna0sIG+0lvVVI8rHsF8uEILrcfbiIqMY8U3ra5Y4XJQZIL
liBFUfzXxL6nOMuq/UnXzrtHRYjSqrRKHA3HHBO+qMYibF4ha478/dqiSA3HJfKf
8c/jhbLCp0WXMpaGzA+sJxN5dajqxe69JAbuJly/ssGNlQQmpe9GQ1AEbHCayVor
BQcFTBQvQ8efhNvcuh4pE43uS4EY69YD5hRBKSH9TaYtJ8qwi4HXGuEcO78TklSk
hAkT22iQcBhz0tWn3tUgy1JaL+6siy+6gqj+Xt9xHlk1Is1BOCiKgQAvSDAIxoxY
Y52vejdOt9xyZCQEgBBPS1LkVq8ui6217IQRUZXAUcmF4qGEL1Jrvyk5VolR7f35
dU1slby7J27TNSxzoG0OD9gmPxeWkEJynZMXPgXRuHwQvLi+3HvVMXllna/kJUV3
Lgr+Jvl8WapDX8+l7REOSwUjKPZI4CNQOl+ChjgumhhFl9ryKx+wrkXS7m+fm0XP
dT8KYocDYIZ2B527hl5Ys7Q2JLE44kxCaJ3rYcHM+sk+HWGAWC0=
=Ioc1
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.19 (take two)
- Add Imagination Technologies PowerVR Series 7XE GE7800 GPU support
for the R-Car M3-N and V3U SoCs,
- Add Ethernet support for the RZ/T2H and RZ/N2H SoCs and their
evaluation boards,
- Add ADC support for the RZ/N1D SoC,
- Add thermal, NMI pushbutton, and RTC support for the RZ/V2H SoC and
the RZ/V2H EVK development board,
- Add USB2.0 support for the RZ/G3S SoC and the RZ/G3S SMARC Carrier
II board.
* tag 'renesas-dts-for-v6.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: rzt2h-n2h-evk: Enable Ethernet support
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add NMI pushbutton support
arm64: dts: renesas: rzg3s-smarc: Enable USB support
arm64: dts: renesas: r9a08g045: Add USB support
arm64: dts: renesas: r9a09g057: Add TSU nodes
ARM: dts: renesas: r9a06g032: Add the ADC device
arm64: dts: renesas: r9a09g087: Add GMAC nodes
arm64: dts: renesas: r9a09g077: Add GMAC nodes
arm64: dts: renesas: r9a09g087: Add ETHSS node
arm64: dts: renesas: r9a09g077: Add ETHSS node
arm64: dts: renesas: r8a779a0: Add GE7800 GPU node
arm64: dts: renesas: r8a77965: Add GE7800 GPU node
dt-bindings: clock: r8a779a0: Add ZG core clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- MT7988 BananaPi R4 Pro eMMC and SD router board with support
for both Key-M and Key-E M.2 slots through DTB Overlays
- MT8370 Grinn GenioSBC-510 (GenioSOM-510 + GenioBoard Edge AI)
- MT8390 Grinn GenioSBC-700 (GenioSOM-700 + GenioBoard Edge AI)
- New variant: MT8395 MediaTek Genio 1200 EVK with UFS
...preparation for new SoCs (MT8196 Kompanio Ultra, a clone of the
MT6991 Dimensity 9400, and MT6878 Dimensity 7300) with the
addition of GCE/PIO definitions
...improvements for already supported SoCs and machines:
- MT7622/7981b/7986a/7988a gain support for reading SoC UUID from
eFuse, used to generate a persistent MAC address on boards that
don't have any factory-assigned addresses.
- MT7986 BananaPi R3 gets changes to its default fan PWM speed to
improve compatibility with cheaper fans (usually coming with the
heatsink+fan combos)
- The MT7981b OpenWRT One router sees general support improvements
with the enablement of its UART-0 console and correct pinmuxing
for the same, addition of reserved memory for Trusted Firmware A,
its SPI NOR Flash (for recovery system, WiFi eeprom data and ETH
MAC address from factory), and board LEDs.
- MT8365 gets support for its Mali G52 MC1 GPU, which gets enabled
in the MediaTek Genio 350 EVK board
...and a dt-bindings warning fix for MT8183 machines through trivial
changes to rename the audiosys and afe nodes to reflect bindings.
-----BEGIN PGP SIGNATURE-----
iLoEABYKAGIWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaRMFRxsUgAAAAAAEAA5t
YW51MiwyLjUrMS4xMSwyLDIoHGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29s
bGFib3JhLmNvbQAKCRCaNgTPrZeEeIN8AP95ZFYLCHAQv8jYgBDlwfG6m6OPPFgo
5UlEzvGl5p6wfwD/Z53tiVKrOgmOTJzqCkcjeAq6SDzxwOuJmGE6rdXVlAo=
=7T95
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgh7kACgkQmmx57+YA
GNmJoQ//ZZJ3wO4WiZog2CemXlj7OOoS80OT20XVQ5oiexhLhmoR65/iwLdwaLmq
hXtQrQ91qzL+cMAyWfZus9whtBIXXiAc1Ul/Ma3MNZK8IkIAIC4Kr1hfYomnMBxV
MfPV31REqDC3AOi/xWw5Ahlo09lvJm00jKSRDYPwb29dmq6p4MI1KiAr7i5ybqO3
BiOm7Js5IEQkB8NW7UL+KA/sHbmvw5kWRyEtd5vCLZ6S/CsJl9fyclYZSGKX9o5h
60W7GQypHJaU+nxDlfgL0LEGavLH1bCxti8DB4nfVkCUWh1kMqN9hOLNPVt9j57G
ViXJRBmXPjCweDW+KONKeIKubk52jngniRF58CSqll+rHCF806SAiHVStzD+Weg/
dWkF8EmgCfxz1EuU3Xw7VKQvZti5+Dqr4jECamX1bHw7206oDqL2isN1v0oC2PbW
GlLx/QthPPDHT2EuQR0ZiR6QMPBsjPdP9KHf/2RE5qkONuWa5fyW0Ncww9D0psVS
z7jQGUf4FsWjCU8Kz4wmqmtURcoh86cuOUXbkYDMoje54Qgm1g0nXj7V9I3qVaCl
9T5IEKPCfcborMKycRC8+/+oFbk0ppYhzCrxfe+8N6gCz6S+HKW8u5l4rhb217X7
D6d9NWtKQBe8H7TtDLcWN1IOD/LiQPh8GMv5NXG8iYJfWujNTPk=
=gbIc
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts64-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 Device Tree updates
This adds support for new boards and variants based on different
already supported MediaTek SoCs, and improves support for current
boards.
In particular:
- New machines:
- MT7988 BananaPi R4 Pro eMMC and SD router board with support
for both Key-M and Key-E M.2 slots through DTB Overlays
- MT8370 Grinn GenioSBC-510 (GenioSOM-510 + GenioBoard Edge AI)
- MT8390 Grinn GenioSBC-700 (GenioSOM-700 + GenioBoard Edge AI)
- New variant: MT8395 MediaTek Genio 1200 EVK with UFS
...preparation for new SoCs (MT8196 Kompanio Ultra, a clone of the
MT6991 Dimensity 9400, and MT6878 Dimensity 7300) with the
addition of GCE/PIO definitions
...improvements for already supported SoCs and machines:
- MT7622/7981b/7986a/7988a gain support for reading SoC UUID from
eFuse, used to generate a persistent MAC address on boards that
don't have any factory-assigned addresses.
- MT7986 BananaPi R3 gets changes to its default fan PWM speed to
improve compatibility with cheaper fans (usually coming with the
heatsink+fan combos)
- The MT7981b OpenWRT One router sees general support improvements
with the enablement of its UART-0 console and correct pinmuxing
for the same, addition of reserved memory for Trusted Firmware A,
its SPI NOR Flash (for recovery system, WiFi eeprom data and ETH
MAC address from factory), and board LEDs.
- MT8365 gets support for its Mali G52 MC1 GPU, which gets enabled
in the MediaTek Genio 350 EVK board
...and a dt-bindings warning fix for MT8183 machines through trivial
changes to rename the audiosys and afe nodes to reflect bindings.
* tag 'mtk-dts64-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (27 commits)
arm64: dts: mediatek: mt7981b-openwrt-one: Enable software leds
arm64: dts: mediatek: mt7981b-openwrt-one: Enable SPI NOR
arm64: dts: mediatek: mt7988a-bpi-r4pro: Add mmc overlays
arm64: dts: mediatek: mt7988a-bpi-r4-pro: Add PCIe overlays
arm64: dts: mediatek: mt7988: Add devicetree for BananaPi R4 Pro
arm64: dts: mediatek: mt7988: Disable 2.5G phy and enable at board layer
dt-bindings: arm: mediatek: add BPI-R4 Pro board
arm64: dts: mediatek: Add GCE header for MT8196
arm64: dts: mediatek: mt7981b: Add reserved memory for TF-A
arm64: dts: mediatek: mt7981b: Configure UART0 pinmux
arm64: dts: mediatek: mt8365-evk: Enable GPU support
arm64: dts: mediatek: mt8365: Add GPU support
arm64: dts: mediatek: mt8395-genio-1200-evk: Describe CPU supplies
arm64: dts: mediatek: Add MT6878 pinmux macro header file
arm64: dts: mediatek: mt7986-bpi-r3: Change fan PWM value for mid speed
arm64: dts: mediatek: mt8370-grinn-genio-510-sbc: Add Grinn GenioSBC-510
arm64: dts: mediatek: mt8390-genio-700-evk: Add Grinn GenioSBC-700
arm64: dts: mediatek: mt7988a: add 'soc-uuid' cell to efuse
arm64: dts: mediatek: mt7981b: add 'soc-uuid' cell to efuse
arm64: dts: mediatek: mt7986a: add 'soc-uuid' cell to efuse
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This performs a cleanup of the MT6582 devicetrees and adds support
for secondary cores bringup on this SoC.
This also introduces basic support for a new machine, the MT6582
Alcatel "yarisxl" Pop C7 (OT-7041D) smartphone, with support for
booting into a initramfs with UART console output.
-----BEGIN PGP SIGNATURE-----
iLoEABYKAGIWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaRL92hsUgAAAAAAEAA5t
YW51MiwyLjUrMS4xMSwyLDIoHGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29s
bGFib3JhLmNvbQAKCRCaNgTPrZeEeAI/AQCBTyBT0oOvHrQm/ce2V3PKg4a5z0H6
jgItAPcKz0z5+wD+NJmQrcO7oxSLiBBYTQibAbp8EYjKR/r5kHOui0zy3gw=
=Acch
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgh4AACgkQmmx57+YA
GNnniQ/9HqHCyHB7IxwYvqGqPIAnz+eGrVJqYLGB8KN8xq/B6BbLssO4B7GA/TbL
oTHVLiaBNeuDj9qNXol0fcffPLhmqXcMO/3fgDpoKPzlEjix/LNfKcFiqzOwivRG
h//ZlgL4J8Q72LlwUjmjkdAhxn3jwUD5kogqTfYCwsUEgVZDsA2qvAFZYmoMbSg/
2Pn3IikaBxXtBmYKjjlvkBx52aL/E0V3sysQsP9S1RimGwOsVH7C1ZeW05XnsP+u
wVtfrFyj+F6y8yxZT12jcwgTSAvhIBdFXDRe0Yav9t6guEKTOgQThZVMk19d2Px2
rmIohfzPFuiXsxZ6bBL5HMU2Vmzv7q1/chXd6tgx7SB9YRWl80Yne5r7d4WuO+m8
bcvxVI8SlVilKgZhf0c4ClJh05lMkvzOTRXY3rHUmmj6icP07a4PNPWPINXPAB10
VmHA6Rfacf/TKxRwSg+I/9PNF6aPjLvpBLfTNcP9FdK07FqGiEVPNa17c3VaksMG
qVfNw+rzB3I7A55ztmOPOMYvOqPaWL/W0nJucXTdah0JVP86I8lrUXYPTYqmvFNF
yF9PgNB3wiMj6htvFSQATQwMQca0eyXlXQ1nVkdygUdBNI83oLPXiUzUxJcVm+3R
+aIYSDE/UG4EVxH5FLvQ3wgAlQtNRMyF9yRpfCq1kKeYS+luhZQ=
=KJzU
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts32-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM32 Device Tree updates
This performs a cleanup of the MT6582 devicetrees and adds support
for secondary cores bringup on this SoC.
This also introduces basic support for a new machine, the MT6582
Alcatel "yarisxl" Pop C7 (OT-7041D) smartphone, with support for
booting into a initramfs with UART console output.
* tag 'mtk-dts32-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
ARM: dts: mediatek: drop wrong syscon hifsys compatible for MT2701/7623
ARM: dts: mediatek: add basic support for Alcatel yarisxl board
dt-bindings: arm: mediatek: Add MT6582 yarisxl
ARM: dts: mediatek: mt6582: add enable-method property to cpus
ARM: dts: mediatek: mt6582: add clock-names property to uart nodes
ARM: dts: mediatek: mt6582: add mt6582 compatible to timer
ARM: dts: mediatek: mt6582: remove compatible property from root node
ARM: dts: mediatek: mt6582: sort nodes and properties
ARM: dts: mediatek: mt6582: move MMIO devices under soc node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Ayaneo EC resets after hibernation, losing the charge control state.
Add a small PM hook to restore this state on hibernation resume.
The fan speed is also lost during hibernation, but since hibernation
failures are common with this class of devices, setting a low fan speed
when the userspace program controlling the fan will potentially not
take over could cause the device to overheat, so it is not restored.
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-7-lkml@antheas.dev
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Currently, the oxpec driver contains Ayaneo devices. Move them to the
new ayaneo-ec driver, which is dedicated to them.
As this driver supports charge inhibition for Ayaneo, add support for it
for the AIR, AIR 1S, AB05-Medoncino, AIR Pro, and Kun, referenced from
the out-of-tree ayaneo-platform driver.
In addition, update the readmes of oxpec to reflect this change.
Link: https://github.com/ShadowBlip/ayaneo-platform
Tested-by: Derek J. Clark <derekjohn.clark@gmail.com>
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-6-lkml@antheas.dev
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
The Ayaneo 3 features hot-swappable controller modules. The ejection
and management is done through HID. However, after ejecting the modules,
the controller needs to be power cycled via the EC to re-initialize.
For this, the EC provides a variable that holds whether the left or
right modules are connected, and a power control register to turn
the controller on or off. After ejecting the modules, the controller
should be turned off. Then, after both modules are reinserted,
the controller may be powered on again to re-initialize.
This patch introduces two new sysfs attributes:
- `controller_modules`: a read-only attribute that indicates whether
the left and right modules are connected (none, left, right, both).
- `controller_power`: a read-write attribute that allows the user
to turn the controller on or off (with '1'/'0').
Therefore, after ejection is complete, userspace can power off the
controller, then wait until both modules have been reinserted
(`controller_modules` will return 'both') to turn on the controller.
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-5-lkml@antheas.dev
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Ayaneo devices support charge inhibition via the EC. This inhibition
only works while the device is powered on, and resets between restarts.
However, it is maintained across suspend/resume cycles.
The EC does not support charge threshold control. Instead, userspace
software on Windows manually toggles charge inhibition depending on
battery level.
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-4-lkml@antheas.dev
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Add hwmon single fan sensor reads and control for Ayaneo devices.
The register and method of access is the same for all devices.
Reviewed-by: Armin-Wolf <W_Armin@gmx.de>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-3-lkml@antheas.dev
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Recent Ayaneo devices feature an ACPI mapped Embedded Controller (EC)
with standard addresses across models that provides access to fan
speed, fan control, battery charge limits, and controller power
controls. Introduce a new driver stub that will handle these driver
features.
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Link: https://patch.msgid.link/20251119174505.597218-2-lkml@antheas.dev
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Add PWM controlled fan and it's associated thermal management for the
Lichee Pi 4A board.
Enable additional ISA extenstions supported by the T-Head C910 cores:
Zfh, Ziccrse, XTheadvector.
Add reset controllers of more TH1520 subsystems: AP, AO, DSP, MISC, VI.
Signed-off-by: Drew Fustini <fustini@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaRDChQAKCRDb7CzD2Six
DNU3AQDMrJ6jcRJQbog1T2OnIxPyvOct1Hx+01cD62MaSFprHAEAsJ4L8s3HPMWf
pj+Cq44DoFH6UV/ImJlxpYFL87J9TQY=
=ykgv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghukACgkQmmx57+YA
GNmV9A/9GUE328GSrWiJ63RsZmgnBhb0o2SRyQxQSmTWbaLnNeHebO0myNCUynK9
kqacDnOFyUyFu8J7bMqT5RtZTGZalvFtt7Uxld+ESjTxujBqCZz7QNEVvWzNUpzB
pxIfJdWfm7GcQYZsM+6V+tpByVkrnh3smErm3vCt4TFCk9Eqkn0n+Vfe8Rvm3Tm9
ELZY/zC4LW4GMDX429wJs1d9N9c6zxYwhd/Q1kyO5iPV/eiLlTVVFlHQZZaJRlB0
TbAHVt5RxtN4AC2xLUAer3J1K4iZNnXvVbBb5kBnGny5FTxHSafB11V2BFwDKrDB
eleUw8K6xXL5Jijau5rULF4e35Qo8SXRI6FaiezcZbFzqC/ChSzsSY6phGEd2REt
Z/lXrpa4YhiFPNyJzRLCDeFp9vRHgMOwBng7eZWx2AOMhGGNOUp1ktgj4n2lsRf1
9AxII/D+Dfdvrl1aicTRxpKEknywJw1x4RPcM9jTQfbEh22inp4f2fdwjNtK85vp
uvStggBXvACHSz8pM7g1iifLsrOoXIuN7/BRrnw7yBUTz6rtCLAwsIpqr2H7qPTA
ke+4EcxLNZWhii8pMG/q/bsOdDoaylVHfDkA/hai0tUpseGDm7Sf1LutFIi6i7CO
aYSIIXFIFSx8JFbgqncmDwXoZwFGc/y4npDcd5NTUR8eNygX9ME=
=wIpW
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt
T-HEAD Devicetrees for v6.19
Add PWM controlled fan and it's associated thermal management for the
Lichee Pi 4A board.
Enable additional ISA extenstions supported by the T-Head C910 cores:
Zfh, Ziccrse, XTheadvector.
Add reset controllers of more TH1520 subsystems: AP, AO, DSP, MISC, VI.
Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'thead-dt-for-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
riscv: dts: thead: Add reset controllers of more subsystems for TH1520
riscv: dts: thead: Add PWM fan and thermal control
riscv: dts: thead: Add PWM controller node
riscv: dts: thead: add zfh for th1520
riscv: dts: thead: add ziccrse for th1520
riscv: dts: thead: add xtheadvector to the th1520 devicetree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add thermal support for the RZ/G3S and RZ/G3E SoCs,
- Add DT overlay support for the Raspberry Pi Display 2 and Argon40
fan hats on the Retronix Sparrow Hawk board,
- Add eMMC support for the Eagle Function expansion board,
- Add initial support for the R-Car X5H (R8A78000) SoC and the
Ironhide development board,
- Move interrupt-parent properties to root nodes,
- Add system watchdog timer support for R-Car Gen3 and Gen4 SoCs,
which is reserved for secure firmware on R-Car Gen3 boards,
- Add ADC support for the RZ/T2H and RZ/N2H SoCs and their evaluation
boards,
- Add watchdog timer support on the R-Car V3M Starter Kit board,
- Add Cortex-A55 PMU support on the RZ/V2H, RZ/V2N, RZ/T2H, and RZ/N2H
SoCs,
- Add Imagination Technologies PowerVR Series 6XT GX6250 GPU support
on the R-Car M3-W and M3-W+ SoCs,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaQSHowAKCRCKwlD9ZEnx
cJSMAP0ejaSo8LMqtL1rSMrPWz07J/H3xNQDsEgbWHdybNCp2wD/XQhBQpmtnIJb
dk1rw+nNHXowyGN6VfQ7FV57J1KKaAc=
=wcHD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkgheMACgkQmmx57+YA
GNnXNg//Scu2l2KUmZiiGFLL3NLVRVQM4hvr/bRxcYLboUtyQTvQtRdkCm41EU0Y
GK7ObO+Bj+Oy9+q4jmfQ4MkWj48CNABkPVNxRk+1yJt27bZ2xkcktP6oPldsdJOM
pTOHibLdG5r9W4KyACQjhNXqFkYrUzbHbNToWU0XEaHLGBw+5Ix+9Fh92oKrvfEe
qXCyU4KDFQHxBnjmvySJq0HDMY5f677EXuq7IkWRQmHkmF6vazW3k2F3rZjoXHsV
PQlS3frcMLMVHx+rq+sc4BWMj9YRKMFAUaVuurjdCGrvFf6clyKNcXZ992rV0oX5
LSuOmncdYY5mCLB04RPsHWxWln2wt1T7rwDSqGNknb4ZJUsfodDgstGocKm7XfPm
WzIl7SVc3KaJRpNbTNwtDceyloN6Dpycp0mcbLCYpBGSELa/oJWc36crST4TvcCE
zqmIHw9Y5tFqKTIV14CwlpYuVDJ1YLDVUc5Ij3HCsuB0GUHgeYSr2vQTGPc3mHjC
mbrMw5uy5Vy0jgaNkvyUuW0BaiSpDTZNB9KJrO9awR4KOGMUmrqJeg3RK6zAYcjz
8qRkSPZ7hYz8Av6wWSdqWj4KgQLbQK82Qk3xfU1o2F4C89ZLCIYBG5+VONW+odoG
CTNL9YGau9+AU/s5QK8K8UgR0vr0GxVFZMQ+/gJ3kdQjggx+p7c=
=0Lcz
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.19
- Add thermal support for the RZ/G3S and RZ/G3E SoCs,
- Add DT overlay support for the Raspberry Pi Display 2 and Argon40
fan hats on the Retronix Sparrow Hawk board,
- Add eMMC support for the Eagle Function expansion board,
- Add initial support for the R-Car X5H (R8A78000) SoC and the
Ironhide development board,
- Move interrupt-parent properties to root nodes,
- Add system watchdog timer support for R-Car Gen3 and Gen4 SoCs,
which is reserved for secure firmware on R-Car Gen3 boards,
- Add ADC support for the RZ/T2H and RZ/N2H SoCs and their evaluation
boards,
- Add watchdog timer support on the R-Car V3M Starter Kit board,
- Add Cortex-A55 PMU support on the RZ/V2H, RZ/V2N, RZ/T2H, and RZ/N2H
SoCs,
- Add Imagination Technologies PowerVR Series 6XT GX6250 GPU support
on the R-Car M3-W and M3-W+ SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (80 commits)
arm64: dts: renesas: sparrow-hawk: Fix full-size DP connector node name and labels
arm64: dts: renesas: r8a77961: Add GX6250 GPU node
arm64: dts: renesas: r8a77960: Add GX6250 GPU node
ARM: dts: renesas: kzm9g: Name interrupts for accelerometer
arm64: dts: renesas: r9a09g087: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g077: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g056: Add Cortex-A55 PMU node
arm64: dts: renesas: r9a09g057: Add Cortex-A55 PMU node
ARM: dts: renesas: r9a06g032-rzn1d400-db: Drop invalid #cells properties
arm64: dts: renesas: v3msk: Enable watchdog timer
arm64: dts: renesas: r8a779h0: Add SWDT node
arm64: dts: renesas: r8a779g0: Add SWDT node
arm64: dts: renesas: r8a779f0: Add SWDT node
arm64: dts: renesas: r8a779a0: Add SWDT node
arm64: dts: renesas: rzt2h/rzn2h-evk: Enable ADCs
arm64: dts: renesas: r9a09g087: Add ADCs support
arm64: dts: renesas: r9a09g077: Add ADCs support
ARM: dts: renesas: koelsch: Update ADV7180 binding
ARM: dts: renesas: r9a06g032: Move interrupt-parent to root node
ARM: dts: renesas: r8a7794: Move interrupt-parent to root node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Significant changes:
- The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems
New platforms:
- IBM Balcones
The Balcones system is similar to Bonnell but with a POWER11 processor.
Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI
tree is needed.
- Meta Yosemite5
The Yosemite5 platform provides monitoring of voltages, power,
temperatures, and other critical parameters across the motherboard,
CXL board, E1.S expansion board, and NIC components.
Updated platforms:
- clemente (Meta): LEDs, shunt resistor configuration
- santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs
There are a scattering of one-off changes and devicetree cleanups for other
platforms as well.
-----BEGIN PGP SIGNATURE-----
iJIEABYKADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaQPvIxwcYW5kcmV3QGNv
ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmWf4A/0xN2+KOIfqkVSut5IP2
Y54gRoSR9xhEeoaOq1xHrvJpAQCqo6V5j1dmx21qTDhFbxGxU4KH6SUBhVpIMNYj
vGZhCA==
=e3/X
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghTsACgkQmmx57+YA
GNka7Q/7BVAkUmHTXMfxP+VWDYzqhV5G4LjrdaW01heQC3j1mTv4qL5KGQTrrEQU
gC2tZ/rpIpOvc1PdTubh/B1sMdRPb/c0+NVpYTbfjrEMSFSLWLxyNOVhFD3fBxMz
8jj1YS4o8Z0KmgHQNuhy6+nPUiez8aPyYBWk6r6ZsgB4kmGyThRAhUB75wwgd8gl
DDINQe/mPlOKY3YwIniS7pT53z7fyKfXXOVvTWGYQOB79ykUpNdppK1POVsywueT
+2g0juDD/SELCf4TP7eq/JKts4SDMlePlt5pKqIchRdzAucaNnl1220T31Y2aHEd
rj1Nyf8Ad0uGsLwizGnvoremtfhCo0yOlVPotB1nbR/spadNU8IcX61RNd6eS98B
VWrZBTsUSKcrxgE/+gDDGipSOpR5b0dmH+ignJuhWH8uiDwfT1urYUIB8Nnuueeh
udkPraSM+yQr0HfajQrJPeIIQaxP/7VnQr5yNfFIQk3aD5TR92cFFviI8lsJybVt
uhKb9vd4mdeE0V1EIrWjSWX757Zcvbo8xWULYdLdex21JJ2adYXu7DHO8vntGckC
/EzF+z1wCjHKNOYnNAV7rqD6LT8IKb4lbxS6GWSupI4aicoLZsrQhp0FlS7H+KLg
NYz6ClQJstwC58B+lEU6wEE3SU+P3Bp9UU7N9Zzhih9zayrRiN0=
=8yf0
-----END PGP SIGNATURE-----
Merge tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
First batch of ASPEED Arm devicetree changes for 6.19
Significant changes:
- The IBM Power11 FSI DTSIs have been rearranged to accommodate new systems
New platforms:
- IBM Balcones
The Balcones system is similar to Bonnell but with a POWER11 processor.
Like POWER10, the POWER11 is a dual-chip module, so a dual chip FSI
tree is needed.
- Meta Yosemite5
The Yosemite5 platform provides monitoring of voltages, power,
temperatures, and other critical parameters across the motherboard,
CXL board, E1.S expansion board, and NIC components.
Updated platforms:
- clemente (Meta): LEDs, shunt resistor configuration
- santabarbara (Meta): AMD APML, EEPROMs, LEDs, GPIO line names, MCTP for NICs
There are a scattering of one-off changes and devicetree cleanups for other
platforms as well.
* tag 'aspeed-6.19-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
ARM: dts: aspeed: santabarbara: Add eeprom device node for PRoT module
ARM: dts: aspeed: santabarbara: Add AMD APML interface support
ARM: dts: aspeed: santabarbara: Add gpio line name
ARM: dts: aspeed: santabarbara: Add bmc_ready_noled Led
ARM: dts: aspeed: santabarbara: Enable MCTP for frontend NIC
ARM: dts: aspeed: santabarbara: Add sensor support for extension boards
ARM: dts: aspeed: santabarbara: Add blank lines between nodes for readability
ARM: dts: aspeed: yosemite5: Add Meta Yosemite5 BMC
dt-bindings: arm: aspeed: add Meta Yosemite5 board
ARM: dts: aspeed: clemente: Add HDD LED GPIO
ARM: dts: aspeed: Fix max31785 fan properties
ARM: dts: aspeed: Add Balcones system
dt-bindings: arm: aspeed: add IBM Bonnell board
dt-bindings: arm: aspeed: add IBM Balcones board
ARM: dts: aspeed: harma: Add MCTP I2C controller node
ARM: dts: aspeed: yosemite4: allocate ramoops for kernel panic
ARM: dts: aspeed: clemente: add shunt-resistor-micro-ohms for LM5066i
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rollup of hardware support which has accumulated since support for the
SoC and coreprimevelte board was merged. This most notably includes
eMMC, PMIC, backlight and touchscreen. A few QoL fixes are also
included.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQRt/0HWDfMUtbdrpjCtMZNSRY+tAwUCaOz5IwAKCRCtMZNSRY+t
A/JXAPsGp+81P4vgINVTfceFPqbcqd1gnFk/ZCqBJjvdGvR73AD/R6Se5lwtSIq6
sfcm47LpbZ+Bv/9UbZMA7D0il67tcwY=
=NjpT
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkghKoACgkQmmx57+YA
GNkBIg//WKaHWlNKGJAMmjnNSkorAoTpEyEETppiLZIXqsxYuS5zfbYXO7bMDKao
o2yioNyLtD4ZEcjgw+cx4v0gkbdwmAfNwKLuSBsRsg1MbxgxNjAbgF8QKyMp6/Iu
nEFbHi8zf/Ypb9Su5G4pteHVJQNJe1glU0DiV7Oi/x/g1y7va3tjQgys6LnPQ1Z4
V5dshWcbklcODFMDkFkmJ12d6iXV7AYFhkjtaemqq+F1j4M92rBRAlOHIWuhB5Wh
BH5dZG0c8AGg0394smwOe9LjqN0jVWu+/GeWr3fs8GS2nSQS1rhZfewkR5YAl7nL
K1MzuvzwXQ9r1A113Yu7LyzBkIl2K795L/AKDOHMtfLZHaqG4LVUVwSbCqwZsUvt
mThZq6v0bbs4YdMLN+RrTCH/Z9vhe+5I/kG0JXiUcvQbDyBAw50aGBQBG5uAuzrT
Gyvs8Fl7cqzpjIWfKHZdc/5HRNlufFHzyykPmoBhfZAfpTShfJ4917KAaTctzNSf
GCZzYPMHO1E/Y1d3hyRGUsHGD8JaPzl4Ki75EnKvSexs5rGBYLBeJCDONuV9Dkp0
9scvpWo8Sr7LlzBhYpOkJERxMcRY5L7K5CZKkYABFENvdw3mOKctaVEtdNE4Uhe+
C6ga3GP8vC/iytnFRl7Xnf/1HYgK9xyz80UhzvVNysMW7Fc8NFE=
=n+0B
-----END PGP SIGNATURE-----
Merge tag 'pxa1908-dt-for-6.19' of https://gitlab.com/pxa1908-mainline/linux into soc/dt
PXA1908 DT changes for 6.19
Rollup of hardware support which has accumulated since support for the
SoC and coreprimevelte board was merged. This most notably includes
eMMC, PMIC, backlight and touchscreen. A few QoL fixes are also
included.
* tag 'pxa1908-dt-for-6.19' of https://gitlab.com/pxa1908-mainline/linux:
arm64: dts: marvell: pxa1908: Add power domains
arm64: dts: marvell: samsung,coreprimevelte: Add USB connector
arm64: dts: marvell: samsung,coreprimevelte: Fill in memory node
arm64: dts: marvell: samsung,coreprimevelte: Drop some reserved memory
arm64: dts: marvell: pxa1908: Move ramoops to SoC dtsi
arm64: dts: marvell: samsung,coreprimevelte: Add vibrator
arm64: dts: marvell: pxa1908: Add PWMs
arm64: dts: marvell: samsung,coreprimevelte: Enable eMMC
arm64: dts: marvell: samsung,coreprimevelte: Correct CD GPIO
arm64: dts: marvell: samsung,coreprimevelte: Add backlight
arm64: dts: samsung,coreprimevelte: add SDIO
arm64: dts: samsung,coreprimevelte: add touchscreen
arm64: dts: samsung,coreprimevelte: add PMIC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are two return statements in a row here. The first one is wrong
so delete that one. This changes the return value to -ENODEV.
Fixes: f99eb09809 ("platform/x86: asus-armoury: move existing tunings to asus-armoury module")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://patch.msgid.link/aSBqRHs256Tz7EKr@stanley.mountain
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Add Tenstorrent as a vendor and enable support for the Blackhole SoC
in Blackhole P100 and P150 PCIe cards. The SoC contains four RISC-V
CPU tiles consisting of 4x SiFive X280 cores.
There is a virtual UART implemented in OpenSBI firmware that allows a
console program on the PCIe host to communicate through shared memory
with Linux running on the Blackhole card.
Link: https://github.com/tenstorrent/tt-bh-linux
Link: https://github.com/tenstorrent/opensbi/
Signed-off-by: Drew Fustini <fustini@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaPPUxQAKCRDb7CzD2Six
DPcCAQDtzzCHclFzG1GwQj5zaX7dGVoCjFkzmgiUiA+ju4gD9AEA60g+6DgksxRC
juAX9aflgWCkRCdLQVuSf7jBFii0hg0=
=pJ7i
-----END PGP SIGNATURE-----
Merge tag 'tenstorrent-dt-for-v6.19' of https://github.com/tenstorrent/linux into soc/newsoc
Tenstorrent device tree for v6.19
Add Tenstorrent as a vendor and enable support for the Blackhole SoC
in Blackhole P100 and P150 PCIe cards. The SoC contains four RISC-V
CPU tiles consisting of 4x SiFive X280 cores.
There is a virtual UART implemented in OpenSBI firmware that allows a
console program on the PCIe host to communicate through shared memory
with Linux running on the Blackhole card.
Link: https://github.com/tenstorrent/tt-bh-linux
Link: https://github.com/tenstorrent/opensbi/
Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'tenstorrent-dt-for-v6.19' of https://github.com/tenstorrent/linux:
riscv: defconfig: Enable Tenstorrent SoCs
riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs
riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
dt-bindings: timers: Add Tenstorrent Blackhole compatible
dt-bindings: riscv: cpus: Add SiFive X280 compatible
dt-bindings: riscv: Add Tenstorrent Blackhole compatible
dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC
When the pagefault handling code was moved to a new file, an extra
drm_exec_init() was added to the VMA path. This call is unnecessary because
xe_validation_ctx_init() already performs a drm_exec_init(), resulting in a
memory leak reported by kmemleak.
Remove the redundant drm_exec_init() from the VMA pagefault handling code.
Fixes: fb544b8445 ("drm/xe: Implement xe_pagefault_queue_work")
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: intel-xe@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20251120161435.3674556-1-mika.kuoppala@linux.intel.com
Add METRICS_TABLE_ID (7) and use it when requesting the metrics
transfer table instead of the hard-coded literal. This clarifies the
meaning of the argument to amd_pmf_send_cmd() and centralizes the table
ID definition for easier maintenance.
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Co-developed-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
Signed-off-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://patch.msgid.link/20251120105210.3945710-4-Shyam-sundar.S-k@amd.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Add SET_CMD and GET_CMD constants and replace boolean values passed as the
get/set argument to amd_pmf_send_cmd() with the new explicit flags. This
improves readability, avoids ambiguity around true/false and 0/1 usage.
There is no functional change.
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Co-developed-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
Signed-off-by: Patil Rajesh Reddy <Patil.Reddy@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Link: https://patch.msgid.link/20251120105210.3945710-3-Shyam-sundar.S-k@amd.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Update smu_pmf_metrics_v2 to use NPU terminology instead of IPU. This
aligns the driver with current firmware/hardware naming and fixes the
mismatch. There is no functional change and no impact to the struct layout
and only field names are updated.
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by:
Link: https://patch.msgid.link/20251120105210.3945710-2-Shyam-sundar.S-k@amd.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
The sii902x driver was caching HDMI detection state in a sink_is_hdmi field
and checking it in mode_set() to determine whether to set HDMI or DVI
output mode. This approach had two problems:
1. With DRM_BRIDGE_ATTACH_NO_CONNECTOR (used by modern display drivers like
TIDSS), the bridge's get_modes() is never called. Instead, the
drm_bridge_connector helper calls the bridge's edid_read() and updates the
connector itself. This meant sink_is_hdmi was never populated, causing the
driver to default to DVI mode and breaking HDMI audio.
2. The mode_set() callback doesn't receive atomic state or connector
pointer, making it impossible to check connector->display_info.is_hdmi
directly at that point.
Fix this by moving the HDMI vs DVI decision from mode_set() to
atomic_enable(), where we can access the connector via
drm_atomic_get_new_connector_for_encoder(). This works for both connector
models:
- With DRM_BRIDGE_ATTACH_NO_CONNECTOR: Returns the drm_bridge_connector
created by the display driver, which has already been updated by the
helper's call to drm_edid_connector_update()
- Without DRM_BRIDGE_ATTACH_NO_CONNECTOR (legacy): Returns the connector
embedded in sii902x struct, which gets updated by the bridge's own
get_modes()
Fixes: 3de47e1309 ("drm/bridge: sii902x: use display info is_hdmi")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251030151635.3019864-1-devarsht@ti.com
The IT66122 is a pin compatible replacement for the IT66122. Based on
empirical testing, the new device looks to be compatible with IT66121.
However due to a lack of public data sheet at this time beyond overall
feature list[1] (which seems to add additional features vs ITT66121),
it is hard to determine that additional register operations required
to enable additional features.
So, introduce the device as a new compatible that we will detect based
on vid/pid match, with explicit id that can be used to extend the
driver capability as information becomes available later on.
[1] https://www.ite.com.tw/en/product/cate1/IT66122
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251029150636.3118628-6-nm@ti.com
The driver knows exactly which version of the chip is present since
the vid/pid is used to enforce a compatibility. Given that some
devices like IT66121 has potentially been replaced with IT66122 mid
production for many platforms, it makes no sense to use the vid/pid
as an enforcement for compatibility. Instead, detect the ID of the
actual chip in use by matching the corresponding vid/pid and drop the
compatible specific lookup table.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251029150636.3118628-5-nm@ti.com
Add a new ite,it66122 compatible string to the IT66121 binding
documentation, since the two chips are practically same except for id
register difference.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251029150636.3118628-2-nm@ti.com
Return "PTR_ERR(pca9450->sd_vsel_gpio)" instead of "ret". The "ret"
variable is success at this point.
Fixes: 3ce6f4f943 ("regulator: pca9450: Fix control register for LDO5")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://patch.msgid.link/aSBqnPoBrsNB1Ale@stanley.mountain
Signed-off-by: Mark Brown <broonie@kernel.org>
Members of struct software_node_ref_args should not be dereferenced
directly but set using the provided macros. Commit d7cdbbc93c
("software node: allow referencing firmware nodes") changed the name of
the software node member and caused a build failure. Remove all direct
dereferences of the ref struct as a fix.
However, this driver also seems to abuse the software node interface by
waiting for a node with an arbitrary name "intel-xhci-usb-sw" to appear
in the system before setting up the reference for the I2C device, while
the actual software node already exists in the intel-xhci-usb-role-switch
module and should be used to set up a static reference. Add a FIXME for
a future improvement.
Fixes: d7cdbbc93c ("software node: allow referencing firmware nodes")
Fixes: 53c24c2932 ("platform/x86: intel_cht_int33fe: use inline reference properties")
Cc: stable@vger.kernel.org
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/all/20251121111534.7cdbfe5c@canb.auug.org.au/
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Hans de Goede <johannes.goede@oss.qualcomm.com>
Acked-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Each alternative of a group alternative depends on a specific
feature and flags. Provide access to the feature/flags for each
alternative as an attribute (feature) in struct alt_group.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-26-alexandre.chartre@oracle.com
When using the --disas option, alternatives are disassembled but
address references in non-default alternatives can be incorrect.
The problem is that alternatives are shown as if they were replacing the
original code of the alternative. So if an alternative is referencing
an address inside the alternative then the reference has to be
adjusted to the location of the original code.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-25-alexandre.chartre@oracle.com
When using the --disas option, also disassemble jump tables.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-24-alexandre.chartre@oracle.com
When using the --disas option, also disassemble exception tables
(EX_TABLE).
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-23-alexandre.chartre@oracle.com
All alternatives are disassemble side-by-side when using the --disas
option. However the address of each instruction is not printed because
instructions from different alternatives are not necessarily aligned.
Change this behavior to print the address of each instruction. Spaces
will appear between instructions from the same alternative when
instructions from different alternatives do not have the same alignment.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-22-alexandre.chartre@oracle.com
When using the --disas option, disassemble all group alternatives.
Jump tables and exception tables (which are handled as alternatives)
are not disassembled at the moment.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-21-alexandre.chartre@oracle.com
When using the --disas option, objtool doesn't currently disassemble
any alternative. Print an header for each alternative. This identifies
places where alternatives are present but alternative code is still
not disassembled at the moment.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-20-alexandre.chartre@oracle.com
Preserve the order in which alternatives are defined. Currently
objtool stores alternatives in a list in reverse order.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-19-alexandre.chartre@oracle.com
Add the --disas=<function-pattern> actions to disassemble the specified
functions. The function pattern can be a single function name (e.g.
--disas foo to disassemble the function with the name "foo"), or a shell
wildcard pattern (e.g. --disas foo* to disassemble all functions with a
name starting with "foo").
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-18-alexandre.chartre@oracle.com
The .return_sites and .call_sites sections reference text addresses,
but not with the intent to indirect branch to them, so they don't
need to be validated for IBT.
This is useful when running objtool on object files which already
have .return_sites or .call_sites sections, for example to re-run
objtool after it has reported an error or a warning.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-17-alexandre.chartre@oracle.com
When tracing function validation, improve the reporting of
alternative instruction by more clearly showing the different
alternatives beginning and end.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-16-alexandre.chartre@oracle.com
Add the disas_alt_name() and disas_alt_type_name() to provide a
name and a type name for an alternative. This will be used to
better name alternatives when tracing their execution.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-15-alexandre.chartre@oracle.com
Alternative code, including jump table and exception table, is represented
with the same struct alternative structure. But there is no obvious way to
identify whether the struct represents alternative instructions, a jump
table or an exception table.
So add a type to struct alternative to clearly identify the type of
alternative.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-14-alexandre.chartre@oracle.com
When tracing function validation, instruction state changes can
report changes involving registers. These registers are reported
with the name "r<num>" (e.g. "r3"). Print the CPU specific register
name instead of a generic name (e.g. print "rbx" instead of "r3"
on x86).
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-13-alexandre.chartre@oracle.com
During function validation, objtool maintains a per-instruction state,
in particular to track call frame information. When tracing validation,
print any instruction state changes.
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-12-alexandre.chartre@oracle.com
Add an option to trace and have information during the validation
of specified functions. Functions are specified with the --trace
option which can be a single function name (e.g. --trace foo to
trace the function with the name "foo"), or a shell wildcard
pattern (e.g. --trace foo* to trace all functions with a name
starting with "foo").
Signed-off-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://patch.msgid.link/20251121095340.464045-11-alexandre.chartre@oracle.com