The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain
use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash. Usage is described as below:
+===================+=============+
| Remoteproc node | Timer Node |
+===================+=============+
| main_r5fss0_core0 | main_timer2 |
+-------------------+-------------+
| main_r5fss0_core1 | main_timer3 |
+-------------------+-------------+
| main_r5fss1_core0 | main_timer4 |
+-------------------+-------------+
| main_r5fss1_core1 | main_timer5 |
+-------------------+-------------+
| c71_0 | main_timer0 |
+-------------------+-------------+
| c71_1 | main_timer1 |
+-------------------+-------------+
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826104821.1516344-6-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain
use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash. Usage is described as below:
+===================+=============+
| Remoteproc node | Timer Node |
+===================+=============+
| main_r5fss0_core0 | main_timer2 |
+-------------------+-------------+
| main_r5fss0_core1 | main_timer3 |
+-------------------+-------------+
| main_r5fss1_core0 | main_timer4 |
+-------------------+-------------+
| main_r5fss1_core1 | main_timer5 |
+-------------------+-------------+
| c71_0 | main_timer0 |
+-------------------+-------------+
| c71_1 | main_timer1 |
+-------------------+-------------+
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826104821.1516344-5-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain
use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash. Usage is described as below:
+===================+==============+
| Remoteproc node | Timer Node |
+===================+==============+
| main_r5fss0_core0 | main_timer12 |
+-------------------+--------------+
| main_r5fss0_core1 | main_timer13 |
+-------------------+--------------+
| main_r5fss1_core0 | main_timer14 |
+-------------------+--------------+
| main_r5fss1_core1 | main_timer15 |
+-------------------+--------------+
| c66_0 | main_timer0 |
+-------------------+--------------+
| c66_1 | main_timer1 |
+-------------------+--------------+
| c71_0 | main_timer2 |
+-------------------+--------------+
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826104821.1516344-4-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain
use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash. Usage is described as below:
+===================+==============+
| Remoteproc node | Timer Node |
+===================+==============+
| main_r5fss0_core0 | main_timer12 |
+-------------------+--------------+
| main_r5fss0_core1 | main_timer13 |
+-------------------+--------------+
| main_r5fss1_core0 | main_timer14 |
+-------------------+--------------+
| main_r5fss1_core1 | main_timer15 |
+-------------------+--------------+
| c66_0 | main_timer0 |
+-------------------+--------------+
| c66_1 | main_timer1 |
+-------------------+--------------+
| c71_0 | main_timer2 |
+-------------------+--------------+
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826104821.1516344-3-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The remoteproc firmware of R5F in the MAIN voltage domain use timers.
Therefore, change the status of the timer nodes to "reserved" to avoid
any clash. Usage is described as below:
+===================+==========================+
| Remoteproc node | Timer Node |
+===================+==========================+
| main_r5fss0_core0 | main_timer0, main_timer2 |
+-------------------+--------------------------+
| main_r5fss0_core1 | main_timer1 |
+-------------------+--------------------------+
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826104821.1516344-2-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
To allow firmware to pick up all DTs from here, move the overlays that
are normally applied during DT fixup to the kernel source as well. Hook
then into the build nevertheless to ensure that regular checks are
performed.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/91f8b825467651ebd51a4051f153ab136eeb1849.1724830741.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The PG1 A variant of the iot2050 series has been identified which
partially lacks support for lock-step mode. This implies that all
iot2050 boards can't support this mode. As a result, lock-step mode has
been disabled across all iot2050 boards for consistency and to avoid
potential issues.
Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Link: https://lore.kernel.org/r/d1f5f84db7a1597cd29628a0b503e578367b7b40.1724830741.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI AM69 SK board has three R5F clusters in the MAIN domain, and all
of these are configured for LockStep mode at the moment. Switch all of
these R5F clusters to Split mode by default to maximize the number of
R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-8-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI J784S4 EVM board has three R5F clusters in the MAIN domain, and
all of these are configured for LockStep mode at the moment. Switch
all of these R5F clusters to Split mode by default to maximize the
number of R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-7-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI AM68 SK board has two R5F clusters in the MAIN domain, and both
of these are configured for LockStep mode at the moment. Switch both of
these R5F clusters to Split mode by default to maximize the number of
R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-6-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI J721S2 EVM board has two R5F clusters in the MAIN domain, and
both of these are configured for LockStep mode at the moment. Switch
both of these R5F clusters to Split mode by default to maximize the
number of R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-5-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI J721E SK board has two R5F clusters in the MAIN domain, and both
of these are configured for LockStep mode at the moment. Switch both of
these R5F clusters to Split mode by default to maximize the number of
R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-4-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI J721E EVM board has two R5F clusters in the MAIN domain, and
both of these are configured for LockStep mode at the moment. Switch
both of these R5F clusters to Split mode by default to maximize the
number of R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-3-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The TI J7200 EVM board has one R5F cluster in the MAIN domain, and it is
configured for LockStep mode at the moment. Switch the MAIN R5F cluster
to Split mode by default to maximize the number of R5F cores.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240826093024.1183540-2-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
External interfaces should be disabled at the SoC DTSI level, since
the node is incomplete. Disable Ethernet switch and ports in SoC DTSI
and enable them in the board DTS. If the board DTS includes a SoM DTSI
that completes the node description, enable the Ethernet switch and
ports in SoM DTSI.
Reflect this change in SoM DTSIs by removing ethernet port disable.
Signed-off-by: Logan Bristol <logan.bristol@utexas.edu>
Acked-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Acked-by: Josua Mayer <josua@solid-run.com>
Link: https://lore.kernel.org/r/20240809135753.1186-1-logan.bristol@utexas.edu
Signed-off-by: Nishanth Menon <nm@ti.com>
assigned-clock sets DEV_RTIx_RTI_CLK(id:0) whereas clocks sets
DEV_RTIx_RTI_CLK_PARENT_GLUELOGIC_HFOSC0_CLKOUT(id:1)[1]. This does not
look right, the timers in the driver assume a max frequency of 32kHz for
the heartbeat (HFOSC0 is 19.2MHz on j784s4-evm).
With this change, WDIOC_GETTIMELEFT return coherent time left
(DEFAULT_HEARTBEAT=60, reports 60s upon opening the cdev).
[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html#clocks-for-rti0-device
Fixes: caae599de8 ("arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances")
Suggested-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Tested-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240805174330.2132717-2-echanude@redhat.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The DMA carveout for the C6x core 0 is at 0xa6000000 and core 1 is at
0xa7000000. These are reversed in DT. While both C6x can access either
region, so this is not normally a problem, but if we start restricting
the memory each core can access (such as with firewalls) the cores
accessing the regions for the wrong core will not work. Fix this here.
Fixes: fae14a1cb8 ("arm64: dts: ti: Add k3-j721e-beagleboneai64")
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240801181232.55027-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The DMA carveout for the C6x core 0 is at 0xa6000000 and core 1 is at
0xa7000000. These are reversed in DT. While both C6x can access either
region, so this is not normally a problem, but if we start restricting
the memory each core can access (such as with firewalls) the cores
accessing the regions for the wrong core will not work. Fix this here.
Fixes: f46d16cf5b ("arm64: dts: ti: k3-j721e-sk: Add DDR carveout memory nodes")
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240801181232.55027-1-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This node contains a child which is only probed if simple-mfd is in the
compatible list. Add this here.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240821162337.33774-1-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Enable throttling down the CPU frequency when an alert temperature
threshold (lower than the critical threshold) is reached.
Signed-off-by: Alessandro Zini <alessandro.zini@siemens.com>
Link: https://lore.kernel.org/r/20240814214328.14155-1-alessandro.zini@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit ed07d82f9e ("arm64: dts: ti: k3-am62p-j722s: Move
SoC-specific node properties") introduced the main_gpio1 node
and included the ti,ngpio property, but did not include the
gpio-reserved-ranges property. As a result, the user could try
to access gpios that do not exist. Fix this by introducing the
gpio-reserved-ranges property.
The non-existent gpios are found in the am67x datasheet [1] in Table
5-27.
Depends on patch: dt-bindings: gpio: gpio-davinci: Add the
gpio-reserved-ranges property [2]
[1] https://www.ti.com/lit/ds/symlink/am67.pdf
[2] https://lore.kernel.org/all/20240809154638.394091-2-j-mcarthur@ti.com/
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240809162828.1945821-3-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit 29075cc09f ("arm64: dts: ti: Introduce AM62P5 family of
SoCs") introduced the main_gpio1 node and included the ti,ngpio
property, but did not include the gpio-reserved-ranges property. As a
result, the user could try to access gpios that do not exist. Fix this
by introducing the gpio-reserved-ranges property.
The non-existent gpios are found in the am62p datasheet [1] in Table
5-24.
Depends on patch: dt-bindings: gpio: gpio-davinci: Add the
gpio-reserved-ranges property [2]
[1] https://www.ti.com/lit/ds/symlink/am62p.pdf
[2] https://lore.kernel.org/all/20240809154638.394091-2-j-mcarthur@ti.com/
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240809162828.1945821-2-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
mmc1 is not functional and needs clock loopback so that it can
create sampling clock from this for high speed SDIO operations.
Thus, add clklb pin mux to get mmc1 working.
Fixes: a266c180b3 ("arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240809072231.2931206-1-b-kapoor@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
The PCIe0 instance of the PCIe controller on J784S4 SoC supports up to 4
lanes. Additionally, all 4 lanes of PCIe0 can be utilized on J784S4-EVM
via SERDES1. Since SERDES1 is not being used by any peripheral apart
from PCIe0, use all 4 lanes of SERDES1 for PCIe0.
Fixes: 27ce26fe52 ("arm64: dts: ti: k3-j784s4-evm: Enable PCIe0 and PCIe1 in RC Mode")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240720110455.3043327-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
There are 2 mux-controller nodes in J7200 which are responsible for
transferring can signals to the can phy but same node names for both
the mux-controllers led to errors while setting up both mux-controllers
for can phys simultaneously.
Thus, update node names for these mux-controller.
Fixes: da23e8d112 ("arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240729063411.1570930-3-b-kapoor@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
There are 2 mux-controller nodes in J721S2 which are responsible for
transferring can signals to the can phy but same node names for both
the mux-controllers led to errors while setting up both mux-controllers
for can phys simultaneously.
Thus, update node names for these mux-controller.
Fixes: 98f3b667e1 ("arm64: dts: ti: k3-j721s2: Add support for CAN instances 3 and 5 in main domain")
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20240729063411.1570930-2-b-kapoor@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit 5e5c50964e ("arm64: dts: ti: k3-j722s: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed a hole within gpio-range for main_pmx0. As a result, automatic
mapping of GPIO to pin control for gpios within the main_pmx0 domain is
broken. Fix this by correcting the gpio-range.
Fixes: 5e5c50964e ("arm64: dts: ti: k3-j722s: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-4-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed a hole within gpio-range for main_pmx0. As a result, automatic
mapping of GPIO to pin control for gpios within the main_pmx0 domain is
broken. Fix this by correcting the gpio-range.
Fixes: d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-3-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Commit d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges
properties") introduced pinmux range definition for gpio-ranges, however
missed introducing the range description for the mcu_gpio node. As a
result, automatic mapping of GPIO to pin control for mcu gpios is
broken. Fix this by introducing the proper ranges.
Fixes: d72d73a44c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties")
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240801210414.715306-2-j-mcarthur@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This reverts commit 3935fbc87d.
CTRL_SLEEP_MOCI# is a signal that is defined for all the SoM
implementing the Verdin family specification, this signal is supposed to
control the power enable in the carrier board when the system is in deep
sleep mode. However this is not possible with Texas Instruments AM62
SoC, IOs output buffer is disabled in deep sleep and IOs are in
tri-state mode.
Given that we cannot properly control this pin, force it to be always
high to minimize potential issues.
Fixes: 3935fbc87d ("arm64: dts: ti: k3-am62-verdin-dahlia: support sleep-moci")
Cc: <stable@vger.kernel.org>
Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1361669/am625-gpio-output-state-in-deep-sleep/5244802
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20240731054804.6061-1-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
First patch fixes warning splat seen on J784S4 due to overlapping
serdes0 lane. Second patch cleans up the serdes0 references for readability
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Merge tag 'ti-k3-dt-for-v6.11-part2' into ti-k3-dts-next
Late fixes towards v6.11-rc1
First patch fixes warning splat seen on J784S4 due to overlapping
serdes0 lane. Second patch cleans up the serdes0 references for readability
Signed-off-by: Nishanth Menon <nm@ti.com>
- Fix RPM package build error caused by an incorrect locale setup
- Mark modules.weakdep as ghost in RPM package
- Fix the odd combination of -S and -c in stack protector scripts, which
is an error with the latest Clang
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Merge tag 'kbuild-fixes-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- Fix RPM package build error caused by an incorrect locale setup
- Mark modules.weakdep as ghost in RPM package
- Fix the odd combination of -S and -c in stack protector scripts,
which is an error with the latest Clang
* tag 'kbuild-fixes-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
kbuild: Fix '-S -c' in x86 stack protector scripts
kbuild: rpm-pkg: ghost modules.weakdep file
kbuild: rpm-pkg: Fix C locale setup
This simplifies the min_t() and max_t() macros by no longer making them
work in the context of a C constant expression.
That means that you can no longer use them for static initializers or
for array sizes in type definitions, but there were only a couple of
such uses, and all of them were converted (famous last words) to use
MIN_T/MAX_T instead.
Cc: David Laight <David.Laight@aculab.com>
Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Commit 3a7e02c040 ("minmax: avoid overly complicated constant
expressions in VM code") added the simpler MIN_T/MAX_T macros in order
to avoid some excessive expansion from the rather complicated regular
min/max macros.
The complexity of those macros stems from two issues:
(a) trying to use them in situations that require a C constant
expression (in static initializers and for array sizes)
(b) the type sanity checking
and MIN_T/MAX_T avoids both of these issues.
Now, in the whole (long) discussion about all this, it was pointed out
that the whole type sanity checking is entirely unnecessary for
min_t/max_t which get a fixed type that the comparison is done in.
But that still leaves min_t/max_t unnecessarily complicated due to
worries about the C constant expression case.
However, it turns out that there really aren't very many cases that use
min_t/max_t for this, and we can just force-convert those.
This does exactly that.
Which in turn will then allow for much simpler implementations of
min_t()/max_t(). All the usual "macros in all upper case will evaluate
the arguments multiple times" rules apply.
We should do all the same things for the regular min/max() vs MIN/MAX()
cases, but that has the added complexity of various drivers defining
their own local versions of MIN/MAX, so that needs another level of
fixes first.
Link: https://lore.kernel.org/all/b47fad1d0cf8449886ad148f8c013dae@AcuMS.aculab.com/
Cc: David Laight <David.Laight@aculab.com>
Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- Many fixes for power-cut issues by Zhihao Cheng
- Another ubiblock error path fix
- ubiblock section mismatch fix
- Misc fixes all over the place
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Merge tag 'ubifs-for-linus-6.11-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs
Pull UBI and UBIFS updates from Richard Weinberger:
- Many fixes for power-cut issues by Zhihao Cheng
- Another ubiblock error path fix
- ubiblock section mismatch fix
- Misc fixes all over the place
* tag 'ubifs-for-linus-6.11-rc1-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs:
ubi: Fix ubi_init() ubiblock_exit() section mismatch
ubifs: add check for crypto_shash_tfm_digest
ubifs: Fix inconsistent inode size when powercut happens during appendant writing
ubi: block: fix null-pointer-dereference in ubiblock_create()
ubifs: fix kernel-doc warnings
ubifs: correct UBIFS_DFS_DIR_LEN macro definition and improve code clarity
mtd: ubi: Restore missing cleanup on ubi_init() failure path
ubifs: dbg_orphan_check: Fix missed key type checking
ubifs: Fix unattached inode when powercut happens in creating
ubifs: Fix space leak when powercut happens in linking tmpfile
ubifs: Move ui->data initialization after initializing security
ubifs: Fix adding orphan entry twice for the same inode
ubifs: Remove insert_dead_orphan from replaying orphan process
Revert "ubifs: ubifs_symlink: Fix memleak of inode->i_link in error path"
ubifs: Don't add xattr inode into orphan area
ubifs: Fix unattached xattr inode if powercut happens after deleting
mtd: ubi: avoid expensive do_div() on 32-bit machines
mtd: ubi: make ubi_class constant
ubi: eba: properly rollback inside self_check_eba
After a recent change in clang to stop consuming all instances of '-S'
and '-c' [1], the stack protector scripts break due to the kernel's use
of -Werror=unused-command-line-argument to catch cases where flags are
not being properly consumed by the compiler driver:
$ echo | clang -o - -x c - -S -c -Werror=unused-command-line-argument
clang: error: argument unused during compilation: '-c' [-Werror,-Wunused-command-line-argument]
This results in CONFIG_STACKPROTECTOR getting disabled because
CONFIG_CC_HAS_SANE_STACKPROTECTOR is no longer set.
'-c' and '-S' both instruct the compiler to stop at different stages of
the pipeline ('-S' after compiling, '-c' after assembling), so having
them present together in the same command makes little sense. In this
case, the test wants to stop before assembling because it is looking at
the textual assembly output of the compiler for either '%fs' or '%gs',
so remove '-c' from the list of arguments to resolve the error.
All versions of GCC continue to work after this change, along with
versions of clang that do or do not contain the change mentioned above.
Cc: stable@vger.kernel.org
Fixes: 4f7fd4d7a7 ("[PATCH] Add the -fstack-protector option to the CFLAGS")
Fixes: 60a5317ff0 ("x86: implement x86_32 stack protector")
Link: 6461e53781 [1]
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Since ubiblock_exit() is now called from an init function,
the __exit section no longer makes sense.
Cc: Ben Hutchings <bwh@kernel.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202407131403.wZJpd8n2-lkp@intel.com/
Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Zhihao Cheng <chengzhihao1@huawei.com>
Enable turbostat extensions to add both perf and PMT
(Intel Platform Monitoring Technology) counters via the cmdline.
Demonstrate PMT access with built-in support for Meteor Lake's Die%c6 counter.
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Merge tag 'v6.11-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
Pull turbostat updates from Len Brown:
- Enable turbostat extensions to add both perf and PMT (Intel
Platform Monitoring Technology) counters via the cmdline
- Demonstrate PMT access with built-in support for Meteor Lake's
Die C6 counter
* tag 'v6.11-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
tools/power turbostat: version 2024.07.26
tools/power turbostat: Include umask=%x in perf counter's config
tools/power turbostat: Document PMT in turbostat.8
tools/power turbostat: Add MTL's PMT DC6 builtin counter
tools/power turbostat: Add early support for PMT counters
tools/power turbostat: Add selftests for added perf counters
tools/power turbostat: Add selftests for SMI, APERF and MPERF counters
tools/power turbostat: Move verbose counter messages to level 2
tools/power turbostat: Move debug prints from stdout to stderr
tools/power turbostat: Fix typo in turbostat.8
tools/power turbostat: Add perf added counter example to turbostat.8
tools/power turbostat: Fix formatting in turbostat.8
tools/power turbostat: Extend --add option with perf counters
tools/power turbostat: Group SMI counter with APERF and MPERF
tools/power turbostat: Add ZERO_ARRAY for zero initializing builtin array
tools/power turbostat: Replace enum rapl_source and cstate_source with counter_source
tools/power turbostat: Remove anonymous union from rapl_counter_info_t
tools/power/turbostat: Switch to new Intel CPU model defines
New Changes:
- Refactor to a common struct for DRAM and general media CXL events
- Add abstract distance calculation support for CXL
- Add CXL maturity map documentation to detail current state of CXL enabling
- Add warning on mixed CXL VH and RCH/RCD hierachy to inform unsupported config
- Replace ENXIO with EBUSY for inject poison limit reached via debugfs
- Replace ENXIO with EBUSY for inject poison cxl-test support
- XOR math fixup for DPA to SPA translation. Current math works for MODULO arithmetic
where HPA==SPA, however not for XOR decode.
- Move pci config read in cxl_dvsec_rr_decode() to avoid unnecessary acess
Fixes:
- Add a fix to address race condition in CXL memory hotplug notifier
- Add missing MODULE_DESCRIPTION() for CXL modules
- Fix incorrect vendor debug UUID define
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Merge tag 'cxl-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull CXL updates from Dave Jiang:
"Core:
- A CXL maturity map has been added to the documentation to detail
the current state of CXL enabling.
It provides the status of the current state of various CXL features
to inform current and future contributors of where things are and
which areas need contribution.
- A notifier handler has been added in order for a newly created CXL
memory region to trigger the abstract distance metrics calculation.
This should bring parity for CXL memory to the same level vs
hotplugged DRAM for NUMA abstract distance calculation. The
abstract distance reflects relative performance used for memory
tiering handling.
- An addition for XOR math has been added to address the CXL DPA to
SPA translation.
CXL address translation did not support address interleave math
with XOR prior to this change.
Fixes:
- Fix to address race condition in the CXL memory hotplug notifier
- Add missing MODULE_DESCRIPTION() for CXL modules
- Fix incorrect vendor debug UUID define
Misc:
- A warning has been added to inform users of an unsupported
configuration when mixing CXL VH and RCH/RCD hierarchies
- The ENXIO error code has been replaced with EBUSY for inject poison
limit reached via debugfs and cxl-test support
- Moving the PCI config read in cxl_dvsec_rr_decode() to avoid
unnecessary PCI config reads
- A refactor to a common struct for DRAM and general media CXL
events"
* tag 'cxl-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl:
cxl/core/pci: Move reading of control register to immediately before usage
cxl: Remove defunct code calculating host bridge target positions
cxl/region: Verify target positions using the ordered target list
cxl: Restore XOR'd position bits during address translation
cxl/core: Fold cxl_trace_hpa() into cxl_dpa_to_hpa()
cxl/test: Replace ENXIO with EBUSY for inject poison limit reached
cxl/memdev: Replace ENXIO with EBUSY for inject poison limit reached
cxl/acpi: Warn on mixed CXL VH and RCH/RCD Hierarchy
cxl/core: Fix incorrect vendor debug UUID define
Documentation: CXL Maturity Map
cxl/region: Simplify cxl_region_nid()
cxl/region: Support to calculate memory tier abstract distance
cxl/region: Fix a race condition in memory hotplug notifier
cxl: add missing MODULE_DESCRIPTION() macros
cxl/events: Use a common struct for DRAM and General Media events
Ben Dooks and Jeff Johnson.
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Merge tag 'unicode-next-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krisman/unicode
Pull unicode update from Gabriel Krisman Bertazi:
"Two small fixes to silence the compiler and static analyzers tools
from Ben Dooks and Jeff Johnson"
* tag 'unicode-next-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krisman/unicode:
unicode: add MODULE_DESCRIPTION() macros
unicode: make utf8 test count static
In the same way as for other similar files, mark as ghost the new file
generated by depmod for configured weak dependencies for modules,
modules.weakdep, so that although it is not included in the package,
claim the ownership on it.
Signed-off-by: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
