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64,840 commits

Author SHA1 Message Date
Will Deacon
194a7f720f ARM: hwcaps: use shifts instead of hardcoded constants
The HWCAP numbers are defined as constants, each one being a power of 2.
This has become slightly unwieldy now that we have reached 32k.

This patch changes the HWCAP defines to use (1 << n) instead of coding
the constant directly. The values remain unchanged.

Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07 19:20:51 +01:00
Steven Rostedt
e08fbb78f0 tracing, x86/irq: Do not trace arch_local_{*,irq_*}() functions
I triggered a triple fault with gcc 4.5.1 because it did not
honor the inline annotation to arch_local_save_flags() function
and that function was added to the pool of functions traced by
the function tracer.

When preempt_schedule() called arch_local_save_flags() (called
by irqs_disabled()), it was traced, but the first thing the
function tracer does is disable preemption. When it enables
preemption, the NEED_RESCHED flag will not have been cleared and
the preemption check will trigger the call to preempt_schedule()
again.

Although the dynamic function tracer crashed immediately, the
static version of the function tracer (CONFIG_DYNAMIC_FTRACE is
not set) actually was able to show where the problem was.

 swapper-1       3.N.. 103885us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103886us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103886us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103887us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103887us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103888us : arch_local_save_flags <-preempt_schedule
 swapper-1       3.N.. 103888us : arch_local_save_flags <-preempt_schedule

It went on for a while before it triple faulted with a corrupted
stack.

The arch_local_save_flags and arch_local_irq_* functions should
not be traced. Even though they are marked as inline, gcc may
still make them a function and enable tracing of them.

The simple solution is to just mark them as notrace. I had to
add the <linux/types.h> for this file to include the notrace
tag.

Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/20110702033852.733414762@goodmis.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-07-07 19:22:32 +02:00
Konrad Rzeszutek Wilk
ee339fe63a xen/pci: Move check for acpi_sci_override_gsi to xen_setup_acpi_sci.
Previously we would check for acpi_sci_override_gsi == gsi every time
a PCI device was enabled. That works during early bootup, but later
on it could lead to triggering unnecessarily the acpi_gsi_to_irq(..) lookup.
The reason is that acpi_sci_override_gsi was declared in __initdata and
after early bootup could contain bogus values.

This patch moves the check for acpi_sci_override_gsi to the
site where the ACPI SCI is preset.

CC: stable@kernel.org
Reported-by: Raghavendra D Prabhu <rprabhu@wnohang.net>
Tested-by: Raghavendra D Prabhu <rprabhu@wnohang.net>
[http://lists.xensource.com/archives/html/xen-devel/2011-07/msg00154.html]
Suggested-by:  Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2011-07-07 12:19:08 -04:00
Simon Guinot
659fb32d1b genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.

Reported-by: Joey Oravec <joravec@drewtech.com>
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-07 16:02:26 +00:00
Anton Vorontsov
93e85d8e90 ARM: cns3xxx: Add support for L2 Cache Controller
CNS3xxx SOCs have L310-compatible cache controller, so let's use it.

With this patch benchmarking with 'gzip' shows that performance is
doubled, and I'm still able to boot full-fledged userland over NFS
(using PCIe NIC), so the support should be pretty robust.

p.s. While CNS3xxx reports that it has PL310, it still needs to wait
on cache line operations, so we should not select 'CACHE_PL310',
which is a micro-optimization that removes these waits for v7 CPUs.
Someday we'd better rename CACHE_PL310 Kconfig option into
NO_CACHE_WAIT or something less ambiguous.

Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2011-07-07 18:48:38 +04:00
Imre Kaloz
00d2711d70 ARM: cns3xxx: Should select CPU_V6K
CNS3XXX is based on MPCore, so select the right CPU option for it.

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2011-07-07 18:48:12 +04:00
Wolfram Sang
d30e1521b2 arm: mach-vt8500: add forgotten irq_data conversion
This platform has not been converted to 'struct irq_data' when the big
pile was done. It fails to compile nowadays, because the compatibility
code has gone.

  CC      arch/arm/mach-vt8500/irq.o
arch/arm/mach-vt8500/irq.c:118:2: error: unknown field 'ack' specified in initializer
arch/arm/mach-vt8500/irq.c:118:2: warning: initialization from incompatible pointer type
arch/arm/mach-vt8500/irq.c:119:2: error: unknown field 'mask' specified in initializer
arch/arm/mach-vt8500/irq.c:119:2: warning: initialization from incompatible pointer type
arch/arm/mach-vt8500/irq.c:120:2: error: unknown field 'unmask' specified in initializer
arch/arm/mach-vt8500/irq.c:120:2: warning: initialization from incompatible pointer type
arch/arm/mach-vt8500/irq.c:121:2: error: unknown field 'set_type' specified in initializer
arch/arm/mach-vt8500/irq.c:121:2: warning: initialization from incompatible pointer type
make[1]: *** [arch/arm/mach-vt8500/irq.o] Error 1

Add the missing conversion. Tested on a JayPC-Tablet.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Alexey Charkov <alchark@gmail.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-07 14:35:25 +00:00
Kumar Gala
8dbb6bc136 powerpc/85xx: Add P5020 SoC device tree include stub
Split out common (non-board specific) parts of the SoC related device
tree into a stub so multiple board dts files can include it and we can
reduce duplication and maintenance effort.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-07 09:33:50 -05:00
Kumar Gala
e5aae727c0 powerpc/85xx: Add P3041 SoC device tree include stub
Split out common (non-board specific) parts of the SoC related device
tree into a stub so multiple board dts files can include it and we can
reduce duplication and maintenance effort.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-07 09:33:50 -05:00
Dave Martin
2ba564b90f ARM: mm: tlb-v7: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:12 +01:00
Dave Martin
3b7f39fa9a ARM: mm: tlb-v6: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:12 +01:00
Dave Martin
ca56096367 ARM: mm: tlb-v4wbi: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:12 +01:00
Dave Martin
2284ece2d6 ARM: mm: tlb-v4wb: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:12 +01:00
Dave Martin
f249a6425a ARM: mm: tlb-v4: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:12 +01:00
Dave Martin
d7b84d2438 ARM: mm: tlb-v3: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:11 +01:00
Dave Martin
27eebe4cc9 ARM: mm: tlb-fa: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:11 +01:00
Dave Martin
ab1a746da9 ARM: mm: proc-xscale: Use new generic struct definition macros
Without this patch, xscale_80200_A0_A1 is missing the
icache_flush_all entry, which would result in the wrong functions
being called at run-time.

This patch re-uses xscale_icache_flush_all for
xscale_80200_A0_A1_cache_fns.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:11 +01:00
Dave Martin
c21898f9f0 ARM: mm: proc-xsc3: Use new generic struct definition macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:11 +01:00
Dave Martin
78a8f3c365 ARM: mm: proc-v7: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:11 +01:00
Dave Martin
7b7dc6e888 ARM: mm: proc-v6: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:10 +01:00
Dave Martin
f58d59f6c5 ARM: mm: proc-sa1100: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:10 +01:00
Dave Martin
5973ba5886 ARM: mm: proc-sa110: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:10 +01:00
Dave Martin
a39a32187b ARM: mm: proc-mohawk: Use the new processor struct macros
This patch also defines a suitable flush_icache_all implementation
which would otherwise be missing, resulting in a link failure.
Thanks to Nicolas Pitre for suggesting the code for this.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07 15:31:10 +01:00
Dave Martin
e43b670e24 ARM: mm: proc-feroceon: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07 15:31:10 +01:00
Dave Martin
d6ed10ce39 ARM: mm: proc-fa526: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
b4a19f03c4 ARM: mm: proc-arm9tdmi: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
b1b9892bcd ARM: mm: proc-arm946: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
b375580147 ARM: mm: proc-arm940: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
be90da45a9 ARM: mm: proc-arm926: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
6c240aec6f ARM: mm: proc-arm925: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:09 +01:00
Dave Martin
f3e7383f2a ARM: mm: proc-arm922: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:08 +01:00
Dave Martin
68f5e1acb5 ARM: mm: proc-arm920: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:08 +01:00
Dave Martin
fd10e2725e ARM: mm: proc-arm7tdmi: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:08 +01:00
Dave Martin
4cc1f0fa06 ARM: mm: proc-arm740: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:08 +01:00
Dave Martin
449870b1de ARM: mm: proc-arm720: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
c3be06eb58 ARM: mm: proc-arm6_7: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
5c9369bc2e ARM: mm: proc-arm1026: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
f2d8cae1d5 ARM: mm: proc-arm1022: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
fbaa840730 ARM: mm: proc-arm1020e: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
56d916509b ARM: mm: proc-arm1020: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:07 +01:00
Dave Martin
455a01ec30 ARM: mm: cache-v7: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:06 +01:00
Dave Martin
641d8233a6 ARM: mm: cache-v6: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:06 +01:00
Dave Martin
d5b5b2e2f8 ARM: mm: cache-v4wt: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:06 +01:00
Dave Martin
eec95e56e6 ARM: mm: cache-v4wb: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:06 +01:00
Dave Martin
54d4e9ebbc ARM: mm: cache-v4: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:06 +01:00
Dave Martin
9c373968d6 ARM: mm: cache-v3: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:05 +01:00
Dave Martin
9bc7491341 ARM: mm: cache-fa: Use the new processor struct macros
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07 15:31:05 +01:00
Dave Martin
8f51965e70 ARM: assembler.h: Add string declaration macro
Declaring strings in assembler source involves a certain amount of
tedious boilerplate code in order to annotate the resulting symbol
correctly.

Encapsulating this boilerplate in a macro should help to avoid some
duplication and the occasional mistake.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07 15:31:05 +01:00
Dave Martin
66a625a881 ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros
This patch adds some generic macros to reduce boilerplate when
declaring certain common structures in arch/arm/mm/*.S

Thanks to Russell King for outlining what the
define_processor_functions macro could look like.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07 15:30:35 +01:00
Arnd Bergmann
3d64b4496f ARM: Xilinx: merge board file into main platform code
The zynq platform will never have board files other than the
device tree one, so there is no point splitting it from common.c.

This makes the code more compact.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: John Linn <john.linn@xilinx.com>
2011-07-07 14:13:58 +00:00