Commit graph

64,840 commits

Author SHA1 Message Date
Sylwester Nawrocki
5905bbfa5b ARM: S5PV210: Add resource definitions for MIPI CSIS
Naming changed for consistency with s5pv310 where there are two instances
of the device.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:49 +09:00
Thomas Abraham
9b580cdb1c ARM: S5PV210: Add DM9000 support on SMDKV210
This patch adds DM9000 Ethernet Controller device support for SMDKV210.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
81f9becd6a ARM: S5PV210: Add SROM controller clock
This patch adds the SROM controller clock to the list of clocks to be enabled at
boot time. It is required to be enabled at boot time since the modules connected
over the SROM interface such as the Ethernet controller need an operational SROM.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
be297f0374 ARM: S5P: Move SROM controller IO mapping to plat-s5p for S5P SoCs
This patch modifies the following.

1. Moves the SROM controller mapping from S5PV210 specific code to
   S5P common code. The SROM controller mapping can be used for all
   S5P SoCs.

2. Define the SROM controller physical address for S5P64X0, S5P6442,
   S5PC100, S5PV210 and S5PV310.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
8233ab6aec ARM: S5P: Add SROM bank 4 and 5 register offsets
Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks
4 and 5 in addition to SROM banks 0 to 3. This patch adds register
offsets for SROM bank 4 and 5.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Thomas Abraham
abc6c36022 ARM: S5P: Add SROM control register shift macros for other banks.
This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks.  Some of the S5P SOCs have them.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Kukjin Kim
8cf460a5d7 ARM: S5P: Move the SROM register definitions to plat-s5p
The SROM register difinitions of S5PV310/S5PC210 (mach/regs-srom.h)
can be used to other S5P SoCs such as S5PV210/S5PC110. So moved into
plat/regs-srom.h of plat-s5p directory.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:48 +09:00
Abhilash Kesavan
9af7d94f29 ARM: S5P6440: Change the name for MMC Special Clock
Change the name of mmc spcial clock from mmc_bus to sclk_mmc to be
in line with the naming across the S5P SoCs

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Abhilash Kesavan
f85cbea94c ARM: S5P64X0: Change GPIOlib initialization to core_initcall
This patch changes the gpiolib initialization from arch_initcall
to core_initcall will allow us to make use of gpio functions in
smdk64x0_machine_init function.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Atul Dahiya
232d10061c ARM: S5P64X0: Add clock support for RTC
This patch adds RTC clock for S5P6450.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
5b1bab2e9e ARM: S5P64X0: Rename GPIOlib file to gpiolib.c
This patch renames S5P64X0 GPIOlib file according to other S5P SoCs.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
bb1d7002bb ARM: S5P64X0: Cleanup S5P64X0 GPIOlib adding 2bit chips
This patch changes S5P6440 and S5P6450 GPIOlib adding 2bit chips.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
4603089d7c ARM: SAMSUNG: Cleanup GPIOlib adding 2bit chips
This patch adds samsung_gpiolib_add_2bit_chips() for cleanup regarding
GPIOlib adding 2bit chips.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:28 +09:00
Kukjin Kim
f50266d313 ARM: S5P64X0: Add GPIOlib support for S5P6450
Already can support S5P6440 GPIOlib but S5P6450. This patch changes regarding
S5P6440 GPIO definitions so that can be used it from S5P6450 and adds S5P6450
GPIO chips.

Tested-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:27 +09:00
Thomas Abraham
8f49720d5a ARM: S5PV210: Add frame buffer display support for SMDKV210
Enable frame buffer display support for SMDKV210 board.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Jonghun Han <jonghun.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:13 +09:00
Kyungmin Park
a8928ce7e0 ARM: S5PV310: Universal SDHCI devices support
Universal (C210) board has 3 SDHCI devices.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:03 +09:00
Changhwan Youn
d6d8b48199 ARM: S5PV310: Add support Power Domain
This patch adds support Power Domain for S5PV310 and S5PC210.

Signed-off-by: Changhwan Youn <chaos.youn at samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:02 +09:00
Changhwan Youn
a50eb1c768 ARM: S5PV310: Set bit 22 in the PL310 (cache controller) AuxCtlr register
This patch is applied according to the commit 1a8e41cd67
(ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register).

Actually, S5PV310 has same cache controller(PL310).

Following is from Catalin Marinas' commit.

Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Cc: <stable@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:37:02 +09:00
Changhwan Youn
d930596a3c ARM: SAMSUNG: Add support for Power Domain control
This patch implements Power Domain control based on Runtime PM framework.
Each Power Domain is represented by a Power Domain device and the devices
belong to these Power Domains should be set as a child device of the Power
Domain devices. The corresponding drivers of the devices should implement
Runtime PM to control the Power Domains.

Signed-off-by: Changhwan Youn <chaos.youn at samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Mark Brown
df3d02962b ARM: SAMSUNG: Convert irq-vic-timer to irq_ functions
Conver the VIC timer interrupts to use the irq_ versions of the IRQ
operatiosn introduced in 2.6.37, storing the mask for the timer
interrupt in the chip_data of the irq_data in order to save having to
do a substraction and a shift on every operation.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Mark Brown
27b31e5623 ARM: SAMSUNG: Convert irq-uart to use new irq_ functions
Convert to the new irq_ versions of the IRQ operations. As well as
the textual substituion of irq_data for the raw IRQ number we also
convert the register base lookup to in s3c_irq_uart_base() to pick
the irq_data up directly.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Mark Brown
3c9169753b ARM: S3C64XX: Use chip_data to store the shift for EINTs
This makes all the functions that use the shift slightly smaller, one
instruction in most cases but more for ack() and maskack().

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Mark Brown
c35cd6ec36 ARM: S3C64XX: Convert S3C64xx irq-eint to use new irq_ methods
Kernel 2.6.37 adds new interrupt methods which take a struct irq_data
rather than an irq number. Conver S3C64xx irq-eint to use this with a
simple textual substitution.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Mark Brown
f5aeffb784 ARM: SAMSUNG: Convert s3c_irqext_wake() to new irq_ interrupt methods
Kernel 2.6.37 adds new interrupt methods which take a struct irq_data
rather than an irq number. Begin converting Samsung platforms over to
these methods by converting s3c_irqext_wake() with a simple textual
substitution.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 09:36:52 +09:00
Yinghai Lu
1411e0ec31 x86-64, numa: Put pgtable to local node memory
Introduce init_memory_mapping_high(), and use it with 64bit.

It will go with every memory segment above 4g to create page table to the
memory range itself.

before this patch all page tables was on one node.

with this patch, one RED-PEN is killed

debug out for 8 sockets system after patch
[    0.000000] initial memory mapped : 0 - 20000000
[    0.000000] init_memory_mapping: [0x00000000000000-0x0000007f74ffff]
[    0.000000]  0000000000 - 007f600000 page 2M
[    0.000000]  007f600000 - 007f750000 page 4k
[    0.000000] kernel direct mapping tables up to 7f750000 @ [0x7f74c000-0x7f74ffff]
[    0.000000] RAMDISK: 7bc84000 - 7f745000
....
[    0.000000] Adding active range (0, 0x10, 0x95) 0 entries of 3200 used
[    0.000000] Adding active range (0, 0x100, 0x7f750) 1 entries of 3200 used
[    0.000000] Adding active range (0, 0x100000, 0x1080000) 2 entries of 3200 used
[    0.000000] Adding active range (1, 0x1080000, 0x2080000) 3 entries of 3200 used
[    0.000000] Adding active range (2, 0x2080000, 0x3080000) 4 entries of 3200 used
[    0.000000] Adding active range (3, 0x3080000, 0x4080000) 5 entries of 3200 used
[    0.000000] Adding active range (4, 0x4080000, 0x5080000) 6 entries of 3200 used
[    0.000000] Adding active range (5, 0x5080000, 0x6080000) 7 entries of 3200 used
[    0.000000] Adding active range (6, 0x6080000, 0x7080000) 8 entries of 3200 used
[    0.000000] Adding active range (7, 0x7080000, 0x8080000) 9 entries of 3200 used
[    0.000000] init_memory_mapping: [0x00000100000000-0x0000107fffffff]
[    0.000000]  0100000000 - 1080000000 page 2M
[    0.000000] kernel direct mapping tables up to 1080000000 @ [0x107ffbd000-0x107fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x107ffc2000-0x107fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00001080000000-0x0000207fffffff]
[    0.000000]  1080000000 - 2080000000 page 2M
[    0.000000] kernel direct mapping tables up to 2080000000 @ [0x207ff7d000-0x207fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x207ffc0000-0x207fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00002080000000-0x0000307fffffff]
[    0.000000]  2080000000 - 3080000000 page 2M
[    0.000000] kernel direct mapping tables up to 3080000000 @ [0x307ff3d000-0x307fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x307ffc0000-0x307fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00003080000000-0x0000407fffffff]
[    0.000000]  3080000000 - 4080000000 page 2M
[    0.000000] kernel direct mapping tables up to 4080000000 @ [0x407fefd000-0x407fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x407ffc0000-0x407fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00004080000000-0x0000507fffffff]
[    0.000000]  4080000000 - 5080000000 page 2M
[    0.000000] kernel direct mapping tables up to 5080000000 @ [0x507febd000-0x507fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x507ffc0000-0x507fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00005080000000-0x0000607fffffff]
[    0.000000]  5080000000 - 6080000000 page 2M
[    0.000000] kernel direct mapping tables up to 6080000000 @ [0x607fe7d000-0x607fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x607ffc0000-0x607fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00006080000000-0x0000707fffffff]
[    0.000000]  6080000000 - 7080000000 page 2M
[    0.000000] kernel direct mapping tables up to 7080000000 @ [0x707fe3d000-0x707fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x707ffc0000-0x707fffffff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00007080000000-0x0000807fffffff]
[    0.000000]  7080000000 - 8080000000 page 2M
[    0.000000] kernel direct mapping tables up to 8080000000 @ [0x807fdfc000-0x807fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x807ffbf000-0x807fffffff]          PGTABLE
[    0.000000] Initmem setup node 0 [0000000000000000-000000107fffffff]
[    0.000000]   NODE_DATA [0x0000107ffbd000-0x0000107ffc1fff]
[    0.000000] Initmem setup node 1 [0000001080000000-000000207fffffff]
[    0.000000]   NODE_DATA [0x0000207ffbb000-0x0000207ffbffff]
[    0.000000] Initmem setup node 2 [0000002080000000-000000307fffffff]
[    0.000000]   NODE_DATA [0x0000307ffbb000-0x0000307ffbffff]
[    0.000000] Initmem setup node 3 [0000003080000000-000000407fffffff]
[    0.000000]   NODE_DATA [0x0000407ffbb000-0x0000407ffbffff]
[    0.000000] Initmem setup node 4 [0000004080000000-000000507fffffff]
[    0.000000]   NODE_DATA [0x0000507ffbb000-0x0000507ffbffff]
[    0.000000] Initmem setup node 5 [0000005080000000-000000607fffffff]
[    0.000000]   NODE_DATA [0x0000607ffbb000-0x0000607ffbffff]
[    0.000000] Initmem setup node 6 [0000006080000000-000000707fffffff]
[    0.000000]   NODE_DATA [0x0000707ffbb000-0x0000707ffbffff]
[    0.000000] Initmem setup node 7 [0000007080000000-000000807fffffff]
[    0.000000]   NODE_DATA [0x0000807ffba000-0x0000807ffbefff]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4D1933D1.9020609@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-29 15:48:08 -08:00
Yinghai Lu
dbef7b56d2 x86-64, numa: Allocate memnodemap under max_pfn_mapped
We need to access it right way, so make sure that it is mapped already.

Prepare to put page table on local node, and nodemap is used before that.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4D1933C8.7060105@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-29 15:48:08 -08:00
Yinghai Lu
45635ab5e4 x86: Change get_max_mapped() to inline
Move it into head file. to prepare use it in other files.

[ hpa: added missing <linux/types.h> and changed type to phys_addr_t. ]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4D1933BA.8000508@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-29 15:47:55 -08:00
Jassi Brar
d8a2d39d9e ARM: S5PV310: Enable I2S device on SMDKC210
Enable I2S_0 device on the SMDKC210.
Also, add the dependency I2C_1 device.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:36:43 +09:00
Jassi Brar
6f5c11c5a5 ARM: S5PV310: Enable I2S device on SMDKV310
Enable I2S_0 device on the SMDKV310.
Also, add the dependency I2C_1 device.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:36:40 +09:00
Jassi Brar
906b9826b8 ARM: S5PV310: Add AC97 support for SMDK
Enable AC97 audio device on SMDKV310 and SMDKC210.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:33:48 +09:00
Jassi Brar
2d27043f7b ARM: S5PV310: Define I2S clocks
Define missing controller clocks for the I2S-0, 1 and 2 blocks.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: Added description]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:33:05 +09:00
Jassi Brar
aa227557dd ARM: S5PV310: Add AC97 clock
Define clock for the AC97 controller.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:32:49 +09:00
Jassi Brar
3055c6dad6 ARM: S5PV310: Add PDMA clocks
Define PDMA clocks for the controller 0 and 1.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:32:45 +09:00
Jassi Brar
f5cc435490 ARM: S5PV310: Enable I2C1 device
Enable the I2C1 device on SMDKV310 and SMDKC210.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:32:42 +09:00
Jassi Brar
d8710bc8de ARM: S5PV210: Enable I2S device to work on SMDKV210
Add missing virtual ASoC DMA device and WM8580 as I2C slave,
so that the I2S can work on SMDKV210.

[kgene.kim@samsung.com: removed virtual ASoC DMA device
to avoid build error and it will be added next time]

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:32:18 +09:00
Jassi Brar
0031e9d91e ARM: S5PV210: Enable I2S device to work on SMDKC110
Add missing virtual ASoC DMA device and WM8580 as I2C slave,
so that the I2S can work on SMDKC110.

[kgene.kim@samsung.com: removed virtual ASoC DMA device
to avoid build error and it will be added next time]

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:31:55 +09:00
Jassi Brar
fcf8897d03 ARM: S5P6450: Enable I2S device to work on SMDK6450
Add missing virtual ASoC DMA device and WM8580 as I2C slave,
so that the I2S can work on SMDK6450.

[kgene.kim@samsung.com: removed virtual ASoC DMA device
to avoid build error and it will be added next time]

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:31:25 +09:00
Jassi Brar
149bb5bcc3 ARM: S5P6440: Enable I2S device to work on SMDK6440
Add missing virtual ASoC DMA device and WM8580 as I2C slave,
so that the I2S can work on SMDK6440.

[kgene.kim@samsung.com: removed virtual ASoC DMA device
to avoid build error and it will be added next time]

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:30:27 +09:00
Rajeshwari Shinde
e0b9c88b12 ARM: S5P64X0: Segregate audio devices
Segregate I2S devices for S5P6440 and S5P6450.

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:24:27 +09:00
Jassi Brar
cf57b1a7f2 ARM: S5P6450: Define base addresses for I2S
Define the base address of I2S-1 and 2 for S5P6450.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: Added description]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:24:23 +09:00
Jassi Brar
6cb26da820 ARM: S5P6450: Define clocks for I2S
Define missing controller clocks for the I2S-0,1 blocks.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:24:19 +09:00
Jassi Brar
c204fb1517 ARM: S5P6442: Enable I2C0 device on SMDK6442
This patch enables I2C0 device for WM8580 on SMDK6442.

Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title and description]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:23:20 +09:00
Jassi Brar
85e0dbf94e ARM: S5P6442: Implement i2c-gpio config
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-12-30 08:23:15 +09:00
Stephen Neuendorffer
e6ce1324e4 of/flattree: Add Kconfig for EARLY_FLATTREE
The device tree code is now in two pieces: some which can be used generically
on any platform which selects CONFIG_OF_FLATTREE, and some early which is used
at boot time on only a few architectures.  This patch segregates the early
code so that only those architectures which care about it need compile it.
This also means that some of the requirements in the early code (such as
a cmd_line variable) that most architectures (e.g. X86) don't provide
can be ignored.

Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
[grant.likely@secretlab.ca: remove extra blank line addition]
[grant.likely@secretlab.ca: fixed incorrect #ifdef CONFIG_EARLY_FLATTREE check]
[grant.likely@secretlab.ca: Made OF_EARLY_FLATTREE select instead of depend
                            on OF_FLATTREE]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-12-29 16:08:18 -07:00
Yinghai Lu
32e3f2b00c x86-64, gart: Fix allocation with memblock
When trying to change alloc_bootmem with memblock to go with real top-down
Found one old system:
[    0.000000] Node 0: aperture @ ac000000 size 64 MB
[    0.000000] Aperture pointing to e820 RAM. Ignoring.
[    0.000000] Your BIOS doesn't leave a aperture memory hole
[    0.000000] Please enable the IOMMU option in the BIOS setup
[    0.000000] This costs you 64 MB of RAM
[    0.000000]     memblock_x86_reserve_range: [0x2020000000-0x2023ffffff]       aperture64
[    0.000000] Cannot allocate aperture memory hole (ffff882020000000,65536K)
[    0.000000]        memblock_x86_free_range: [0x2020000000-0x2023ffffff]
[    0.000000] Kernel panic - not syncing: Not enough memory for aperture
[    0.000000] Pid: 0, comm: swapper Not tainted 2.6.37-rc5-tip-yh-06229-gb792dc2-dirty #331
[    0.000000] Call Trace:
[    0.000000]  [<ffffffff81cf50fe>] ? panic+0x91/0x1a3
[    0.000000]  [<ffffffff827c66b2>] ? gart_iommu_hole_init+0x3d7/0x4a3
[    0.000000]  [<ffffffff81d026a9>] ? _etext+0x0/0x3
[    0.000000]  [<ffffffff827ba940>] ? pci_iommu_alloc+0x47/0x71
[    0.000000]  [<ffffffff827c820b>] ? mem_init+0x19/0xec
[    0.000000]  [<ffffffff827b3c40>] ? start_kernel+0x20a/0x3e8
[    0.000000]  [<ffffffff827b32cc>] ? x86_64_start_reservations+0x9c/0xa0
[    0.000000]  [<ffffffff827b33e4>] ? x86_64_start_kernel+0x114/0x11b

it means __alloc_bootmem_nopanic() get too high for that aperture.

Use memblock_find_in_range() with limit directly.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4D0C0740.90104@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-29 14:46:54 -08:00
Yinghai Lu
4b239f458c x86-64, mm: Put early page table high
While dubug kdump, found current kernel will have problem with crashkernel=512M.

It turns out that initial mapping is to 512M, and later initial mapping to 4G
(acutally is 2040M in my platform), will put page table near 512M.
then initial mapping to 128g will be near 2g.

before this patch:
[    0.000000] initial memory mapped : 0 - 20000000
[    0.000000] init_memory_mapping: [0x00000000000000-0x0000007f74ffff]
[    0.000000]  0000000000 - 007f600000 page 2M
[    0.000000]  007f600000 - 007f750000 page 4k
[    0.000000] kernel direct mapping tables up to 7f750000 @ [0x1fffc000-0x1fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x1fffc000-0x1fffdfff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00000100000000-0x0000207fffffff]
[    0.000000]  0100000000 - 2080000000 page 2M
[    0.000000] kernel direct mapping tables up to 2080000000 @ [0x7bc01000-0x7bc83fff]
[    0.000000]     memblock_x86_reserve_range: [0x7bc01000-0x7bc7efff]          PGTABLE
[    0.000000] RAMDISK: 7bc84000 - 7f745000
[    0.000000] crashkernel reservation failed - No suitable area found.

after patch:
[    0.000000] initial memory mapped : 0 - 20000000
[    0.000000] init_memory_mapping: [0x00000000000000-0x0000007f74ffff]
[    0.000000]  0000000000 - 007f600000 page 2M
[    0.000000]  007f600000 - 007f750000 page 4k
[    0.000000] kernel direct mapping tables up to 7f750000 @ [0x7f74c000-0x7f74ffff]
[    0.000000]     memblock_x86_reserve_range: [0x7f74c000-0x7f74dfff]          PGTABLE
[    0.000000] init_memory_mapping: [0x00000100000000-0x0000207fffffff]
[    0.000000]  0100000000 - 2080000000 page 2M
[    0.000000] kernel direct mapping tables up to 2080000000 @ [0x207ff7d000-0x207fffffff]
[    0.000000]     memblock_x86_reserve_range: [0x207ff7d000-0x207fffafff]          PGTABLE
[    0.000000] RAMDISK: 7bc84000 - 7f745000
[    0.000000]     memblock_x86_reserve_range: [0x17000000-0x36ffffff]     CRASH KERNEL
[    0.000000] Reserving 512MB of memory at 368MB for crashkernel (System RAM: 133120MB)

It means with the patch, page table for [0, 2g) will need 2g, instead of under 512M,
page table for [4g, 128g) will be near 128g, instead of under 2g.

That would good, if we have lots of memory above 4g, like 1024g, or 2048g or 16T, will not put
related page table under 2g. that would be have chance to fill the under 2g if 1G or 2M page is
not used.

the code change will use add map_low_page() and update unmap_low_page() for 64bit, and use them
to get access the corresponding high memory for page table setting.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4D0C0734.7060900@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-29 14:46:54 -08:00
Sundar Iyer
60ebe1568f ux500: add TC35893 keypad platform data
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-29 22:07:05 +01:00
H. Peter Anvin
d50e8fc7e3 Merge branch 'x86/apic-cleanups' into x86/numa 2010-12-29 11:36:26 -08:00
Avi Kivity
649497d1a3 KVM: MMU: Fix incorrect direct gfn for unpaged mode shadow
We use the physical address instead of the base gfn for the four
PAE page directories we use in unpaged mode.  When the guest accesses
an address above 1GB that is backed by a large host page, a BUG_ON()
in kvm_mmu_set_gfn() triggers.

Resolves: https://bugzilla.kernel.org/show_bug.cgi?id=21962
Reported-and-tested-by: Nicolas Prochazka <prochazka.nicolas@gmail.com>
KVM-Stable-Tag.
Signed-off-by: Avi Kivity <avi@redhat.com>
2010-12-29 12:35:29 +02:00
Grant Likely
94a544a4e8 Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next
* 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next
  spi/pxa2xx: register driver properly
  spi/pxa2xx: add support for shared IRQ handler
  spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers
  arm/pxa2xx: reorgazine SSP and SPI header files
  spi/pxa2xx: Add CE4100 support
  spi/pxa2xx: Consider CE4100's FIFO depth
  spi/pxa2xx: Add chipselect support for Sodaville
  spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes.
  spi/pxa2xx: pass of_node to spi device and set a parent device
2010-12-29 01:05:50 -07:00