- Refactor EEPROM parameter config to support multiple ras EEPROMs.
- Convert bad page count to record count as EEPROM threshold.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Support retrieving bad page info from mp1_v15_0.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ras mp1 introduces common interfaces to manage mp1 data
obtained from different ASICs.
v2:
Add mutex to ensure complete data transactions with MP1.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Make space at the end of psp->cmd_buf_bo usable for extra data returned
from PSP commands.
Signed-off-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Mukul Joshi <mukul.joshi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add ext_umc_mask for the upper half of
adev->umc.active_mask and fill both fields
when building RAS TA init message.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add ext_umc_mask for the upper half of
adev->umc.active_mask and fill both fields
when building RAS TA init message.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
amdgpu_umc.active_mask is widened to u64 to
match 64-bit harvest masks and avoid LP32
unsigned long width limits.
Fix UMC harvest bitmask (drop le16 on u8, use 1ULL shift).
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Register psp_15_0_8_ta.bin with MODULE_FIRMWARE and
load TA for psp v15_0_8.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add psp_init_rl_microcode() to request amdgpu/%s_rl.bin and populate
psp->rl using the existing v1.0 PSP firmware header parsing.
Wire it up for psp v15_0_8.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add parse_psp_v1_bin_descriptor to populate struct psp_bin_desc
from psp_firmware_header_v1_0, shared by ASD, TOC and CAP
standalone firmware loads.
Use psp-> fields directly instead of adev->psp.
v2: code rebase
v3: Rename v1 header helper to parse_psp_v1_bin_descriptor,
have it return an error code with explicit NULL checks.
Rename sos v2 helper to parse_psp_v2_bin_descriptor for symmetry.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Support poison consumption handling for A + A sriov guest.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Some ASICs have different hw ras block IDs.
In order to be compatible with these ASICs,
it is necessary to map these hw RAS block IDs
to unified RAS block IDs.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add ras_psp v15_0 for A + A.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add ras ip configuration for A + A.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add new ras error type so that ACA parser
can parse ras data from mce.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add aca parser v5_0.
V2:
Support new mappings for hwip and hwid.
V3:
Change aca ip version.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Improve function interface to record different types of data.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Support separate logging of gfx aid and xcd errors.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Introduce new fields for BOOT CPER encoding, only important fields are
introduced here due to the cache size limit.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Introduce MCE type ras log event.
Parse error type of MCE and encode to corresponding CPER.
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Register mce notifier to obtain ras error info for A + A.
Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Signed-off-by: Xiang Liu <xiang.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
strcpy() has been deprecated because it performs no bounds checking
on the destination buffer, which can lead to buffer overflows. Replace
it with the safer strscpy(). No functional changes.
Signed-off-by: Amin Gattout <amin.gattout@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remove the actual is_idle member, since it's never read/called and
the previous patches have remove all the assignments.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The is_idle method on amd_ip_funcs is never called.
Remove the implementations that actually do something.
In most cases the same code has been duplicated in
the wait_for_idle method implementations that is still used.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The is_idle method on amd_ip_funcs is never called.
Remove the trivial cases where either:
a) It's just a return true function that can be deleted
together with the .is_init =
b) The function is called somewhere else, so we just remove
the assignment.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remove the kunit test case for the is_idle call we're
about to remove.
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
There is a spelling mistake in a DML_ASSERT_MSG message. Fix it.
v2: squash in additional spelling mistake (resul -> result)
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This DC patchset brings improvements in multiple areas. In summary, we
have:
* Reworked per-DPM derate handling: refactor the per-DPM derate logic,
update derates with default per-DPM values, and move the
soc_and_ip_translator onto the new per-DPM organization
* DCN6 mode-support and UTM work: opt-out for the OutstandingRequests
check, a utm_support capability flag, and a guard against an empty
DCN6 UTM QoS table
* More DMU/DMUB offload: send DPM0 clock values for Z8 retention, allow
DCHVM<->rIOMMU SDP port disconnection on DCN42, and add the DC_BLS
command
* HWSS block-sequence cleanups: move periodic interrupt calculations
to HWSS, drop pipe_ctx from HUBP_WAIT_FOR_DCC_META_PROP, use mpcc_id
instead of the hubp instance, and add a wait stream regen event
* DML updates: unify CalculateFlipSchedule logic and relax the frame
size limit for the dcn5/6 core funcs files
* clk_mgr refactor renaming carried DCE clock manager functions for
dcn10, plus a missing-prototype build fix and a static DCN42 SOC BB
struct
* Expanded IGT/KUnit validation: CACP ACE curve area debugfs and cursor
mode tests on disabled CRTCs
* eDP fix to skip teardown while a forced PSR is active
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
