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1,267,977 commits

Author SHA1 Message Date
Gabriel Fernandez
b5be49db3d dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
Adds clock and reset binding entries for STM32MP25 SoC family

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208143700.354785-4-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Gabriel Fernandez
30500c2ad9 clk: stm32mp1: use stm32mp13 reset driver
STM32MP15 is now using the same reset driver as STM32MP13 as they
have the same binding requirement.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Gabriel Fernandez
3ac7ca5995 clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
Move all STM32MP clock drivers into same directory (stm32).

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20231208143700.354785-2-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:33:26 -08:00
Marek Vasut
f0e5e18002 clk: rs9: Add support for 9FGV0841
This model is similar to 9FGV0441, the DIFx bits start at bit 0 again,
except this chip has 8 outputs.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:26:24 -08:00
Marek Vasut
cd9a5c97df clk: rs9: Replace model check with bitshift from chip data
Adjust rs9_calc_dif() to special-case the 9FGV0241 where DIFx bits
start at 1, encode this shift into chip data and drop the model
check entirely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:26:24 -08:00
Marek Vasut
780da7f11a clk: rs9: Limit check to vendor ID in VID register
Extract only vendor ID from VID register, the top 4 bits are
revision ID which are not useful for the vendor ID check.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:24:54 -08:00
Marek Vasut
ff1b5154b5 dt-bindings: clk: rs9: Add 9FGV0841
This is an 8-channel variant of 9FGV series.

Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:24:54 -08:00
Stanislav Jakubek
616eceb137 dt-bindings: clock: brcm,kona-ccu: convert to YAML
Convert Broadcom Kona family clock controller unit (CCU) bindings
to DT schema.

Changes during conversion:
  - remove "dmac" from clock-output-names for brcm,bcm11351-master-ccu,
    such a clock doesn't exist
  - remove "uartb4" from clock-output-names for brcm,bcm21664-slave-ccu,
    such a clock doesn't exist

Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/ZVED01t3+coBd44x@standask-GA-A55M-S2HP
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:23:16 -08:00
Rafał Miłecki
94b0f301f6 dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema
DT schema helps validating DTS files. Binding was moved to clock/ as
this hardware is a clock provider. Example required a small fix for
"reg" value (1 address cell + 1 size cell).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231119212416.2682-1-zajec5@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 15:21:19 -08:00
Linus Torvalds
ceb6a6f023 Linux 6.7-rc6 v6.7-rc6 2023-12-17 15:19:28 -08:00
Shubhrajyoti Datta
3a96393a46 clocking-wizard: Add support for versal clocking wizard
Add support for Clocking Wizard for Versal adaptive compute
acceleration platforms. The Versal clocking wizard differs
in the programming model and the register layout.
The CLKFBOUT_1 registers are at offset of 0x200
instead of the 0x330 in Versal. In Versal clocking wizard the low and
high time is programmed instead of the divisor.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20231214105125.26919-3-shubhrajyoti.datta@amd.com
[sboyd@kernel.org: Stop initializing spinlock flags]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 14:55:14 -08:00
Shubhrajyoti Datta
86b1ec23bb dt-bindings: clock: xilinx: add versal compatible
Add the devicetree compatible for Versal clocking wizard.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Link: https://lore.kernel.org/r/20231214105125.26919-2-shubhrajyoti.datta@amd.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 14:51:43 -08:00
Conor Dooley
2c973fb5d3 clk: microchip: mpfs-ccc: replace include of asm-generic/errno-base.h
As evidenced by the fact that only 2 other drivers include this header,
it is not a normal thing to do. Including the regular version of this
header is far more conventional for drivers.

Acked-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231214-dipper-earshot-72eef3059961@spud
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 14:47:43 -08:00
Jacky Huang
dc0684adf3 rtc: Add driver for Nuvoton ma35d1 rtc controller
The ma35d1 rtc controller provides real-time and calendar messaging
capabilities. It supports programmable time tick and alarm match
interrupts. The time and calendar messages are expressed in BCD format.
This driver supports the built-in rtc controller of the ma35d1. It
enables setting and reading the rtc time and configuring and reading
the rtc alarm.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20230925070251.28-4-ychuang570808@gmail.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 23:43:20 +01:00
Jacky Huang
3767bba698 dt-bindings: rtc: Add Nuvoton ma35d1 rtc
Add documentation describing the Nuvoton ma35d1 rtc controller.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230925070251.28-2-ychuang570808@gmail.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 23:43:20 +01:00
Shubhrajyoti Datta
39118392d1 dt-bindings: Remove alt_ref from versal
The alt_ref is present only in Versal-net devices.
Other versal devices do not have it. So remove alt_ref
for versal.

Fixes: 352546805a ("dt-bindings: clock: Add bindings for versal clock driver")
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>

Link: https://lore.kernel.org/r/20231128104348.16372-1-shubhrajyoti.datta@amd.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 14:24:45 -08:00
Marek Vasut
29d861b5d2 clk: rs9: Fix DIF OEn bit placement on 9FGV0241
On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE1 is BIT(2), on the other
chips like 9FGV0441 and 9FGV0841 DIF OE0 is BIT(0) and so on. Increment
the index in BIT() macro instead of the result of BIT() macro to shift
the bit correctly on 9FGV0241.

Fixes: 603df193ec ("clk: rs9: Support device specific dif bit calculation")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231105200642.62792-1-marek.vasut+renesas@mailbox.org
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-12-17 14:10:08 -08:00
Linus Torvalds
177c2ffe69 - Avoid iterating over newly created group leader event's siblings
because there are none, and thus prevent a lockdep splat
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Merge tag 'perf_urgent_for_v6.7_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf fix from Borislav Petkov:

 - Avoid iterating over newly created group leader event's siblings
   because there are none, and thus prevent a lockdep splat

* tag 'perf_urgent_for_v6.7_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf: Fix perf_event_validate_size() lockdep splat
2023-12-17 14:03:11 -08:00
Mario Limonciello
cef9ecc8e9 rtc: Extend timeout for waiting for UIP to clear to 1s
Specs don't say anything about UIP being cleared within 10ms. They
only say that UIP won't occur for another 244uS. If a long NMI occurs
while UIP is still updating it might not be possible to get valid
data in 10ms.

This has been observed in the wild that around s2idle some calls can
take up to 480ms before UIP is clear.

Adjust callers from outside an interrupt context to wait for up to a
1s instead of 10ms.

Cc:  <stable@vger.kernel.org> # 6.1.y
Fixes: ec5895c0f2 ("rtc: mc146818-lib: extract mc146818_avoid_UIP")
Reported-by: Carsten Hatger <xmb8dsv4@gmail.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217626
Tested-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Reviewed-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Acked-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20231128053653.101798-5-mario.limonciello@amd.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 22:33:55 +01:00
Mario Limonciello
120931db07 rtc: Add support for configuring the UIP timeout for RTC reads
The UIP timeout is hardcoded to 10ms for all RTC reads, but in some
contexts this might not be enough time. Add a timeout parameter to
mc146818_get_time() and mc146818_get_time_callback().

If UIP timeout is configured by caller to be >=100 ms and a call
takes this long, log a warning.

Make all callers use 10ms to ensure no functional changes.

Cc:  <stable@vger.kernel.org> # 6.1.y
Fixes: ec5895c0f2 ("rtc: mc146818-lib: extract mc146818_avoid_UIP")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Tested-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Reviewed-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Acked-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Link: https://lore.kernel.org/r/20231128053653.101798-4-mario.limonciello@amd.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 22:33:55 +01:00
Mario Limonciello
1311a8f0d4 rtc: Adjust failure return code for cmos_set_alarm()
When mc146818_avoid_UIP() fails to return a valid value, this is because
UIP didn't clear in the timeout period. Adjust the return code in this
case to -ETIMEDOUT.

Tested-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Reviewed-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Acked-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Cc:  <stable@vger.kernel.org>
Fixes: cdedc45c57 ("rtc: cmos: avoid UIP when reading alarm time")
Fixes: cd17420ebe ("rtc: cmos: avoid UIP when writing alarm time")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20231128053653.101798-3-mario.limonciello@amd.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 22:33:54 +01:00
Mario Limonciello
af838635a3 rtc: mc146818-lib: Adjust failure return code for mc146818_get_time()
mc146818_get_time() calls mc146818_avoid_UIP() to avoid fetching the
time while RTC update is in progress (UIP). When this fails, the return
code is -EIO, but actually there was no IO failure.

The reason for the return from mc146818_avoid_UIP() is that the UIP
wasn't cleared in the time period. Adjust the return code to -ETIMEDOUT
to match the behavior.

Tested-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Reviewed-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Acked-by: Mateusz Jończyk <mat.jonczyk@o2.pl>
Cc:  <stable@vger.kernel.org>
Fixes: 2a61b0ac54 ("rtc: mc146818-lib: refactor mc146818_get_time")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20231128053653.101798-2-mario.limonciello@amd.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2023-12-17 22:33:54 +01:00
Krzysztof Kozlowski
48a9ba5eb4 arm64: defconfig: enable Qualcomm WSA884x driver
Enable the Qualcomm WSA884x driver, used speakers on boards with
Qualcomm SM8550 like QRD8550.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231106073048.24553-1-krzysztof.kozlowski@linaro.org
[bjorn: Rebased on Johan's patch adding SC8280XP and WSA883x, rewrote commit message]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 15:03:06 -06:00
Johan Hovold
4849089900 arm64: defconfig: enable Qualcomm UEFI Secure App driver
Enable the Qualcomm QSEECOM interface driver and the UEFI Secure
Application client driver which are needed to access EFI variables on
machines like the Lenovo ThinkPad X13s.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231012080157.4616-3-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 15:01:58 -06:00
Johan Hovold
223e8af324 arm64: defconfig: enable Qualcomm sc8280xp sound drivers
Enable the Qualcomm sc8280xp machine driver and the wsa833x speaker
codec driver that are needed for sound on machines like the Lenovo
ThinkPad X13s.

Note that the wcd938x headphone codec driver is currently implicitly
enabled as it is selected by the sc7280 machine driver.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20231012080157.4616-2-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 15:01:58 -06:00
David S. Miller
979e90173a Merge branch 'mptcp-misc-fixes'
Matthieu Baerts says:

====================
mptcp: misc. fixes for v6.7

Here are a few fixes related to MPTCP:

Patch 1 avoids skipping some subtests of the MPTCP Join selftest by
mistake when using older versions of GCC. This fixes a patch introduced
in v6.4, backported up to v6.1.

Patch 2 fixes an inconsistent state when using MPTCP + FastOpen. A fix
for v6.2.

Patch 3 adds a description for MPTCP Kunit test modules to avoid a
warning.

Patch 4 adds an entry to the mailmap file for Geliang's email addresses.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Matthieu Baerts <matttbe@kernel.org>
2023-12-17 20:54:22 +00:00
Geliang Tang
356c71c461 mailmap: add entries for Geliang Tang
Map Geliang's old mail addresses to his @linux.dev one.

Suggested-by: Mat Martineau <martineau@kernel.org>
Signed-off-by: Geliang Tang <geliang.tang@linux.dev>
Reviewed-by: Matthieu Baerts <matttbe@kernel.org>
Signed-off-by: Matthieu Baerts <matttbe@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:54:22 +00:00
Matthieu Baerts
a8f570b247 mptcp: fill in missing MODULE_DESCRIPTION()
W=1 builds warn on missing MODULE_DESCRIPTION, add them here in MPTCP.

Only two were missing: two modules with different KUnit tests for MPTCP.

Reviewed-by: Mat Martineau <martineau@kernel.org>
Signed-off-by: Matthieu Baerts <matttbe@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:54:22 +00:00
Paolo Abeni
4fd19a3070 mptcp: fix inconsistent state on fastopen race
The netlink PM can race with fastopen self-connect attempts, shutting
down the first subflow via:

MPTCP_PM_CMD_DEL_ADDR -> mptcp_nl_remove_id_zero_address ->
  mptcp_pm_nl_rm_subflow_received -> mptcp_close_ssk

and transitioning such subflow to FIN_WAIT1 status before the syn-ack
packet is processed. The MPTCP code does not react to such state change,
leaving the connection in not-fallback status and the subflow handshake
uncompleted, triggering the following splat:

  WARNING: CPU: 0 PID: 10630 at net/mptcp/subflow.c:1405 subflow_data_ready+0x39f/0x690 net/mptcp/subflow.c:1405
  Modules linked in:
  CPU: 0 PID: 10630 Comm: kworker/u4:11 Not tainted 6.6.0-syzkaller-14500-g1c41041124bd #0
  Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 10/09/2023
  Workqueue: bat_events batadv_nc_worker
  RIP: 0010:subflow_data_ready+0x39f/0x690 net/mptcp/subflow.c:1405
  Code: 18 89 ee e8 e3 d2 21 f7 40 84 ed 75 1f e8 a9 d7 21 f7 44 89 fe bf 07 00 00 00 e8 0c d3 21 f7 41 83 ff 07 74 07 e8 91 d7 21 f7 <0f> 0b e8 8a d7 21 f7 48 89 df e8 d2 b2 ff ff 31 ff 89 c5 89 c6 e8
  RSP: 0018:ffffc90000007448 EFLAGS: 00010246
  RAX: 0000000000000000 RBX: ffff888031efc700 RCX: ffffffff8a65baf4
  RDX: ffff888043222140 RSI: ffffffff8a65baff RDI: 0000000000000005
  RBP: 0000000000000000 R08: 0000000000000005 R09: 0000000000000007
  R10: 000000000000000b R11: 0000000000000000 R12: 1ffff92000000e89
  R13: ffff88807a534d80 R14: ffff888021c11a00 R15: 000000000000000b
  FS:  0000000000000000(0000) GS:ffff8880b9800000(0000) knlGS:0000000000000000
  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
  CR2: 00007fa19a0ffc81 CR3: 000000007a2db000 CR4: 00000000003506f0
  DR0: 000000000000d8dd DR1: 0000000000000000 DR2: 0000000000000000
  DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
  Call Trace:
   <IRQ>
   tcp_data_ready+0x14c/0x5b0 net/ipv4/tcp_input.c:5128
   tcp_data_queue+0x19c3/0x5190 net/ipv4/tcp_input.c:5208
   tcp_rcv_state_process+0x11ef/0x4e10 net/ipv4/tcp_input.c:6844
   tcp_v4_do_rcv+0x369/0xa10 net/ipv4/tcp_ipv4.c:1929
   tcp_v4_rcv+0x3888/0x3b30 net/ipv4/tcp_ipv4.c:2329
   ip_protocol_deliver_rcu+0x9f/0x480 net/ipv4/ip_input.c:205
   ip_local_deliver_finish+0x2e4/0x510 net/ipv4/ip_input.c:233
   NF_HOOK include/linux/netfilter.h:314 [inline]
   NF_HOOK include/linux/netfilter.h:308 [inline]
   ip_local_deliver+0x1b6/0x550 net/ipv4/ip_input.c:254
   dst_input include/net/dst.h:461 [inline]
   ip_rcv_finish+0x1c4/0x2e0 net/ipv4/ip_input.c:449
   NF_HOOK include/linux/netfilter.h:314 [inline]
   NF_HOOK include/linux/netfilter.h:308 [inline]
   ip_rcv+0xce/0x440 net/ipv4/ip_input.c:569
   __netif_receive_skb_one_core+0x115/0x180 net/core/dev.c:5527
   __netif_receive_skb+0x1f/0x1b0 net/core/dev.c:5641
   process_backlog+0x101/0x6b0 net/core/dev.c:5969
   __napi_poll.constprop.0+0xb4/0x540 net/core/dev.c:6531
   napi_poll net/core/dev.c:6600 [inline]
   net_rx_action+0x956/0xe90 net/core/dev.c:6733
   __do_softirq+0x21a/0x968 kernel/softirq.c:553
   do_softirq kernel/softirq.c:454 [inline]
   do_softirq+0xaa/0xe0 kernel/softirq.c:441
   </IRQ>
   <TASK>
   __local_bh_enable_ip+0xf8/0x120 kernel/softirq.c:381
   spin_unlock_bh include/linux/spinlock.h:396 [inline]
   batadv_nc_purge_paths+0x1ce/0x3c0 net/batman-adv/network-coding.c:471
   batadv_nc_worker+0x9b1/0x10e0 net/batman-adv/network-coding.c:722
   process_one_work+0x884/0x15c0 kernel/workqueue.c:2630
   process_scheduled_works kernel/workqueue.c:2703 [inline]
   worker_thread+0x8b9/0x1290 kernel/workqueue.c:2784
   kthread+0x33c/0x440 kernel/kthread.c:388
   ret_from_fork+0x45/0x80 arch/x86/kernel/process.c:147
   ret_from_fork_asm+0x11/0x20 arch/x86/entry/entry_64.S:242
   </TASK>

To address the issue, catch the racing subflow state change and
use it to cause the MPTCP fallback. Such fallback is also used to
cause the first subflow state propagation to the msk socket via
mptcp_set_connected(). After this change, the first subflow can
additionally propagate the TCP_FIN_WAIT1 state, so rename the
helper accordingly.

Finally, if the state propagation is delayed to the msk release
callback, the first subflow can change to a different state in between.
Cache the relevant target state in a new msk-level field and use
such value to update the msk state at release time.

Fixes: 1e777f39b4 ("mptcp: add MSG_FASTOPEN sendmsg flag support")
Cc: stable@vger.kernel.org
Reported-by: <syzbot+c53d4d3ddb327e80bc51@syzkaller.appspotmail.com>
Closes: https://github.com/multipath-tcp/mptcp_net-next/issues/458
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Reviewed-by: Mat Martineau <martineau@kernel.org>
Signed-off-by: Matthieu Baerts <matttbe@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:54:22 +00:00
Geliang Tang
c8f021eec5 selftests: mptcp: join: fix subflow_send_ack lookup
MPC backups tests will skip unexpected sometimes (For example, when
compiling kernel with an older version of gcc, such as gcc-8), since
static functions like mptcp_subflow_send_ack also be listed in
/proc/kallsyms, with a 't' in front of it, not 'T' ('T' is for a global
function):

 > grep "mptcp_subflow_send_ack" /proc/kallsyms

 0000000000000000 T __pfx___mptcp_subflow_send_ack
 0000000000000000 T __mptcp_subflow_send_ack
 0000000000000000 t __pfx_mptcp_subflow_send_ack
 0000000000000000 t mptcp_subflow_send_ack

In this case, mptcp_lib_kallsyms_doesnt_have "mptcp_subflow_send_ack$"
will be false, MPC backups tests will skip. This is not what we expected.

The correct logic here should be: if mptcp_subflow_send_ack is not a
global function in /proc/kallsyms, do these MPC backups tests. So a 'T'
must be added in front of mptcp_subflow_send_ack.

Fixes: 632978f0a9 ("selftests: mptcp: join: skip MPC backups tests if not supported")
Cc: stable@vger.kernel.org
Signed-off-by: Geliang Tang <geliang.tang@linux.dev>
Reviewed-by: Mat Martineau <martineau@kernel.org>
Signed-off-by: Matthieu Baerts <matttbe@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:54:21 +00:00
Konrad Dybcio
b7b9a6aa7a arm64: dts: qcom: sc8180x-primus: Allow UFS regulators load/mode setting
The UFS driver expects to be able to set load (and by extension, mode)
on the supplied regulators. Add the necessary properties to make that
possible.

Fixes: 2ce38cc1e8 ("arm64: dts: qcom: sc8180x: Introduce Primus")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214-topic-sc8180_fixes-v1-6-421904863006@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:28:17 -06:00
Konrad Dybcio
c879ee1179 arm64: dts: qcom: sc8180x: Describe the GIC redistributor
The redistributor properties were absent in the initial submission,
add them.

Fixes: 8575f197b0 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214-topic-sc8180_fixes-v1-5-421904863006@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:28:17 -06:00
Konrad Dybcio
384ea2aa20 arm64: dts: qcom: sc8180x: Add interconnects to UFS
To ensure the required paths don't collapse, add interconnect properties
to the UFS controller.

Fixes: 8575f197b0 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214-topic-sc8180_fixes-v1-4-421904863006@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:28:17 -06:00
Konrad Dybcio
4978dfde89 arm64: dts: qcom: sc8180x: Add missing MDP clocks
The ROT clock is required for the MDP block to function (looks like some
others depend on it), and whike the LUT clock's purpose is not clear,
it's likely better to turn on all of MDP's dependencies rather than not
doing so.

Add these clocks under the MDP node. This also makes Primus work without
clk_ignore_unused (as far as the dmesg-visible errors go, anyway).

Fixes: 494dec9b6f ("arm64: dts: qcom: sc8180x: Add display and gpu nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214-topic-sc8180_fixes-v1-3-421904863006@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:28:17 -06:00
Konrad Dybcio
2564209891 arm64: dts: qcom: sc8180x: Add UFS GDSC
To make sure the UFS controller and some relevant clocks have power
flowing to them, hook up the forgotten-about GDSC.

Fixes: 8575f197b0 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231214-topic-sc8180_fixes-v1-2-421904863006@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:28:17 -06:00
Luca Weiss
5037ca35ce arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi
It appears that all SC7280-based devices so far have mpss_mem and
wpss_mem on the same reg with the same size.

Also these memory regions are referenced already in sc7280.dtsi so
that's where they should also be defined.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-4-6aa394d33edf@fairphone.com
[bjorn: delete-node &wpss_mem in qcs6490 rb3gen2, and qcm6490 idp]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 14:11:27 -06:00
David S. Miller
54f4c2570a Merge branch 'phy-ackage-addr-mmd-apis'
Christian Marangi says:

====================
net: phy: add PHY package base addr + mmd APIs

This small series is required for the upcoming qca807x PHY that
will make use of PHY package mmd API and the new implementation
with read/write based on base addr.

The MMD PHY package patch currently has no use but it will be
used in the upcoming patch and it does complete what a PHY package
may require in addition to basic read/write to setup global PHY address.

(Changelog for all the revision is present in the single patch)
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:10:08 +00:00
Christian Marangi
d63710fc0f net: phy: add support for PHY package MMD read/write
Some PHY in PHY package may require to read/write MMD regs to correctly
configure the PHY package.

Add support for these additional required function in both lock and no
lock variant.

It's assumed that the entire PHY package is either C22 or C45. We use
C22 or C45 way of writing/reading to mmd regs based on the passed phydev
whether it's C22 or C45.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:10:07 +00:00
Christian Marangi
028672bd1d net: phy: restructure __phy_write/read_mmd to helper and phydev user
Restructure phy_write_mmd and phy_read_mmd to implement generic helper
for direct mdiobus access for mmd and use these helper for phydev user.

This is needed in preparation of PHY package API that requires generic
access to the mdiobus and are deatched from phydev struct but instead
access them based on PHY package base_addr and offsets.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:10:07 +00:00
Christian Marangi
9eea577eb1 net: phy: extend PHY package API to support multiple global address
Current API for PHY package are limited to single address to configure
global settings for the PHY package.

It was found that some PHY package (for example the qca807x, a PHY
package that is shipped with a bundle of 5 PHY) requires multiple PHY
address to configure global settings. An example scenario is a PHY that
have a dedicated PHY for PSGMII/serdes calibrarion and have a specific
PHY in the package where the global PHY mode is set and affects every
other PHY in the package.

Change the API in the following way:
- Change phy_package_join() to take the base addr of the PHY package
  instead of the global PHY addr.
- Make __/phy_package_write/read() require an additional arg that
  select what global PHY address to use by passing the offset from the
  base addr passed on phy_package_join().

Each user of this API is updated to follow this new implementation
following a pattern where an enum is defined to declare the offset of the
addr.

We also drop the check if shared is defined as any user of the
phy_package_read/write is expected to use phy_package_join first. Misuse
of this will correctly trigger a kernel panic for NULL pointer
exception.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:10:07 +00:00
Christian Marangi
ebb30ccbbd net: phy: make addr type u8 in phy_package_shared struct
Switch addr type in phy_package_shared struct to u8.

The value is already checked to be non negative and to be less than
PHY_MAX_ADDR, hence u8 is better suited than using int.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:10:07 +00:00
Suman Ghosh
dd78428786 octeontx2-af: Add new devlink param to configure maximum usable NIX block LFs
On some silicon variants the number of available CAM entries are
less. Reserving one entry for each NIX-LF for default DMAC based pkt
forwarding rules will reduce the number of available CAM entries
further. Hence add configurability via devlink to set maximum number of
NIX-LFs needed which inturn frees up some CAM entries.

Signed-off-by: Suman Ghosh <sumang@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-12-17 20:05:35 +00:00
Luca Weiss
648002a27c ARM: dts: qcom: msm8974*: Re-enable remoteprocs on various boards
Even though a previous patch re-added the supplies to the adsp and modem
remoteprocs, due to timing differences in the meantime the remoteprocs
were disabled by default, but the commit re-adding the supplies didn't
enable them.

Enable them now to hopefully properly resolve the fallout now.

Fixes: 6d933c0ec1 ("ARM: dts: qcom: msm8974-*: re-add remoteproc supplies")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20231217-msm8974-misc-v1-3-bece1ba2667d@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 12:09:42 -06:00
Luca Weiss
1522b3bb30 ARM: dts: qcom: msm8974: Remove bogus cd-gpio pinctrl
No board in mainline uses GPIO 54 for card-detect on sdhc_2, and this
also causes conflict when both sdhc_2 and blsp2_uart4 are used, such as
on qcom-msm8974-lge-nexus5-hammerhead.

Fixes: 1dfe967ec7 ("ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI")
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20231217-msm8974-misc-v1-2-bece1ba2667d@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 12:09:42 -06:00
Alexey Minnekhanov
32b075f8a2 ARM: dts: qcom: msm8974-klte: Remove unused property
Panel driver samsung,s6e3fa2 does not use te-gpios. The pin is already
configured properly through pinctrl.

Fixes: 3657b677d2 ("ARM: dts: qcom: msm8974-klte: add support for display")
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
[luca: adjust commit message, add Fixes tag]
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20231217-msm8974-misc-v1-1-bece1ba2667d@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 12:09:42 -06:00
Luca Weiss
6615713c10 arm64: dts: qcom: sc7280: Rename reserved-memory nodes
It was clarified a while ago that reserved-memory nodes shouldn't be
called memory@ but should have a descriptive name. Update sc7280.dtsi to
follow that.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-3-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 12:08:37 -06:00
Luca Weiss
300ed425df remoteproc: qcom_q6v5_pas: Add SC7280 ADSP, CDSP & WPSS
Add support for the ADSP, CDSP and WPSS remoteprocs found on the SC7280
SoC using the q6v5-pas driver.

This driver can be used on regular LA ("Linux Android") based releases,
however the SC7280 ChromeOS devices need different driver support due to
firmware differences.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-6-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 10:06:32 -08:00
Luca Weiss
11eff10204 dt-bindings: remoteproc: qcom: sc7180-pas: Add SC7280 compatibles
Add the compatibles and constraints for the ADSP, CDSP and WPSS found on
the SC7280 SoC.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-5-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 10:06:31 -08:00
Luca Weiss
9d598fab97 dt-bindings: remoteproc: qcom: sc7180-pas: Fix SC7280 MPSS PD-names
The power domains for MPSS on SC7280 are actually named CX and MSS, and
not CX and MX. Adjust the name which also aligns the bindings with the
dts and fixes validation.

Fixes: 8bb92d6fd0 ("dt-bindings: remoteproc: qcom,sc7180-pas: split into separate file")
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-1-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 10:06:31 -08:00
Luca Weiss
419618bd90 arm64: dts: qcom: sc7280: Remove unused second MPSS reg
The bindings for sc7280-mpss-pas neither expects a second reg nor a
reg-names property, which is only required by the sc7280-mss-pil
bindings.

Move it to sc7280-herobrine-lte-sku.dtsi, the only place where that
other compatible is used.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231208-sc7280-remoteprocs-v3-2-6aa394d33edf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-17 12:05:39 -06:00