Commit graph

1,385,397 commits

Author SHA1 Message Date
Willie Thai
2f0f9cc149 dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
Add Nvidia's  GB200NVL BMC board compatible.

Co-developed-by: Mars Yang <maryang@nvidia.com>
Signed-off-by: Mars Yang <maryang@nvidia.com>
Signed-off-by: Willie Thai <wthai@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250401153955.314860-2-wthai@nvidia.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:19 +09:30
Potin Lai
373d9b5989 ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
Add the `mctp-controller` property and MCTP nodes to enable support for
backend NIC management via PLDM over MCTP.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-10-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:19 +09:30
Potin Lai
aadc4c3ddd ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
Revise the I2C bus and address for the Cable Backplane Cartridge (CBC)
FRU EEPROM in the Catalina device tree.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-9-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:19 +09:30
Potin Lai
df89538262 ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
Update the device tree to enable `multi-master` mode on I2C buses shared
between the host BMC and the NV module with HMC. This ensures proper bus
arbitration and coordination in multi-master environments, preventing
communication conflicts and improving reliability.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-8-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:19 +09:30
Potin Lai
8f58b439c4 ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
Remove INA238 and INA230 power sensor nodes from the device tree (DTS) due
to incompatibility with the second-source ISL28022, which shares the same
I2C address.

Move the driver probe to userspace to handle sensor dynamically.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-7-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
f2919835b8 ARM: dts: aspeed: catalina: Add second source HSC node support
Add device tree nodes for the XDP710 Hot-Swap Controller (HSC) to support
the Power Distribution Board (PDB) with a second-source configuration.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-6-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
8c2d9fc032 ARM: dts: aspeed: catalina: Add second source fan controller support
Add device tree nodes for the NCT7363 fan controllers on the second-source
Power Distribution Board (PDB).

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-5-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
ebd7b3c42f ARM: dts: aspeed: catalina: Add fan controller support
Add device tree nodes for the MAX31790 fan controllers on the Power
Distribution Board (PDB). These nodes enable fan speed control and
monitoring, improving thermal management and system reliability.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-4-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
d276bb9fb5 ARM: dts: aspeed: catalina: Add MP5990 power sensor node
Add a device tree node for the MP5990 power sensor to enable monitoring of
the P12V supplying power to the fans.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-3-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
a2c2d4c417 ARM: dts: aspeed: catalina: Add Front IO board remote thermal sensor
Add a remote thermal sensor node for the Front IO board in the Catalina
platform device tree. This sensor enables monitoring of the inlet
temperature.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-2-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
6e8b400ddd ARM: dts: aspeed: catalina: Add IO Mezz board thermal sensor nodes
Add thermal sensor nodes for the IO Mezzanine (IO Mezz) board in the
Catalina platform device tree. These nodes enable temperature monitoring
for the backend NIC, improving thermal management and monitoring
capabilities.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-1-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
4de4329d8a ARM: dts: aspeed: system1: Disable gpio pull down
Disable internal pull down for the following GPIO lines.
- GPIOL4 - Reset PCH registers in the rtc.
- GPIOL5 - Reset portition of Intel ME
- GPIOL6 - FM smi active
- GPIOL7 - psu all dc power good.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-10-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
c8c33f37a6 ARM: dts: aspeed: system1: Mark GPIO line high/low
- Mark following GPIO lines as input high:
  - GPIOL4 (reset PCH registers)
  - GPIOL5 (reset portition of intel ME)
- Mark isolate errors from cpu1 gpio (GPIOO6) as active low output.
- The fan controller reset line should be active high.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-9-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
322dbe88fe ARM: dts: aspeed: system1: Remove VRs max8952
Removing voltage regulators max8952 from device tree. Those are fully
controlled by hardware and firmware should not touch them.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-8-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
3969aadf4b ARM: dts: aspeed: system1: Update LED gpio name
Rename LEDs with meaningful names for easier identification.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-7-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
24c5110ce8 ARM: dts: aspeed: system1: Reduce sgpio speed
Reduce sgpio speed to improve stability with the current PCB layout.

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-6-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
05a8cfc12f ARM: dts: aspeed: system1: Add GPIO line name
Add following GPIO line name so that userspace can control them
    - Flash write override
    - pch-reset

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-5-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
f06ff444bf ARM: dts: aspeed: system1: Add IPMB device
Add IPMB device sitting behind PCH module

Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250204194115.3899174-4-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Ninad Palsule
6b357c149e dt-bindings: ipmi: Add binding for IPMB device
Add device tree binding document for the IPMB device interface.
This device is already in use in both driver and .dts files.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Acked-by: Corey Minyard <corey@minyard.net>
Link: https://patch.msgid.link/20250204194115.3899174-2-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Potin Lai
94706cdd3e ARM: dts: aspeed: bletchley: remove unused ethernet-phy node
Remove the unused `ethernet-phy` node and the `phy-handle` property
from the Bletchley device tree. This fixes warnings reported by the
kernel DTB checks.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250213-bletchley-dts-fix-v1-1-c953315eb894@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Krzysztof Kozlowski
94776ee4e1 ARM: dts: aspeed: Align GPIO hog name with bindings
Bindings expect GPIO hog names to end with 'hog' suffix, so correct it
to fix dtbs_check warnings like:

  aspeed-bmc-lenovo-hr630.dtb: pin_gpio_b5: $nodename:0: 'pin_gpio_b5' does not match '^.+-hog(-[0-9]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://patch.msgid.link/20250116090009.87338-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:18 +09:30
Joel Stanley
a7d6d2d622 ARM: dts: aspeed: Remove swift machine
This machine is no longer in use, and support was deleted from openbmc
in March 2022.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patch.msgid.link/20250115112239.430636-1-joel@jms.id.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11 13:49:17 +09:30
Lijuan Gao
f9262233b7 dt-bindings: remoteproc: qcom,sm8150-pas: Document QCS615 remoteproc
Document the components used to boot the ADSP and CDSP on the Qualcomm
QCS615 SoC. Use fallback to indicate the compatibility of the remoteproc
on the QCS615 with that on the SM8150.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-1-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 23:13:06 -05:00
Miri Korenblit
ff71bc9d0f wifi: iwlwifi: move iwl-context-info header files
context info is PCIE specific, so it should be located in pcie
directory. The c files are already there, move also the header files.

Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250609211928.606f48f72bcd.I4b89d373d961146e5369d1aed9f625150de7bf7d@changeid
2025-06-11 06:27:30 +03:00
Johannes Berg
3b05871a22 wifi: iwlwifi: pcie: add missing TOP reset code
The TOP reset requires code to handle the interrupt, which had
been in my patch at some point, but clearly got lost. As the
test had been running on the wrong hardware and failing due to
that, we missed this. Add the missing code.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250609211928.3f84eb03cc00.If138ceeb8bb178b3931d96b537f746346227e681@changeid
2025-06-11 06:27:25 +03:00
Itamar Shalev
aab09bf122 wifi: iwlwifi: mld: respect AUTO_EML_ENABLE in iwl_mld_int_mlo_scan()
Respect this flag and don't scan for another link if it is set.

Signed-off-by: Itamar Shalev <itamar.shalev@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250609211928.9ecb5c5301d4.I88b37e93d9ba66d4381f4976541b4aca2a20e36e@changeid
2025-06-11 06:27:18 +03:00
Daniel Gabay
21f7fe24d2 wifi: iwlwifi: mld: respect AUTO_EML_ENABLE in iwl_mld_retry_emlsr()
Respect this flag before initiating MLO scan.

Signed-off-by: Daniel Gabay <daniel.gabay@intel.com>
Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250609211928.b5c7fbdcb15c.Iaa176c49142b46b0b896728005357faec6a55fa6@changeid
2025-06-11 06:27:10 +03:00
Miri Korenblit
5c14bff692 wifi: iwlwifi: mld: remove unneeded compilations
Those are internal files so they should not be compiled.

Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250609211928.3bfe5222fe79.I1ebd746b0c513e278d231b5c48f5438ca9b9231f@changeid
2025-06-11 06:26:58 +03:00
Satya Priya Kakitapalli
277d48b2ab arm64: dts: qcom: Add camera clock controller for sc8180x
Add device node for camera clock controller on Qualcomm
SC8180X platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-4-8fb1d3265f52@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:17:05 -05:00
Bjorn Andersson
7d895e3ef0 Merge branch '20250512-sc8180x-camcc-support-v4-2-8fb1d3265f52@quicinc.com' into arm64-for-6.17
Merge the topic branch containing SC8180X GCC and camera clock
controller additions to gain access to the constants defined in the
binding.
2025-06-10 22:16:03 -05:00
Satya Priya Kakitapalli
691f3413ba clk: qcom: camcc-sc8180x: Add SC8180X camera clock controller driver
Add support for the camera clock controller for camera clients to
be able to request for camcc clocks on SC8180X platform.

Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-3-8fb1d3265f52@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:15:49 -05:00
Bjorn Andersson
910ad0190c Merge branch '20250512-sc8180x-camcc-support-v4-2-8fb1d3265f52@quicinc.com' into clk-for-6.17
Merge topic branch with missing GCC clocks and the camera clock
controller for SC8180X through a topic branch, to make it available for
DeviceTree inclusion as well.
2025-06-10 22:14:41 -05:00
Satya Priya Kakitapalli
b5975ce461 dt-bindings: clock: Add Qualcomm SC8180X Camera clock controller
Add device tree bindings for the camera clock controller on
Qualcomm SC8180X platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-2-8fb1d3265f52@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:14:31 -05:00
Satya Priya Kakitapalli
19ac3579af dt-bindings: clock: qcom: Add missing bindings on gcc-sc8180x
The multi-media AHB clocks are needed to create HW dependency in
the multimedia CC dt blocks and avoid any issues. They were not
defined in the initial bindings. Add all the missing clock bindings
for gcc-sc8180x.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-1-8fb1d3265f52@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:14:31 -05:00
Krzysztof Kozlowski
0acf9e65a4 clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks
On SM8750 the setting rate of pixel and byte clocks, while the parent
DSI PHY PLL, fails with:

  disp_cc_mdss_byte0_clk_src: rcg didn't update its configuration.

DSI PHY PLL has to be unprepared and its "PLL Power Down" bits in
CMN_CTRL_0 asserted.

Mark these clocks with CLK_OPS_PARENT_ENABLE to ensure the parent is
enabled during rate changes.

Cc: stable@vger.kernel.org
Fixes: f1080d8dab ("clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250520090741.45820-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:13:06 -05:00
Christian Marangi
077ec7bcec clk: qcom: gcc-ipq8074: fix broken freq table for nss_port6_tx_clk_src
With the conversion done by commit e88f03230d ("clk: qcom: gcc-ipq8074:
rework nss_port5/6 clock to multiple conf") a Copy-Paste error was made
for the nss_port6_tx_clk_src frequency table.

This was caused by the wrong setting of the parent in
ftbl_nss_port6_tx_clk_src that was wrongly set to P_UNIPHY1_RX instead
of P_UNIPHY2_TX.

This cause the UNIPHY2 port to malfunction when it needs to be scaled to
higher clock. The malfunction was observed with the example scenario
with an Aquantia 10G PHY connected and a speed higher than 1G (example
2.5G)

Fix the broken frequency table to restore original functionality.

Cc: stable@vger.kernel.org
Fixes: e88f03230d ("clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20250522202600.4028-1-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:12:47 -05:00
Taniya Das
9ed3eccdfd clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's
The video driver will be using the newly introduced
dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW
control modes at runtime.
Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for
Qualcomm SoC SC7180, SDM845, SM7150, SM8150 and SM8450.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com>
Link: https://lore.kernel.org/r/20250530-switch_gdsc_mode-v5-1-657c56313351@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:12:39 -05:00
Herbert Xu
4ccd065a69 crypto: ahash - Add support for drivers with no fallback
Some drivers cannot have a fallback, e.g., because the key is held
in hardware.  Allow these to be used with ahash by adding the bit
CRYPTO_ALG_NO_FALLBACK.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Tested-by: Harald Freudenberger <freude@linux.ibm.com>
2025-06-11 11:06:06 +08:00
Bjorn Andersson
2c0c883f89 remoteproc: qcom: pas: Conclude the rename from adsp
The change that renamed the driver from "adsp" to "pas" didn't change
any of the implementation. The result is an aesthetic eyesore, and
confusing to many.

Conclude the rename of the driver, by updating function, structures and
variable names to match what the driver actually is. The "Hexagon v5" is
also dropped from the name and Kconfig, as this isn't correct either.

No functional change.

Fixes: 9e004f9716 ("remoteproc: qcom: Rename Hexagon v5 PAS driver")
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Wasim Nazir <quic_wasimn@quicinc.com>
Link: https://lore.kernel.org/r/20250605-pas-rename-v2-1-f1c89e49e691@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10 22:03:47 -05:00
Eric Biggers
40a98e702b crypto: hkdf - move to late_initcall
The HKDF self-tests depend on the HMAC algorithms being registered.
HMAC is now registered at module_init, which put it at the same level as
HKDF.  Move HKDF to late_initcall so that it runs afterwards.

Fixes: ef93f15628 ("Revert "crypto: run initcalls for generic implementations earlier"")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-06-11 10:59:45 +08:00
Al Viro
fcb1e72060 split d_flags calculation out of d_set_d_op()
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:24:39 -04:00
Al Viro
05fb0e6664 new helper: set_default_d_op()
... to be used instead of manually assigning to ->s_d_op.
All in-tree filesystem converted (and field itself is renamed,
so any out-of-tree ones in need of conversion will be caught
by compiler).

Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:21:16 -04:00
Al Viro
4bd9f3fd87 fuse: no need for special dentry_operations for root dentry
->d_revalidate() is never called for root anyway...

Reviewed-by: Christian Brauner <brauner@kernel.org>
Acked-by: Miklos Szeredi <mszeredi@redhat.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:15:18 -04:00
Al Viro
ec169ef86b switch procfs from d_set_d_op() to d_splice_alias_ops()
Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:13:52 -04:00
Tomasz Michalec
8866f4e557 platform/chrome: cros_ec_typec: Defer probe on missing EC parent
If cros_typec_probe is called before EC device is registered,
cros_typec_probe will fail. It may happen when cros-ec-typec.ko is
loaded before EC bus layer module (e.g. cros_ec_lpcs.ko,
cros_ec_spi.ko).

Return -EPROBE_DEFER when cros_typec_probe doesn't get EC device, so
the probe function can be called again after EC device is registered.

Signed-off-by: Tomasz Michalec <tmichalec@google.com>
Reviewed-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Link: https://lore.kernel.org/r/20250610153748.1858519-1-tmichalec@google.com
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2025-06-11 02:12:53 +00:00
Al Viro
790fa81b8c new helper: d_splice_alias_ops()
Uses of d_set_d_op() on live dentry can be very dangerous; it is going
to be withdrawn and replaced with saner things.

The best way for a filesystem is to have the default dentry_operations
set at mount time and be done with that - __d_alloc() will use that.

Currently there are two cases when d_set_d_op() is used on a live dentry -
one is procfs, which has several genuinely different dentry_operations
instances (different ->d_revalidate(), etc.) and another is
simple_lookup(), where we would be better off without overriding ->d_op.

For procfs we have d_set_d_op() calls followed by d_splice_alias();
provide a new helper (d_splice_alias_ops(inode, dentry, d_ops)) that would
combine those two, and do the d_set_d_op() part while under ->d_lock.
That eliminates one of the places where ->d_flags had been modified
without holding ->d_lock; current behaviour is not racy, but the reasons
for that are far too brittle.  Better move to uniform locking rules and
simpler proof of correctness...

The next commit will convert procfs to use of that helper; it is not
exported and won't be until somebody comes up with convincing modular
user for it.

Again, the best approach is to have default ->d_op and let __d_alloc()
do the right thing; filesystem _may_ need non-uniform ->d_op (procfs
does), but there'd better be good reasons for that.

Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:11:39 -04:00
Al Viro
5943c611c4 procfs: kill ->proc_dops
It has two possible values - one for "forced lookup" entries, another
for the normal ones.  We'd be better off with that as an explicit
flag anyway and in addition to that it opens some fun possibilities
with ->d_op and ->d_flags handling.

[moved PROC_ENTRY_FORCE_LOOKUP to include/linux/proc_fs.h, switched it
to an unused bit - there was a conflict]

Reviewed-by: Christian Brauner <brauner@kernel.org>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2025-06-10 22:08:05 -04:00
Charles Mirabile
8d90d9872e
riscv: fix runtime constant support for nommu kernels
the `__runtime_fixup_32` function does not handle the case where `val` is
zero correctly (as might occur when patching a nommu kernel and referring
to a physical address below the 4GiB boundary whose upper 32 bits are all
zero) because nothing in the existing logic prevents the code from taking
the `else` branch of both nop-checks and emitting two `nop` instructions.

This leaves random garbage in the register that is supposed to receive the
upper 32 bits of the pointer instead of zero that when combined with the
value for the lower 32 bits yields an invalid pointer and causes a kernel
panic when that pointer is eventually accessed.

The author clearly considered the fact that if the `lui` is converted into
a `nop` that the second instruction needs to be adjusted to become an `li`
instead of an `addi`, hence introducing the `addi_insn_mask` variable, but
didn't follow that logic through fully to the case where the `else` branch
executes. To fix it just adjust the logic to ensure that the second `else`
branch is not taken if the first instruction will be patched to a `nop`.

Fixes: a44fb57221 ("riscv: Add runtime constant support")

Signed-off-by: Charles Mirabile <cmirabil@redhat.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
Link: https://lore.kernel.org/r/20250530211422.784415-2-cmirabil@redhat.com
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
2025-06-10 18:19:33 -07:00
Lorenzo Bianconi
f478d68b65 net: airoha: Enable RX queues 16-31
Fix RX_DONE_INT_MASK definition in order to enable RX queues 16-31.

Fixes: f252493e18 ("net: airoha: Enable multiple IRQ lines support in airoha_eth driver.")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20250609-aioha-fix-rx-queue-mask-v1-1-f33706a06fa2@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-10 17:58:26 -07:00
Lorenzo Bianconi
0097c4195b net: airoha: Add PPPoE offload support
Introduce flowtable hw acceleration for PPPoE traffic.

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20250609-b4-airoha-flowtable-pppoe-v1-1-1520fa7711b4@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-10 17:57:14 -07:00