Commit graph

932,869 commits

Author SHA1 Message Date
Colin Ian King
bb6abdd453 scsi: qla2xxx: remove redundant null check on pointer sess
The null check on pointer sess and the subsequent call is redundant as sess
is null on all the the paths that lead to the out_term2 label.  Hence the
null check and the call can be removed.  Also remove the redundant setting
of sess to NULL as this is not required now.

Detected by CoverityScan, CID#1420663 ("Logically dead code")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Himanshu Madhani <hmadhani@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19 18:58:35 -05:00
Bill Kuzeja
f233e8c000 scsi: qla2xxx: Move debug messages before sending srb preventing panic
When sending an srb with qla2x00_start_sp, the sp can complete and be freed
by the time we log the debug message saying we sent it. This can cause a
panic if sp gets reused quickly or when running a kernel that poisons freed
memory.

This was partially fixed by (not every case was addressed):

Commit 9fe278f44b ("scsi: qla2xxx: Move log messages before issuing
command to firmware")

Signed-off-by: Bill Kuzeja <william.kuzeja@stratus.com>
Acked-by: Himanshu Madhani <hmadhani@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19 18:58:34 -05:00
YueHaibing
59e54d9aab scsi: lpfc: Remove set but not used variable 'phys_id'
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/scsi/lpfc/lpfc_init.c: In function 'lpfc_cpu_affinity_check':
drivers/scsi/lpfc/lpfc_init.c:10599:19: warning:
 variable 'phys_id' set but not used [-Wunused-but-set-variable]

It never used since introduction in commit 6a828b0f61 ("scsi: lpfc:
Support non-uniform allocation of MSIX vectors to hardware queues")

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: James Smart <james.smart@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19 18:58:34 -05:00
Manivannan Sadhasivam
653fcb07d9 scsi: ufs: Add HI3670 SoC UFS driver support
Add HI3670 SoC UFS driver support by extending the common ufs-hisi
driver. One major difference between HI3660 ad HI3670 SoCs interms of UFS
is the PHY. HI3670 has a 10nm variant PHY and hence this parameter is used
to distinguish the configuration.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Wei Li <liwei213@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19 18:58:34 -05:00
Manivannan Sadhasivam
cc8ed1a9d6 scsi: dt-bindings: ufs: Add HI3670 UFS controller binding
Add devicetree binding for HI3670 UFS controller. HI3760 SoC is very
similar to HI3660 SoC with almost same IPs. Only major difference in terms
of UFS is the PHY. HI3670 has 10nm PHY. But since the original driver
(HI3660 UFS) cannot make HI3670 UFS functional, a separate compatible
is added for HI3670 without any fallback.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Wei Li <liwei213@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-02-19 18:58:34 -05:00
Nicolas Ferre
655ab0bc46 power: reset: at91-reset: add support for sam9x60 SoC
Add support for additional reset causes and the proper compatibility
string for sam9x60 SoC. The restart function is the same as the samx7.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:41:01 +01:00
Nicolas Ferre
e03423c453 dt-bindings: arm: atmel: add new sam9x60 reset controller binding
Update the Reset Controller's binding to add new SoC compatibility string.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:40:25 +01:00
Nicolas Ferre
6a88b285d5 dt-bindings: arm: atmel: add missing samx7 to reset controller
Add this missing compatibility string to the Reset Controller
compatible string chip list.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:39:54 +01:00
Sven Van Asbroeck
bf592c56b1 max17042_battery: fix potential use-after-free on device remove
The work which is scheduled on a POR boot is potentially left
pending or running until after the device module is removed,
which could result in a use-after-free.

Fix by registering a cancel/sync callback, which gets executed as
part of standard resource unwinding.

This issue was detected with the help of Coccinelle.

Signed-off-by: Sven Van Asbroeck <TheSven73@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:36:52 +01:00
Artur Rojek
04fb53101e power: supply: core: Add a field to support battery max voltage
Add a field for "voltage_max_design_uv" to present fully charged
battery voltage.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:33:08 +01:00
Artur Rojek
5ddfed2bff dt-bindings: power: supply: Add voltage-max-design-microvolt property
Add documentation for the "voltage-max-design-microvolt" property.

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:32:47 +01:00
Arthur Demchenkov
9b2c945f9f bq27x00: use cached flags
The flags were just read by bq27xxx_battery_update(),
no need to read them again.

Signed-off-by: Arthur Demchenkov <spinal.by@gmail.com>
Reviewed-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2019-02-20 00:26:38 +01:00
Ben Skeggs
a788ade4f6 drm/nouveau/dmem: use dma addresses during migration copies
Removes the need for temporary VMM mappings.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:03 +10:00
Ben Skeggs
fd5e985643 drm/nouveau/dmem: use physical vram addresses during migration copies
Removes the need for temporary VMM mappings.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:03 +10:00
Ben Skeggs
6c762d1b18 drm/nouveau/dmem: extend copy function to allow direct use of physical addresses
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:03 +10:00
Jérôme Glisse
f180bf12ac drm/nouveau/svm: new ioctl to migrate process memory to GPU memory
This add an ioctl to migrate a range of process address space to the
device memory. On platform without cache coherent bus (x86, ARM, ...)
this means that CPU can not access that range directly, instead CPU
will fault which will migrate the memory back to system memory.

This is behind a staging flag so that we can evolve the API.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2019-02-20 09:00:03 +10:00
Jérôme Glisse
5be73b6908 drm/nouveau/dmem: device memory helpers for SVM
Device memory can be use in SVM, in which case we do not have any of
the existing buffer object. This commit add infrastructure to allow
use of device memory without nouveau_bo. Again this is a temporary
solution until a rework of GPU memory management.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2019-02-20 09:00:02 +10:00
Ben Skeggs
eeaf06ac1a drm/nouveau/svm: initial support for shared virtual memory
This uses HMM to mirror a process' CPU page tables into a channel's page
tables, and keep them synchronised so that both the CPU and GPU are able
to access the same memory at the same virtual address.

While this code also supports Volta/Turing, it's only enabled for Pascal
GPUs currently due to channel recovery being unreliable right now on the
later GPUs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:02 +10:00
Ben Skeggs
bfe91afaca drm/nouveau: prepare for enabling svm with existing userspace interfaces
For a channel to make use of SVM features, it requires a different GPU MMU
configuration than we would normally use, which is not desirable to switch
to unless a client is actively going to use SVM.

In order to supporting SVM without more extensive changes to the userspace
interfaces, the SVM_INIT ioctl needs to replace the previous configuration
safely.

The only way we can currently do this safely, accounting for some unlikely
failure conditions, is to allocate the new VMM without destroying the last
one, and prioritising the SVM-enabled configuration in the code that cares.

This will get cleaned up again further down the track.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:01 +10:00
Ben Skeggs
a261a20c01 drm/nouveau/fault/gv100-: expose VoltaFaultBufferA
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:01 +10:00
Ben Skeggs
13e9572906 drm/nouveau/fault/gp100: expose MaxwellFaultBufferA
This nvclass exposes the replayable fault buffer, which will be used
by SVM to manage GPU page faults.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
ab2ee9ffa3 drm/nouveau/mmu/gp100-: support vmms with gcc/tex replayable faults enabled
Some GPU units are capable of supporting "replayable" page faults, where
the execution unit will wait for SW to fixup GPU page tables rather than
triggering a channel-fatal fault.

This feature isn't useful (it's harmful, even) unless something like HMM
is being used to manage events appearing in the replayable fault buffer,
so, it's disabled by default.

This commit allows a client to request it be enabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
71871aa6df drm/nouveau/mmu/gp100-: add privileged methods for fault replay/cancel
Host methods exist to do at least some of what we need, but we are not
currently pushing replay/cancels through a channel like UVM does as it's
not clear whether it's necessary in our case (UVM also updates PTEs with
the GPU).

UVM also pushes a software method for fault cancels on Pascal, seemingly
because the host methods don't appear to be sufficient.  If/when we want
to push the replay/cancel on the GPU, we can re-purpose the cancellation
code here to implement that swmthd.

Keep it simple for now, until we figure out exactly what we need here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
a5ff307fe1 drm/nouveau/mmu: add a privileged method to directly manage PTEs
This provides a somewhat more direct method of manipulating the GPU page
tables, which will be required to support SVM.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
8e68271d7c drm/nouveau/mmu: store mapped flag separately from memory pointer
This will be used to support a privileged client providing PTEs directly,
without a memory object to use as a reference.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
2606f29162 drm/nouveau/mmu: support initialisation of client-managed address-spaces
NVKM is currently responsible for managing the allocation of a client's
GPU address-space, but there's various use-cases (ie. HMM address-space
mirroring) where giving a client more direct control is desirable.

This commit allows for a VMM to be created where the area allocated for
NVKM is limited to a client-specified window, the remainder of address-
space is controlled directly by the client.

Leaving a window is necessary to support various internal requirements,
but also to support existing allocation interfaces as not all of the HW
is capable of working with a HMM allocation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
ae5ea7f6a8 drm/nouveau/gr/gf100-: expose method to determine current context
MMU will need access to this info.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
169f30b35d drm/nouveau/gr/gf100-: expose fecs methods for pausing ctxsw
MMU will need access to these.

v2. Apply fix from Rhys Kidd to send correct FECS method for STOP_CTXSW.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Colin Ian King
8e083686ec drm/nouveau/falcon: fix a few indentation issues
There are a few statements that are indented incorrectly. Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
d389fd4fa9 drm/nouveau/mmu/gf100-: virtualise setting pdb base address for invalidation
It appears that Pascal and newer need something different.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
874c1b56f3 drm/nouveau/mmu/gf100-: make mmu invalidate function more general
Will want to reuse this for fault replay/cancellation swmthds.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
8e44b987e8 drm/nouveau/gr/gf100-: store fecs/gpccs falcon pointers in substructures
Future changes will want to add some additional things here, keep them
grouped together.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
b7f713b8d3 drm/nouveau/gr/gf100-: move fecs bind_pointer into a function
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
8c7db76844 drm/nouveau/gr/gf100-: remove some unnecessary reg writes
This is already done during golden context creation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
7d51bc85d7 drm/nouveau/gr/gf100-: move fecs elpg setup into functions
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
8bf2d348bd drm/nouveau/gr/gf100-: move fecs discover_pm_image_size into a function
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 09:00:00 +10:00
Ben Skeggs
7d3f06881d drm/nouveau/gr/gf100-: move fecs discover_zcull_image_size into a function
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
0b89ca0dc3 drm/nouveau/gr/gf100-: move fecs discover_image_size into a function
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
eb383e629c drm/nouveau/gr/gf100-: move fecs set_watchdog_timeout method into a function
Makes the code somewhat less magic.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
f0eee9aec0 drm/nouveau: allow accelerated buffer moves even when gr isn't present
There's no need to avoid using copy engines if gr init fails for some
reason (usually missing FW, or incomplete bring-up).

It's not terribly useful for an end-user, but it'll slightly speed up
suspend/resume when saving fb contents, and allow for host/ce code to
be validated.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
0f9976dd97 drm/nouveau/kms/nv04-nv4x: move resume code to dispnv04 init hook
It has no relevance to the atomic path used by newer GPUs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
f04a4186af drm/nouveau/kms/nv04-nv4x: move suspend code to dispnv04 fini hook
It has no relevance to the atomic path used by newer GPUs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
fcd6f04838 drm/nouveau/kms/nv04-nv4x: move a bunch of pre-nv50 page flip code to dispnv04
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
ba801ef068 drm/nouveau/kms: display destroy/init/fini hooks can be static
Swapped order of functions in dispnv04 to allow this, but no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
d7f9bb656e drm/nouveau: allocate kernel channel(s) before initialising display
Some of the pre-NV50 depends on SW methods to implement synchronisation
for page flips, and we want to move this setup out of common code, thus
we require the channel to have been allocation before display init.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
a8ce8b65e1 drm/nouveau/disp/gf119-: decode exception reason to human-readable string
We also change the error strings to match NVIDIA's naming.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
eb972d1474 drm/nouveau/bios/init: handle INIT_GENERIC_CONDITION_ID_NO_PANEL_SEQ_DELAYS
As I currently understand it, this is related to features we have no
support for as of yet.

In theory, this change should be a noop, just without the warning.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
81f2bb5d65 drm/nouveau/bios/init: label existing INIT_GENERIC_CONDITION types
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
c774ce66c5 drm/nouveau/secboot: fix missing newline in error messages
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00
Ben Skeggs
8d2c1e3376 drm/nouveau/sec2/tu102-: instantiate SEC2 falcon
Required for ACR.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:59 +10:00