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1,188,286 commits

Author SHA1 Message Date
Jean Delvare
11e87890da
ASoC: SOF: Drop obsolete dependency on COMPILE_TEST
Since commit 0166dc11be ("of: make CONFIG_OF user selectable"), it
is possible to test-build any driver which depends on OF on any
architecture by explicitly selecting OF. Therefore depending on
COMPILE_TEST as an alternative is no longer needed.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/r/20221127193549.211bf8f7@endymion.delvare
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:35 +00:00
Pavel Dobias
082d3c998c
ASoC: max9867: Implement exact integer mode
For 8kHz and 16kHz sample rates and certain PCLK values
the codec can be programmed to operate in exact integer
mode. If available, use it to achieve the exact sample rate.

Signed-off-by: Pavel Dobias <dobias@2n.com>
Link: https://lore.kernel.org/r/20221123153818.24650-1-dobias@2n.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:34 +00:00
Kuninori Morimoto
7aa6d95d7f
ASoC: rsnd: adg: use __clk_get_name() instead of local clk_name[]
Current rsnd_adg_clk_dbg_info() is using locak clk_name[] to ndicating
clk name, but we don't want to use local clk_name[] everywhere when we
support R-Car Gen4 sound to handling non compatible clk naming.

This patch uses __clk_get_name() instead of local clk_name[] for it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87v8mz8wcs.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:33 +00:00
Charles Keepax
c5f81301d0
ASoC: sdw-mockup: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-9-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:32 +00:00
Charles Keepax
99ae8cf0a0
ASoC: rt715: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-8-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:31 +00:00
Charles Keepax
754bef6752
ASoC: rt711: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-7-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:30 +00:00
Charles Keepax
ae7ad90e7c
ASoC: rt700: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-6-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:29 +00:00
Charles Keepax
5b75bc7fc2
ASoC: rt5682-sdw: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-5-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:28 +00:00
Charles Keepax
0725dd0461
ASoC: rt1316-sdw: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-4-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:27 +00:00
Charles Keepax
896c59edcd
ASoC: rt1308-sdw: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-3-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:26 +00:00
Charles Keepax
d12f106177
ASoC: max98373-sdw: Switch to new snd_sdw_params_to_config helper
The conversion from hw_params to SoundWire config is pretty
standard as such most of the conversion can be handled by the new
snd_sdw_params_to_config helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-2-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:25 +00:00
Charles Keepax
e45875168d
sound: sdw: Add hw_params to SoundWire config helper function
The vast majority of the current users of the SoundWire framework
have almost identical code for converting from hw_params to SoundWire
configuration. Whilst complex devices might require more, it is very
likely that most new devices will follow the same pattern. Save a
little code by factoring this out into a helper function.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221123165432.594972-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:24 +00:00
Jean Delvare
d695d089e3
ASoC: rsnd: Drop obsolete dependency on COMPILE_TEST
Since commit 0166dc11be ("of: make CONFIG_OF user selectable"), it
is possible to test-build any driver which depends on OF on any
architecture by explicitly selecting OF. Therefore depending on
COMPILE_TEST as an alternative is no longer needed.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Link: https://lore.kernel.org/r/20221127193441.0b54484d@endymion.delvare
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:23 +00:00
V sujith kumar Reddy
9fd3b5b11d
ASoC: SOF: amd: ADD HS and SP virtual DAI.
ADD HS and SP virtual DAI driver to support AMD platforms.

Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20221123121911.3446224-4-vsujithkumar.reddy@amd.corp-partner.google.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:22 +00:00
V sujith kumar Reddy
f9ced7dbbb
ASoC: SOF: amd: Fix for selecting clock source as external clock.
By default clock source is selected as internal clock of 96Mhz
which is not configurable. Now we select the clock source to
external clock (ACLK) which can be configurable to different clock
ranges depending on usecase.

Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20221123121911.3446224-3-vsujithkumar.reddy@amd.corp-partner.google.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:21 +00:00
V sujith kumar Reddy
aae7e412b0
ASoC: SOF: amd: Fix for reading position updates from stream box.
By default the position updates are read from dsp box when streambox
size is not defined.if the streambox size is defined to some value
then position updates can be read from the streambox.

Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Link: https://lore.kernel.org/r/20221123121911.3446224-2-vsujithkumar.reddy@amd.corp-partner.google.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:04:20 +00:00
Krzysztof Kozlowski
b386acc043
ASoC: dt-bindings: qcom,q6apm: Add SM8450 bedais node
On SM8450 and SC8280XP, the Q6APM is a bit different:
1. It is used as a platform DAI link, so it needs #sound-dai-cells.
2. It has two DAI children, so add new "bedais" node.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-12-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:36 +00:00
Krzysztof Kozlowski
8c7ac82548
ASoC: dt-bindings: qcom,q6apm-lpass-dais: Split to separate schema
The Qualcomm DSP LPASS Audio DAIs are a bit different than Qualcomm DSP
Audio FrontEnd (Q6AFE) DAIs - they do not use children nodes for each
DAI.  None of other properties from qcom,q6dsp-lpass-ports.yaml apply
here as well, so move the qcom,q6apm-lpass-dais compatible to its own
binding.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-11-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:35 +00:00
Krzysztof Kozlowski
7eea2bed36
ASoC: dt-bindings: qcom,q6core: Split to separate schema
The APR/GPR bindings with services got complicated so move out the
Q6Core service to its own binding.  Previously the compatible was
documented in qcom,apr.yaml.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:34 +00:00
Krzysztof Kozlowski
8009abe0f1
ASoC: dt-bindings: qcom,q6prm: Split to separate schema
The APR/GPR bindings with services got complicated so move out the Q6PRM
service to its own binding.  Previously the compatible was documented in
qcom,apr.yaml.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-9-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:33 +00:00
Krzysztof Kozlowski
83c8fa5e85
ASoC: dt-bindings: qcom,q6asm: Split to separate schema
The APR/GPR bindings with services got complicated so move out the Q6ASM
service to its own binding.  Previously the compatible was documented in
qcom,apr.yaml.  Move most of the examples from its children to this new
file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-8-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:32 +00:00
Krzysztof Kozlowski
f26a776ea5
ASoC: dt-bindings: qcom,q6adm: Split to separate schema
The APR/GPR bindings with services got complicated so move out the Q6ADM
service to its own binding.  Previously the compatible was documented in
qcom,apr.yaml.  Move most of the examples from its children to this new
file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:31 +00:00
Krzysztof Kozlowski
6180b32520
ASoC: dt-bindings: qcom,q6apm: Split to separate schema
The APR/GPR bindings with services got complicated so move out the Q6APM
service to its own binding.  Previously the compatible was documented in
qcom,apr.yaml.  Move most of the examples from its children to this new
file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:30 +00:00
Krzysztof Kozlowski
3e9c0c8626
ASoC: dt-bindings: qcom,q6afe: Split to separate schema
The APR/GPR bindings with services got complicated so move out the Q6AFE
service to its own binding.  Previously the compatible was documented in
qcom,apr.yaml.  Move most of the examples from its children to this new
file.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:29 +00:00
Krzysztof Kozlowski
cd9ba3d065
ASoC: dt-bindings: qcom,apr: Correct and extend example
Correct the APR/GPR example:
1. Use consistent 4-space indentation,
2. Add required properties to services nodes, so the binding check
   passes once schema for these services is improved,
3. Add few other properties as APR/GPR is part of a GLINK edge:
   qcom,glink-channels and qcom,intents.
4. Drop unnecessary services, to make the example compact.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:27 +00:00
Krzysztof Kozlowski
41288c3058
ASoC: dt-bindings: qcom,apr: Split services to shared schema
The APR/GPR nodes are organized like:

  apr-or-gpr-device-node <- qcom,apr.yaml
    apr-gpr-service@[0-9] <- qcom,apr.yaml
      service-specific-components <- /schemas/sound/qcom,q6*.yaml

The schema for services (apr-gpr-service@[0-9]) already grows
considerably and is still quite not specific.  It allows several
incorrect combinations, like adding a clock-controller to a APM device.
Restricting it would complicate the schema even more.  Bringing new
support for sound on Qualcomm SM8450 and SC8280XP SoC would grow it as
well.

Simplify the qcom,apr.yaml by splitting the services to a shared file
which will be:
1. Referenced by qcom,apr.yaml with additionalProperties:true,
2. Referenced by specific bindings for services with
   additionalProperties:false (not yet in this commit).

While moving the code, add also required 'reg' and
'qcom,protection-domain' to further constrain the bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:26 +00:00
Krzysztof Kozlowski
0dd3618e06
ASoC: dt-bindings: qcom,apr: Add GLINK channel name for SM8450
On SM8450 and SC8280XP with Qualcomm GPR, the GLINK channel name
(qcom,glink-channels) for ADSP is "adsp_apps".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221115120235.167812-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-11-28 13:02:25 +00:00
Li Huafei
0c76ef3f26 kprobes: Fix check for probe enabled in kill_kprobe()
In kill_kprobe(), the check whether disarm_kprobe_ftrace() needs to be
called always fails. This is because before that we set the
KPROBE_FLAG_GONE flag for kprobe so that "!kprobe_disabled(p)" is always
false.

The disarm_kprobe_ftrace() call introduced by commit:

  0cb2f1372b ("kprobes: Fix NULL pointer dereference at kprobe_ftrace_handler")

to fix the NULL pointer reference problem. When the probe is enabled, if
we do not disarm it, this problem still exists.

Fix it by putting the probe enabled check before setting the
KPROBE_FLAG_GONE flag.

Link: https://lore.kernel.org/all/20221126114316.201857-1-lihuafei1@huawei.com/

Fixes: 3031313eb3 ("kprobes: Fix to check probe enabled before disarm_kprobe_ftrace()")
Signed-off-by: Li Huafei <lihuafei1@huawei.com>
Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
2022-11-28 21:20:47 +09:00
Xin Long
a81047154e netfilter: flowtable_offload: fix using __this_cpu_add in preemptible
flow_offload_queue_work() can be called in workqueue without
bh disabled, like the call trace showed in my act_ct testing,
calling NF_FLOW_TABLE_STAT_INC() there would cause a call
trace:

  BUG: using __this_cpu_add() in preemptible [00000000] code: kworker/u4:0/138560
  caller is flow_offload_queue_work+0xec/0x1b0 [nf_flow_table]
  Workqueue: act_ct_workqueue tcf_ct_flow_table_cleanup_work [act_ct]
  Call Trace:
   <TASK>
   dump_stack_lvl+0x33/0x46
   check_preemption_disabled+0xc3/0xf0
   flow_offload_queue_work+0xec/0x1b0 [nf_flow_table]
   nf_flow_table_iterate+0x138/0x170 [nf_flow_table]
   nf_flow_table_free+0x140/0x1a0 [nf_flow_table]
   tcf_ct_flow_table_cleanup_work+0x2f/0x2b0 [act_ct]
   process_one_work+0x6a3/0x1030
   worker_thread+0x8a/0xdf0

This patch fixes it by using NF_FLOW_TABLE_STAT_INC_ATOMIC()
instead in flow_offload_queue_work().

Note that for FLOW_CLS_REPLACE branch in flow_offload_queue_work(),
it may not be called in preemptible path, but it's good to use
NF_FLOW_TABLE_STAT_INC_ATOMIC() for all cases in
flow_offload_queue_work().

Fixes: b038177636 ("netfilter: nf_flow_table: count pending offload workqueue tasks")
Signed-off-by: Xin Long <lucien.xin@gmail.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-11-28 13:17:56 +01:00
Stefano Brivio
97d4d394b5 netfilter: nft_set_pipapo: Actually validate intervals in fields after the first one
Embarrassingly, nft_pipapo_insert() checked for interval validity in
the first field only.

The start_p and end_p pointers were reset to key data from the first
field at every iteration of the loop which was supposed to go over
the set fields.

Fixes: 3c4287f620 ("nf_tables: Add set type for arbitrary concatenation of ranges")
Reported-by: Pablo Neira Ayuso <pablo@netfilter.org>
Signed-off-by: Stefano Brivio <sbrivio@redhat.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
2022-11-28 13:17:11 +01:00
Zhen Lei
21d0798acf ARM: 9276/1: Refactor dump_instr()
1. Rename local variable 'val16' to 'tmp'. So that the processing
   statements of thumb and arm can be aligned.
2. Fix two sparse check warnings: (add __user for type conversion)
   warning: incorrect type in initializer (different address spaces)
      expected unsigned short [noderef] __user *register __p
      got unsigned short [usertype] *
3. Prepare for the next patch to avoid repeated judgment.
   Before:
   if (!user_mode(regs)) {
           if (thumb)
           else
   } else {
           if (thumb)
           else
   }

   After:
   if (thumb) {
           if (user_mode(regs))
           else
   } else {
           if (user_mode(regs))
           else
   }

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:36 +00:00
Nathan Chancellor
59e2cf8d21 ARM: 9275/1: Drop '-mthumb' from AFLAGS_ISA
When building with CONFIG_THUMB2_KERNEL=y + a version of clang from
Debian using CROSS_COMPILE=arm-linux-gnueabihf-, the following warning
occurs frequently:

  <built-in>:383:9: warning: '__thumb2__' macro redefined [-Wmacro-redefined]
  #define __thumb2__ 2
          ^
  <built-in>:353:9: note: previous definition is here
  #define __thumb2__ 1
          ^
  1 warning generated.

Debian carries a downstream patch that changes the default CPU of the
arm-linux-gnueabihf target from 'arm1176jzf-s' (v6) to 'cortex-a7' (v7).
As a result, '-mthumb' defines both '__thumb__' and '__thumb2__'. The
define of '__thumb2__' via the command line was purposefully added to
catch a situation like this.

In a similar vein as commit 26b12e084b ("ARM: 9264/1: only use
-mtp=cp15 for the compiler"), do not add '-mthumb' to AFLAGS_ISA, as it
is already passed to the assembler via '-Wa,-mthumb' and '__thumb2__' is
already defined for preprocessing.

Link: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/raw/622dbcbd40b316ed3905a2d25d9623544a06e6b1/debian/patches/930008-arm.diff

Fixes: 1d2e9b67b0 ("ARM: 9265/1: pass -march= only to compiler")
Reported-by: "kernelci.org bot" <bot@kernelci.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:36 +00:00
Amit Daniel Kachhap
fea53546be ARM: 9274/1: Add hwcap for Speculative Store Bypassing Safe
Speculative Store Bypassing Safe(FEAT_SSBS) is a feature present in
AArch32 state for Armv8 and is represented by ID_PFR2_EL1.SSBS
identification register.

This feature denotes the presence of PSTATE.ssbs bit and hence adding a
hwcap will enable the userspace to check it before trying to set/unset
this PSTATE.

This commit adds the ID feature bit detection, and uses elf_hwcap2
accordingly.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:35 +00:00
Amit Daniel Kachhap
3bda6d8848 ARM: 9273/1: Add hwcap for Speculation Barrier(SB)
Speculation Barrier(FEAT_SB) is a feature present in AArch32 state for
Armv8 and is represented by ISAR6.SB identification register.

This feature denotes the presence of SB instruction and hence adding a
hwcap will enable the userspace to check it before trying to use this
instruction.

This commit adds the ID feature bit detection, and uses elf_hwcap2
accordingly.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:35 +00:00
Amit Daniel Kachhap
956ca3a4eb ARM: 9272/1: vfp: Add hwcap for FEAT_AA32I8MM
Int8 matrix multiplication (FEAT_AA32I8MM) is a feature present in AArch32 state for Armv8 and is represented by ISAR6.I8MM identification register.

This feature denotes the presence of VSMMLA, VSUDOT, VUMMLA, VUSMMLA and
VUSDOT instructions and hence adding a hwcap will enable the userspace
to check it before trying to use those instructions.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:34 +00:00
Amit Daniel Kachhap
23b6d4ad6e ARM: 9271/1: vfp: Add hwcap for FEAT_AA32BF16
Advanced SIMD BFloat16 (FEAT_AA32BF16) is a feature present in AArch32
state for Armv8 and is represented by ISAR6.BF16 identification
register.

This feature denotes the presence of VCVT, VCVTB, VCVTT, VDOT, VFMAB,
VFMAT and VMMLA instructions and hence adding a hwcap will enable the
userspace to check it before trying to use those instructions.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:33 +00:00
Amit Daniel Kachhap
ce4835497c ARM: 9270/1: vfp: Add hwcap for FEAT_FHM
Floating-point half-precision multiplication (FHM) is a feature present
in AArch32 state for Armv8 and is represented by ISAR6.FHM identification register.

This feature denotes the presence of VFMAL and VMFSL instructions and
hence adding a hwcap will enable the userspace to check it before
trying to use those instructions.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:33 +00:00
Amit Daniel Kachhap
62ea0d873a ARM: 9269/1: vfp: Add hwcap for FEAT_DotProd
Advanced Dot product is a feature present in AArch32 state for Armv8 and
is represented by ISAR6 identification register.

This feature denotes the presence of UDOT and SDOT instructions and hence adding a hwcap will enable the userspace to check it before trying to use those instructions.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:32 +00:00
Amit Daniel Kachhap
c00a19c8b1 ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16
Floating point half-precision (FPHP) and Advanced SIMD half-precision
(ASIMDHP) are VFP features (FEAT_FP16) represented by MVFR1 identification register. These capabilities can optionally exist with VFPv3 and mandatory with VFPv4. Both these new features exist for Armv8 architecture in AArch32 state.

These hwcaps may be useful for the userspace to add conditional check
before trying to use FEAT_FP16 feature specific instructions.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:32 +00:00
Amit Daniel Kachhap
74c344e6f1 ARM: 9267/1: Define Armv8 registers in AArch32 state
AArch32 Instruction Set Attribute Register 6 (ID_ISAR6_EL1) and AArch32
Processor Feature Register 2 (ID_PFR2_EL1) identifies some new features
for the Armv8 architecture. This registers will be utilized to add
hwcaps for those cpu features.

These registers are marked as reserved for Armv7 and should be a RAZ.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-28 11:57:31 +00:00
Rob Herring
83fb5b55cd arm64: dts: apple: Add t600x L1/L2 cache properties and nodes
The t600x CPU nodes are missing the cache hierarchy information. The
cache hierarchy on Arm can not be detected and needs to be described in
DT. The OS scheduler can make use of this information for scheduling
decisions.

The cache size information is based on various articles about the
processors. There's also an L3 system level cache (SLC). It's not
described here because SLCs typically have some MMIO interface which
would need to be described.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-11-28 20:51:11 +09:00
Marc Zyngier
63ab33c08c Merge branch irq/loongarch-acpi into irq/irqchip-next
* irq/loongarch-acpi:
  : .
  : More APCI fixes and improvements for the LoongArch architecture:
  :
  : - Work around trigger type for INTx interrupts described
  :   via ACPI (Jianmin Lv).
  :
  : - ACPI support got the HTVEC controller (Huacai Chen)
  :
  : - Suspend/resume across the board (Huacai Chen)
  :
  : - Fixes and random cleanups
  : .
  irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines
  irqchip/loongson-pch-lpc: Add suspend/resume support
  irqchip/loongson-pch-pic: Add suspend/resume support
  irqchip/loongson-eiointc: Add suspend/resume support
  irqchip/loongson-htvec: Add suspend/resume support
  irqchip/loongson-htvec: Add ACPI init support
  irqchip/loongson-liointc: Support to set IRQ type for ACPI path
  irqchip/loongson-pch-pic: Support to set IRQ type for ACPI path
  irqchip/loongson-pch-pic: Fix translate callback for DT path
  ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity

Signed-off-by: Marc Zyngier <maz@kernel.org>
2022-11-28 11:50:41 +00:00
Huacai Chen
3d12938dbc irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines
1, Adjust the return of acpi_cascade_irqdomain_init() and check its
   return value.
2, Combine unnecessary short lines to one long line.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221020142514.1725514-1-chenhuacai@loongson.cn
2022-11-28 11:49:31 +00:00
AngeloGioacchino Del Regno
5c4e0aac0b irqchip/irq-mtk-cirq: Add support for System CIRQ on MT8192
On some SoCs the System CIRQ register layout is slightly different,
as there are more registers per function and in some cases other
differences later in the layout: this is seen on at least MT8192,
but it's also valid for some other "contemporary" SoCs both for
Chromebooks and for smartphones.

Add the new "v2" register layout and use it if the compatible
"mediatek,mt8192-cirq" is found.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221128092217.36552-5-angelogioacchino.delregno@collabora.com
2022-11-28 11:44:02 +00:00
AngeloGioacchino Del Regno
45ac01959e irqchip/irq-mtk-cirq: Move register offsets to const array
In preparation to add support for new SoCs having a different
register layout, add an enumeration that documents register
offsets and move the definitions for the same to a u32 array;

Selecting the right register offsets array is done by adding an
of_device_id array containing all of the currently supported
compatible strings pointing to the "v1" offsets array (as data):
since no devicetree declares the `mediatek,mtk-cirq` compatible
without a SoC-specific one, it wasn't necessary to provide any
legacy fallback.

Every usage of the aforemementioned definitions was changed to
get a register address through a newly introduced `mtk_cirq_reg()`
accessor.

This change brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221128092217.36552-4-angelogioacchino.delregno@collabora.com
2022-11-28 11:43:56 +00:00
Yuan Can
ea5ef136e2 RDMA/nldev: Add checks for nla_nest_start() in fill_stat_counter_qps()
As the nla_nest_start() may fail with NULL returned, the return value needs
to be checked.

Fixes: c4ffee7c9b ("RDMA/netlink: Implement counter dumpit calback")
Signed-off-by: Yuan Can <yuancan@huawei.com>
Link: https://lore.kernel.org/r/20221126043410.85632-1-yuancan@huawei.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
2022-11-28 13:43:51 +02:00
AngeloGioacchino Del Regno
85de640c6b dt-bindings: interrupt-controller: mediatek,cirq: Document MT8192
Add compatible to support the SYS_CIRQ controller found on MT8192.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221128092217.36552-3-angelogioacchino.delregno@collabora.com
2022-11-28 11:43:42 +00:00
AngeloGioacchino Del Regno
7f3974ef4e dt-bindings: interrupt-controller: mediatek,cirq: Migrate to dt schema
Migrate mediatek,cirq.txt to dt schema as mediatek,mtk-cirq.yaml.
While at it, I've also fixed some typos that were present in the
original txt binding, as it was suggesting that the compatible
string would have "mediatek,cirq" as compatible but, in reality,
that's supposed to be "mediatek,mtk-cirq" instead.

Little rewording on property descriptions also happened for
them to be more concise.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221128092217.36552-2-angelogioacchino.delregno@collabora.com
2022-11-28 11:43:42 +00:00
Sven Peter
5acf07ff25 soc: apple: rtkit: Stop casting function pointer signatures
Fixes: 9bd1d9a0d8 ("soc: apple: Add RTKit IPC library")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-11-28 20:34:09 +09:00
Sven Peter
422d0b860d soc: apple: sart: Stop casting function pointer signatures
Fixes: b170143ae1 ("soc: apple: Add SART driver")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-11-28 20:34:09 +09:00