- Add compatibles for i.MX8MP based SoM and carrier from ABB
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmd6TFoUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7JmAgApQZmi/iEzyy+WcUxDXyKoeP/jL5r
WQrWHDvAIeIrEvqR+eb34MSy1gDrThk0XceegHF3w0wxnutz1isueIV7GwT4RBYs
VDc3tcw3H+A3B86UdRgJ4k75ZavOYcMqy6KMQrdE4nUMcI0tegXFodpvDDiO8fSd
b8kb6hux38zxLrFIljUdfALH3FV8uEZtUIh1iYlBmuLvI8N+uQTpinYnwKXmKrAs
7gwgqIFVOmXyKjTCxdmvYqc8qjA+mOaR9wr0Bm49ceUS2hvptCR3KOPl5tnbc4qu
H8EDrao5axaaACKZn7D8jIBXkpYS9HBoVupOnowkDj8GeqQ6kNIMzkGNEQ==
=O9l8
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmeJDDUACgkQYKtH/8kJ
UifU9A/9G7DpY1mb7S6vdt1TeBbzq2oMA8kqDSh8tXskrVPl9VZ4ERnhdONVT0JN
WysTmjGGZQO5ZINo83Cgh+EBbRatFRL0gVMf1U7zBmbcenUqOn1Nx8T7/icKRHY5
N4hjVgYJ9iVOkBwwOBxk7mAsEpfmRno/mjlR1G7Tp4PXKiVWbhQCbU8Qz/IKiJzS
aXLnKpPLBSOtEiNnTd5c6kfMnW+R8AQv2tPfSkqeNz2T4P+SRGsKnmitWf7xtjOv
T7qiFTHHB0yxlaoalRVhyveVDc4CnIQN0ikFrSxFCeXDQ7B6W4XM/88aLAbPJo5r
sXuUc27kLOA4ncooBx97S/ZGT34eY2AKDT+yV6BeZoibn8qaIwaCuVJnlPyZmbXK
P9WQ6Q3ZU9ShuOpMmZ8lBxMjqxRXc7l8p31MCZs+TTSUkNOXRAinISQNN/MdGr7A
Bfu8mguRVvlM2zEEOQd98MPdP5hVAmruXEocSj+iAsQJWk7fQ7b2lIbCzWzmpyMZ
laTnkVmp+G8CDJaK/qG7MO20KLGyknoboWFXSki64X/e+4q46EX7Lm0L+t8igQU7
oKqqkBvELpwz30jcJwprFiWrdAo//0EkCTpkht/ai6yVOYgUilApMDqJZwcc3WAX
08PG3ZJ/+BfCQY6NMV4bCoGLK7CiZ0cDdWbbJbqmUUV33h2ccRY=
=xX5g
-----END PGP SIGNATURE-----
Merge tag 'imx-bindings-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt
i.MX dt-bindings change for 6.14:
- Add compatibles for i.MX8MP based SoM and carrier from ABB
* tag 'imx-bindings-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add ABB SoM and carrier
Link: https://lore.kernel.org/r/20250105095139.714590-2-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Marvell: Use un-deprecated hp-det-gpios (no ABI impact expected).
2. SoCFPGA: Drop spidev devices which are not properly described in DTS,
but are using some other compatibles. This was part of wider tree
effort to fix such incorrect hardware descriptions.
Important: Dropping this device node will have user-visible impact:
spidev device will not register.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmdz8LAQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD17zLD/9GhkPb2L2UKbNqnIBse11jfmjmXNCEMB8K
SihvQB+YSsRL6Y0Bmt6QsGYeeB3Rp93FL/XfuomWudulT+vn6aszY4HjUSLgXpQV
3PK9Y3lSgjuEpWCxb6g/1PqukzOf2NSLdlSCvbiIJm2ciyFcR2VZMZ5kc29qDXct
Lc6JFPWlI+JrH9JbOqoWkr21E4no9SYx/7XNJ4mWIMbpVtbGB1/W2YHbnMuT44vz
PMLe8amfSC1S5uSQWhvcICORJujVLpCxAm9GUbVi6Bv8o3ccmCq6Ow57/BBUx2wz
V5+8kZ9Yb3jglPvBYDocMPJPY1W8KzJXymYf23uCTiuVmhSrzGz38kzRcNjvBcLo
biO6Q2+/n/p/Uoiun8jMK7wuVyNjg6ZLqOlQS3M2iOB6OFUZX1iR00JcRUefEdNc
TZNShHstqV99Q2uEk6DMIhTu7TXn0VeelGzl324DImezyOKc8VXb3HrwQ1f3w+P6
W9G0w90hPjw8FkycwoyrHfXqrMXU8DFQUPZPvKJeu5wEUJppzTDUAHCxYypTCgPR
bj9s5zkARE9xFTVlBGPkiPfuFRngLhSvAnX7BGWQA2+jEfb3nkmqWLJJYyB4yMqC
WOj58fJv8mJYeKGm2RniwkRnJdoQ1a99F4/LpRH/e75Aby0Nbig4Rd3FZgVHeRNB
CvlXQDLpEw==
=9jUW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmeJC5oACgkQYKtH/8kJ
UidI8A/9EXciZNAoJV4sgbQxFG5rs3sdj9f/8oaZ6bIUYqijZynijtxs3oUxvOSG
NikjDut8mTapewuE413wbp9pk3r9Jpg5Fr01X/Cqwsb0hAzI00AJKAbDJqDPPa7w
YNUTL+VSo6c8wkgujgwD3JH3k6gKz6AuR1OXpn3KZZPLdQJNCZeTMvSZmNkIFdBc
IxU337/w4QuHB6f90QOoUyD2fCBwxWcmS1Jhj7FTLeDNSE5XPCx0o9woRcYdSehy
jEVFp6CIGGgYJSLIMhosm5+FpSQdqvFU5mf0t1n6qNNV7VzMjIxjg9wOxF+GYU0e
YsJ+HS04gjC2H1rB4DAu7RHnuugJZnctH4ZiYgELIPUMJCma2uIw2ERyoUpfp0Iz
uaRZyMuQnSNd4e2g2mN7UAe5gGIH0n165fVPzcE5wqwGnkUWPRMunGALPviUZfNC
HcheaeLdrNKCQEN2eL2kMtOJ8tKdeP8VwIJUx6t/2waGmI+1sMUBZiW4eT1lhGa+
oberAyj3lxoBmOXyX/KFa9IQC2UyYakj8fC7sBx72OcybqSUOOpdbnInNIlNx2xf
CDJjJ6NH7EkBM+7H+ImJ5lhKrAJgY/zI+u3hUcD/KJbDXdd5P1wLcEYfNh5M2NyE
D/hRv/ElhfGhNKk01woGtCUmGS/CO46rgPwQzGRPLpz3qPKZa/I=
=63gY
-----END PGP SIGNATURE-----
Merge tag 'dt-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.14
1. Marvell: Use un-deprecated hp-det-gpios (no ABI impact expected).
2. SoCFPGA: Drop spidev devices which are not properly described in DTS,
but are using some other compatibles. This was part of wider tree
effort to fix such incorrect hardware descriptions.
Important: Dropping this device node will have user-visible impact:
spidev device will not register.
* tag 'dt-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: socfpga: remove non-existent DAC from CycloneV devkit
ARM: dts: marvell: mmp2-olpc-xo-1-75: Switch to {hp,mic}-det-gpios
Link: https://lore.kernel.org/r/20241231132847.135814-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Spreadtrum:
- Correct few issues pointed out by DT schema around properties and
node names.
- Move fuel-gauge from DTSI to DTS, because it belongs to the board.
- Use undeprecated properties, like battery-detect-gpios, already
supported by Linux.
2. Uniphier: Use un-deprecated hp-det-gpios (no ABI impact expected).
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmdz8DcQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1x2OD/wKTRgxeiVafNc2rCXuAMskPYL64SXwzLFi
x+0hSHCFIuzyVdwDONFL6SlT82umqr2ngMZbY6718di6vnkTV06yrJAQIiMS0H7R
RM1giaZDhHaz+nySmZ6oPCmFjEApYxVed7RmuCyB4bvKsMf7zjqdLAohS7RIY08W
djCm4Ffhk7uFywioeGjjt1sdRP4jWputNAhfq4PZ/Q6ByuWs3gNTfDQ7WU7cjaKg
d/gP/+S6vGWdusXE2QmAADI+XMQ/ke4ktirq1uKE2jUAHYeBpob3DgM22WcQDebk
8DifY18zKbHx1ugnbw5PkNc0josXbM01x/TaBkSq2MFcM70KW2z63mJmFWiJnitF
U+jiylb1dR+VeAVgFLOBODlDk43aqTPEUOSbbdpVeA7OKNh8m+kC+U8PuSaZv7yU
KP6RN0JuGArn7plXbeyZII4KAFLjAX8OdsmpwM5pbgBK5aWporMolqcLXT8vuKBF
khWXIo06bmqn8jpaTzFOqWAoUuqkkSJE2717R/rJch4MSO6VX2Y/Cz+zMKdriQec
f+1gOLUwcDz0AyVTNpLTcMZN6e9Ctqnl3iMLavkQeGVQ4PHdOpUFw8UTV8OBpaPx
qzrbBY2MjuPEu8VdUOAWxloLlUencvyyhO1++X2OUihqZ74fXi0vlZ8WBh4rzaSd
1EYKq0FoeA==
=4hXT
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmeI/hcACgkQYKtH/8kJ
Uic4Ew//V1cj23JElcoQ3lDwqwRlO1NLsfsIDXGohwM9Vl0QkwJZN7B3g5wsthcz
pBOXiS0M5luiS+o9W44tweJ0R68zkwFP4gGYZsuXH+so1mqx8CVfVF99RtbrLMmB
aamCwp+9PgmMYLhIVpJ5Gi8q2CZ/wgl9Xx446jpMActptvXaTJPxkGz7cKxlflqa
71/lnqzEYJ6neXRRUKSU7nntBZTHJCjbQXw1weCCX3FpbVYhsSGpE5l/OQQfkiA6
w0rsqA3b4aW179I3AawQh/o7Kv6fWCXK51qbBB2qu/70xOe7ud4IRFOJbQgpYRyj
h+Zgbae9T4F4CulHu/BtbNBWex3T250Dx/jhQy7Ic+TD0BHgDaDSYEe6/zOpy0vp
cSmOVR5//oROVHvPHosc7pz6h99IcgcyC2HzUEIVehZ//73Xc1eC21snn/FzyP80
N47sqwLmJBg3T1szB2iZ+qJJ5Q+nIOoICprQF7CzvpvJ5DBaclrWzhlBni/rhD0Y
XgMeWzBoCVWynv3PGbBxXYmeOhjYhJbV7b0YnAPtFWwVPS/dSVP8qmlLDkAq0htO
SglUgeZw3At7bSwkNOBqA+qC+smOQ+QVa960yyn3yld5sOYxvUAmls0eKmnsRRT1
kNcGrEffEIt1PMRmZ0iUANrrcaish6Bk4PTUk84Ink0BO9tLHew=
=Q7BZ
-----END PGP SIGNATURE-----
Merge tag 'dt64-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.14
1. Spreadtrum:
- Correct few issues pointed out by DT schema around properties and
node names.
- Move fuel-gauge from DTSI to DTS, because it belongs to the board.
- Use undeprecated properties, like battery-detect-gpios, already
supported by Linux.
2. Uniphier: Use un-deprecated hp-det-gpios (no ABI impact expected).
* tag 'dt64-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: dts: sprd: Fix battery-detect-gpios property
arm64: dts: uniphier: Switch to hp-det-gpios
arm64: dts: sprd: sc9863a: reorder clocks, clock-names per bindings
arm64: dts: sprd: sc9863a: fix in-ports property
arm64: dts: sprd: sc2731: move fuel-gauge monitored-battery to device DTS
arm64: dts: sprd: sp9860g-1h10: fix factory-internal-resistance-micro-ohms property
arm64: dts: sprd: sp9860g-1h10: fix constant-charge-voltage-max-microvolt property
Link: https://lore.kernel.org/r/20241231132847.135814-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Exynos8895: Add UART nodes, PMU (performance) for the M2 cluster and
I2C controllers in the camera block (HSI2C in CAM0-3).
2. Exynos990: Add Power Management Unit (Samsung block), PMU
(performance) for M5 cluster and two clock controllers.
3. ExynosAutov920: Add watchdog and DMA controllers.
4. Google GS101: Minor fixes for phy and USB. Add USB Type-C.
5. Exynos850-e850-96 board: Drop gap in memory layout.
6. New SoC: Exynos9810.
7. New boards, all mobile phones:
- Exynos9810:
Samsung Galaxy S9 (SM-G960F)
- Exynos990:
Samsung Galaxy S20 FE (SM-G780F)
Samsung Galaxy S20 5G (SM-G980F)
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmdz7fUQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD13DVD/wN2KLgyIb3xLzcWN6exT9AP+WzOXZteIqE
YZzRIbc/trQlwPCh3RKTFjP4Oqo4lRv6oC+zEo1L/foLRhP2f4YOp6hspQdjmxvt
GGk98GIHLGvIColtk/drPUOkl0C/xaoKJXV6EzYBM3x8dEBGn0RqDAdN3fiOBEMU
xgbPr9+T5lJxpm1ZR3PQUqlySq48M4B2kptd2QJzprujyREAKLKPL3Zy02mPCWGA
zgUkoP1bnPp5HR78zZtF4u0eJsHWx/GOUq+y0q6xA9lZ3QOL5wvL/uyJvJVIDO3D
yGHjfrZYME1vFVlF6HLg3St0ISFspZiZV1ToWIlbBln+uIGrden24An1aR+svbtw
+v7MM617PYB8356wHEweIg0+rDrhnqokefn20L6z7QEr/4SfFOzjhrcKQUCcjL2c
cejfvL1jN/2kzP0ia5A0Y5wS/NVHwporFsI03+RQVXBqowzVTJueIGmPt7BHcvgC
y3xp0jE/C22JPVSKbR4SsNCiSjM9Q2NqomjS385vZPhDwCFgMKobZ1QhZ1ef3gN9
rL1lpbxe4mhJP4iCFW7p3Tl0x7UL/5Oo874t4iHEsU4NjaKrw2hE/0vXrNn/dRE9
SO8jK/ZG1zMo8npvKKSw+Qa9oX4mM5uhkZa4VkeSVtM5QPyHmO/Xyb+8fpSh/7/R
KRbzIKIbSw==
=Ps/u
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmeH9ZEACgkQYKtH/8kJ
UiftNxAAr1VHsS7oW4h2viFwGnVK4g6cx0TIPrIar5XoxrmBiv3McZyLsFFpzaLE
Cbb4W0ikWriCAHrs6GQhFlEhLv/isveBvjZIRO1Y5rClUPLXkdHNYuWMhwCFeofc
9uW6Ti/uXCAAkgt8h+qdaglXiOedNTAmqq+iHBMnD9JeMm42wcMdUx2ZUcGiOPe7
PkdFVA2e8d0crVrXLwgwOaBcsx93xKSJDy8VWIejn5wOCgVnVJR90v38O8itrXo8
W26ddAnlpKuSMq1Kj5iFnaj1A6ODswNuXKN7IgekfGprSE1ZtdG1CVmVPo/c5X7+
bELBxexSuCz/o9bieBeBLAzCFTgw1MqJDdXmoGIfqqHNALoFpaPMKHpDTnBpNgef
DfA3U5ai+QtI+AqtR0qhV6ltCJKFimx3PdBR0P+FegvswMitCwJScIoGje4xOR7A
VUYTyMRLES4GsC9m9K/442Vnk7LIRPfzOZXTUWbVfPd50BTc8rexjUEJLD8LwFfJ
0PDtDD5JRR1MK+cgzBKTJVSUBd4AyZmYRWlA1+fI9//Ir3NO9kZWlF0nUgLAWS5m
KS3Rdy4RVj2XPuszpsMVjCwShNNEeKT1WQnK6QM9eUvPp0m1y8oMWgtHwkn0gjD9
mt4cSREdbE8U/MhO/FhKlq0g4RdmOp6fEjfUVstzo2GvW5xo420=
=iQYo
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.14
1. Exynos8895: Add UART nodes, PMU (performance) for the M2 cluster and
I2C controllers in the camera block (HSI2C in CAM0-3).
2. Exynos990: Add Power Management Unit (Samsung block), PMU
(performance) for M5 cluster and two clock controllers.
3. ExynosAutov920: Add watchdog and DMA controllers.
4. Google GS101: Minor fixes for phy and USB. Add USB Type-C.
5. Exynos850-e850-96 board: Drop gap in memory layout.
6. New SoC: Exynos9810.
7. New boards, all mobile phones:
- Exynos9810:
Samsung Galaxy S9 (SM-G960F)
- Exynos990:
Samsung Galaxy S20 FE (SM-G780F)
Samsung Galaxy S20 5G (SM-G980F)
* tag 'samsung-dt64-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (23 commits)
arm64: dts: exynos8895: Add camera hsi2c nodes
arm64: dts: exynos990: Add clock management unit nodes
arm64: dts: exynos: gs101-oriole: add pd-disable and typec-power-opmode
arm64: dts: exynos: gs101-oriole: enable Maxim max77759 TCPCi
arm64: dts: exynos: Add initial support for Samsung Galaxy S9 (SM-G960F)
arm64: dts: exynos: Add Exynos9810 SoC support
arm64: dts: exynos850-e850-96: Specify reserved secure memory explicitly
arm64: dts: exynos990: Add a PMU node for the third cluster
arm64: dts: exynosautov920: Add DMA nodes
arm64: dts: exynos8895: Add a PMU node for the second cluster
dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings
arm64: dts: exynosautov920: add watchdog DT node
arm64: dts: exynos: Add initial support for Samsung Galaxy S20 (x1slte)
arm64: dts: exynos: Add initial support for Samsung Galaxy S20 5G (x1s)
arm64: dts: exynos: Add initial support for Samsung Galaxy S20 Series boards (x1s-common)
dt-bindings: arm: samsung: samsung-boards: Add bindings for SM-G981B and SM-G980F board
arm64: dts: exynos: gs101: allow stable USB phy Vbus detection
arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is larger
MAINTAINERS: add myself and Tudor as reviewers for Google Tensor SoC
arm64: dts: exynos990: Add pmu and syscon-reboot nodes
...
Link: https://lore.kernel.org/r/20241231131742.134329-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add mailbox node for the T-Head TH1520 RISC-V SoC. The mailbox bindings
and driver were already merged in v6.13:
b2cf36e4a2 ("dt-bindings: mailbox: Add thead,th1520-mailbox bindings")
5d4d263e1c ("mailbox: Introduce support for T-head TH1520 Mailbox driver")
Signed-off-by: Drew Fustini <drew@pdp7.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCZ3HTaQAKCRDb7CzD2Six
DFB8AP4qH+AyfcGfn+1xVIkyO/2isqp0Prl6FnQygNSbzkOxqAD/d5OJO9ie11kg
8y5AyxfHuB9X4Op7DFR7UPKv7059Awk=
=9M4R
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.14' of https://github.com/pdp7/linux into soc/dt
thead-dt-for-v6.14: T-HEAD Devicetrees for v6.14
Add mailbox node for the T-Head TH1520 RISC-V SoC. The mailbox bindings
and driver were already merged in v6.13:
b2cf36e4a2 ("dt-bindings: mailbox: Add thead,th1520-mailbox bindings")
5d4d263e1c ("mailbox: Introduce support for T-head TH1520 Mailbox driver")
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.14' of https://github.com/pdp7/linux:
riscv: dts: thead: Add mailbox node
This was initially copied from the Midas DTSI, but there is no
proof that the same interrupt is also used on the Tab 3. The pin
listed as the interrupt here is GPIO_HDMI_CEC on the Midas,
but for the Tab 3 it is the headset button GPIO - GPIO_EAR_SEND_END.
Drop the interrupt, since there is no proof that it is used.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-5-48ee7f2293b3@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K,
which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and
GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in
mainline as S2MPS11_CLK_BT.
Add the MCLK2 clock to the WM1811 codec clock property to properly
describe the hardware.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-4-48ee7f2293b3@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Set up headset mic bias regulator and add the necessary properties to
the samsung,midas-audio node to allow for headset jack detection.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-3-48ee7f2293b3@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
There is no Rohm DAC on the CycloneV devkit according to the online
documentation for it that I could find, and it definitely does not have
a dh2228fv as this device does not actually exist! Remove the DAC node
from the devicetree as it is not acceptable to pretend to have a device
on a board in order to bind the spidev driver in Linux.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240717-partake-antivirus-3347e415fb7d@spud
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
When the serial console is enabled, we need to disable power delivery
since serial uses the SBU1/2 pins and appears to confuse the TCPCI,
resulting in endless interrupts.
For now, change the DT such that the serial console continues working.
Note1: We can not have both typec-power-opmode and
new-source-frs-typec-current active at the same time, as otherwise DT
binding checks complain.
Note2: When using a downstream DT, the Pixel boot-loader will modify
the DT accordingly before boot, but for this upstream DT it doesn't
know where to find the TCPCI node. The intention is for this commit to
be reverted once an updated Pixel boot-loader becomes available.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-5-1412783a6b01@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
On Pixel 6 (and Pro), a max77759 companion PMIC for USB Type-C
applications is used, which contains four functional blocks (at
distinct I2C addresses):
* top (including GPIO)
* charger
* fuel gauge
* TCPCi
While in the same package, TCPCi and Fuel Gauge have separate I2C
addresses, interrupt lines and interrupt status registers and can be
treated independently.
The TCPCi is required to detect and handle connector orientation in
Pixel's USB PHY driver, and to configure the USB controller's role
(host vs device).
This change adds the TCPCi part as it can be independent and doesn't
need a top-level MFD.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-4-1412783a6b01@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Samsung Galaxy S9 (SM-G960F), codenamed starlte, is a mobile phone
released in 2017. It has 4GB of RAM, 64GB of UFS storage, Exynos9810
SoC and 1440x2960 Super AMOLED display.
This initial device tree enables the framebuffer pre-initialised
by bootloader and physical buttons of the device, with more support
to come in the future.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241214-exynos9810-v4-2-4e91fbbc2133@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Exynos 9810 is an ARMv8 mobile SoC found in various Samsung devices,
such as Samsung Galaxy S9 (starlte), S9 Plus (star2lte),
Note 9 (crownlte) and perhaps others.
Add minimal support for this SoC, including basic stuff like:
- PSCI for bringing up secondary cores
- ARMv8 generic timer
- GPIO and pinctrl.
The firmware coming with the devices based on this SoC is buggy
and doesn't configure CNTFRQ_EL0, as required by spec, so it's
needed to hardcode the frequency in the timer node.
Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Link: https://lore.kernel.org/r/20241214-exynos9810-v4-1-4e91fbbc2133@gmail.com
[krzysztof: Rename and move PMU nodes to proper sorting position]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Instead of carving out the secure area in 'memory' node, let's describe
it in 'reserved-memory'. That makes it easier to understand both RAM
regions and particular secure world memory region. Originally the device
tree was created in a way to make sure it was well aligned with the way
LittleKernel bootloader modified it. But later it was found the
LittleKernel works fine with properly described reserved regions, so
it's possible now to define those in a cleaner way.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20241211033027.12985-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Since we have a PMU compatiable for Samsung's Mongoose cores now, drop
the comment that explains the lack of it and define the node.
Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241214115855.49138-2-umer.uddin@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Add more serial (SCIF), power monitor, ADC, and sound support for
the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board,
- Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk
Single development board,
- Add display support for the R-Car V4M SoC and the Gray Hawk Single
development board,
- Add video capture support for the Gray Hawk Single development
board,
- Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E
SMARC SoM and Carrier-II EVK development board,
- Add support for 5-port MATEnet on the Falcon Ethernet sub-board,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZ2U9IgAKCRCKwlD9ZEnx
cFrFAQDetsak3pHicXh5uCe2uHdzdPKKPsybNgSXV8PBh1bUkgEAqAWDzcV85Kpa
x6M9Wnf8UdUuE9OMzTLhkbOCAG4IsAI=
=afAu
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmdlnxgACgkQYKtH/8kJ
Uicb8A//W4Ja99mm/GmswBrnFLC4aLQgUHKWSTEYudX44lpipECBMn46KilQBH6y
OkvDSJmKyOmhrD57pka6m+qKRbkcsMIiVmfLlMINQLWaJv3GfA4ri+RcvlDfKP7O
yA8cS1HPPneu3PvgDSrX1hxegwtEq/rZR1ZKdxehjsgvimzZpi6exO4JZtyqV6/H
dG0QYdRGwO1YF8LvmQzgTLos9B/vejG4zv5jcvGfHSJR3pZQ9cYYB8TKvCUk8qnE
1MG4VE3UdvHBn9cgLjUAEnXdLBOFw3vMbl2l9MYwmCOCV9gupTQXe4kZgtcrTm/M
PjDYJ5uH0/flzFZVOaGiTkcTrZHcWi0I3Mra3jM3kLuP8jnXv90PK+EpXHNKtmju
GEnyGgZRn7oGNuDRH9sLiKXz/01X9BREUgoHALplmjNsDK6v/mZ+5EiRCqmx6l+g
WCMN2HuMNfYpMMZV6/0AuhScOSFLM6TI71QVfUbW1s8zygoM8hyJ8GCSc108RobD
tcPwAKXakadTJakN2Re4B+EtSVUXniFS7RTuNITdTi/l5LRO6mRyFzYCjnpitrhy
BQuyqrXlx6m3zi//BfUbb15rE5YhtK2FLplhAFo8E9nvhJ8CGfjRsiYLy30I6AD5
huVPMZh7ISo/CshGwOx/lqlfJTTUChZVgHWLPFtWImI2zlQqD9E=
=nVZZ
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.14
- Add more serial (SCIF), power monitor, ADC, and sound support for
the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board,
- Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk
Single development board,
- Add display support for the R-Car V4M SoC and the Gray Hawk Single
development board,
- Add video capture support for the Gray Hawk Single development
board,
- Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E
SMARC SoM and Carrier-II EVK development board,
- Add support for 5-port MATEnet on the Falcon Ethernet sub-board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits)
arm64: dts: renesas: r9a09g047: Add I2C nodes
arm64: dts: renesas: rzg3s-smarc: Add sound card
arm64: dts: renesas: rzg3s-smarc: Enable SSI3
arm64: dts: renesas: Add da7212 audio codec node
arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node
arm64: dts: renesas: r9a08g045: Add SSI nodes
arm64: dts: renesas: rzg3s-smarc-som: Enable ADC
arm64: dts: renesas: r9a08g045: Add ADC node
arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board
arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM
arm64: dts: renesas: r9a09g047: Add OPP table
arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC
arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board
arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5]
dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK
dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
arm64: dts: renesas: gray-hawk-single: Add video capture support
arm64: dts: renesas: gray-hawk-single: Add DisplayPort support
arm64: dts: renesas: r8a779h0: Add display support
...
Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the camera pipeline with a imx335 sensor connected to the
dcmipp via the csi interface.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add nodes describing the csi and dcmipp controllers handling the
camera pipeline on the stm32mp25x.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Swap USART3 and UART8 aliases on STM32MP15xx DHCOM SoM,
make sure UART8 is listed first, USART3 second, because
the UART8 is labeled as UART2 on the SoM pinout, while
USART3 is labeled as UART3 on the SoM pinout.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Counter driver originally had support limited to quadrature interface
and simple counter. It has been improved[1], so add the remaining
stm32 timer counter nodes.
[1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Counter driver originally had support limited to quadrature interface
and simple counter. It has been improved[1], so add the remaining
stm32 timer counter nodes.
[1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Remove "enable-dma" and "bus-id" properties which are both unused in the
kernel and undocumented. Most likely they are leftovers from downstream.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Remove "snps,max-mtu" property which is both unused in the kernel and
undocumented. Most likely they are leftovers from downstream.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add gpio0 controller node and correct DMA handshake ID for SPI
tx and rx channels.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add VGIC maintenance interrupt and interrupt-parent property for
interrupt controller, required to run Linux in virtualized environment.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ahb reset is deasserted in probe before first register access, while the
stmmacheth-ocp reset needs to be asserted every time before changing the phy
mode in Arria10[1].
Changed in Upstream to "ahb"(331085a423b arm64: dts: socfpga: change the
reset-name of "stmmaceth-ocp" to "ahb" ).This change was intended for arm64
socfpga and it is not applicable to Arria10.
Further with STMMAC-SELFTEST Driver enabled, ethtool test also FAILS.
$ ethtool -t eth0
[ 322.946709] socfpga-dwmac ff800000.ethernet eth0: entered promiscuous mode
[ 323.374558] socfpga-dwmac ff800000.ethernet eth0: left promiscuous mode
The test result is FAIL
The test extra info:
1. MAC Loopback 0
2. PHY Loopback -110
3. MMC Counters -110
4. EEE -95
5. Hash Filter MC 0
6. Perfect Filter UC -110
7. MC Filter -110
8. UC Filter 0
9. Flow Control -110
10. RSS -95
11. VLAN Filtering -95
12. VLAN Filtering (perf) -95
13. Double VLAN Filter -95
14. Double VLAN Filter (perf) -95
15. Flexible RX Parser -95
16. SA Insertion (desc) -95
17. SA Replacement (desc) -95
18. SA Insertion (reg) -95
19. SA Replacement (reg) -95
20. VLAN TX Insertion -95
21. SVLAN TX Insertion -95
22. L3 DA Filtering -95
23. L3 SA Filtering -95
24. L4 DA TCP Filtering -95
25. L4 SA TCP Filtering -95
26. L4 DA UDP Filtering -95
27. L4 SA UDP Filtering -95
28. ARP Offload -95
29. Jumbo Frame -110
30. Multichannel Jumbo -95
31. Split Header -95
32. TBS (ETF Scheduler) -95
[ 324.881327] socfpga-dwmac ff800000.ethernet eth0: Link is Down
[ 327.995360] socfpga-dwmac ff800000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
Link:[1] https://www.intel.com/content/www/us/en/docs/programmable/683711/21-2/functional-description-of-the-emac.html
Fixes: 331085a423 ("arm64: dts: socfpga: change the reset-name of "stmmaceth-ocp" to "ahb")
Signed-off-by: Mamta Shukla <mamta.shukla@leica-geosystems.com>
Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The properties #address-cells and #size-cells are only useful if there
is a ranges property or child nodes with "reg" properties.
This fixes a W=1 warning:
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcvevk.dts:51.22-72.4: Warning (avoid_unnecessary_addr_size): /soc/i2c@ffc04000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
ExynosAutov920 SoC has 7 DMA controllers. Two secure DMAC
(SPDMA0 & SPDMA1) and five non-secure DMAC (PDMA0 to PDMA4).
Add the required dt nodes for the same.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Faraz Ata <faraz.ata@samsung.com>
Link: https://lore.kernel.org/r/20241212115709.1724-1-faraz.ata@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Since we have a PMU compatible for Samsung's Mongoose cores now, drop
the comment that explains the lack of it and define the node.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20241211162942.450525-2-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add dt-schema documentation for the Exynos990 SoC CMU.
This clock management unit has a topmost block (CMU_TOP)
that generates top clocks for other blocks. Currently the
only other block implemented is CMU_HSI0, which provides
clocks for the USB part of the SoC.
Also, device-tree binding definitions added for these blocks:
- CMU_TOP
- CMU_HSI0
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20241209-exynos990-cmu-v4-1-57f07080f9e4@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
at24.yaml defines the node name for at24 EEPROMs as 'eeprom'.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20240910215905.823337-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add sound card with SSI3 as CPU DAI and DA7212 as codec DAI.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241210170953.2936724-25-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the da7212 audio codec node. Along with it regulators nodes were
reworked to be able to re-use them on da7212.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20241210170953.2936724-23-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add DT nodes for the SSI IPs available on the Renesas RZ/G3S SoC. Along
with it external audio clocks were added. Board device tree could use it
and update the frequencies.
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241210170953.2936724-21-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the device tree node for the ADC IP available on the Renesas RZ/G3S
SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241206111337.726244-15-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
