Use the same helper for GMC v12.1 that is used by other
GMC IP block versions.
No functional changes intended. Just code cleanup.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Switch exports of KUnit-only helpers to EXPORT_SYMBOL_IF_KUNIT.
Unlike EXPORT_IF_KUNIT, which used EXPORT_SYMBOL(), the standard
macro places symbols in the EXPORTED_FOR_KUNIT_TESTING namespace.
Add MODULE_IMPORT_NS() to the AMD DC test files so loadable tests
can still resolve those helpers.
Suggested-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Switch amdgpu_dm test helpers from the local STATIC_IFN_KUNIT
macro to VISIBLE_IF_KUNIT.
The two are not identical: STATIC_IFN_KUNIT was gated on
CONFIG_DRM_AMD_DC_KUNIT_TEST, while VISIBLE_IF_KUNIT is gated on
CONFIG_KUNIT. Helpers therefore become non-static whenever KUnit
is enabled, not only when the AMD DC tests are built.
However, given that DRM_AMD_DC_KUNIT_TEST depends on KUNIT,
tests remain behaviourally unchanged.
kernel-doc still needs to strip the qualifier. amdgpu_dm_color.c
is pulled into Documentation/gpu and several documented functions
use it.
Include <kunit/visibility.h> from dm_helpers.h, which is where the
local macros used to live.
Suggested-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Use plane_descriptors[k] for the loop bound, matching the loop body.
Fixes: 7f7d7ea1fa ("drm/amd/display: Add new sources for DCN6")
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Lu Yao <yaolu@kylinos.cn>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
dc_state_create_copy() can return NULL on allocation failure.
dm_suspend() only conditionally skips dm_gpureset_toggle_interrupts()
and continues execution, returning success. dm_resume() then
dereferences the NULL cached_dc_state in link_enc_cfg_copy() and the
following dc_state->stream_count loop, crashing during GPU reset
recovery.
Return -ENOMEM immediately if the copy fails, so the caller aborts
suspend instead of leaving a NULL cached state for resume.
Fixes: 8092aa3ab8 ("drm/amd/display: Add null checker before passing variables")
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Jiangshan Yi <yijiangshan@kylinos.cn>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
When building the DML files with clang without any sanitizer or LTO,
the following -Wframe-larger-than errors break the build under
CONFIG_WERROR:
display_mode_vba_30.c: error: stack frame size (2512) exceeds limit
(2048) in 'dml30_ModeSupportAndSystemConfigurationFull'
display_mode_vba_31.c: error: stack frame size (2416) exceeds limit
(2048) in 'dml31_ModeSupportAndSystemConfigurationFull'
display_mode_vba_314.c: error: stack frame size (2392) exceeds limit
(2048) in 'dml314_ModeSupportAndSystemConfigurationFull'
Clang consistently spills more than gcc, pushing the frame past the 2048
byte limit.
Apply an existing approach of increasing the warn stack size to the
non-sanitizer path so plain clang builds use a 3072 byte limit.
Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5642
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
UBSAN instrumentation adds checks and handler calls and increases
stack usage in the large DML calculation functions, similar to
KASAN and KCSAN. With UBSAN enabled these files exceed the default
-Wframe-larger-than limit and fail to build when -Werror is in effect.
Reproduced with LLVM (make LLVM=1, clang 19.1.1), CONFIG_UBSAN=y,
CONFIG_GCOV_PROFILE_ALL=y and CONFIG_DRM_AMDGPU_WERROR=y on x86_64.
[HOW]
Include CONFIG_UBSAN in the sanitizer check that selects the
higher per-file frame warning limit in the dml and dml2_0
Makefiles.
Suggested-by: Leo Li <sunpeng.li@amd.com>
Assisted-by: Copilot:Claude-Opus-5.5
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Use of compound literals to initialize heap objects may create stack
temporaries when compiling in debug mode. For large objects such
as dc_memory_pool which is 2 pages large to avoid cacheline sharing,
this causes function stackframe to exceed kernel limit.
[How]
Replace compound literal with field-by-field initialization.
Reported-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/all/aq0vYhZXtMqA41wZ@sirena.org.uk/
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
If MODE.DST_VGPR_MSB != MODE.SRC0_VGPR_MSB upon trap entry then
v1 would be trashed.
Adjust workaround to prefetch random address 0xFFFFFFFFxxxxxxxx.
This address space is unavailable to userspace on gfx12.1, ensuring
no functional side-effects of prefetch.
Also remove unused WAVE_START exception handler.
Fixes: 0e1e0f87af ("drm/amdkfd: gfx12.1 add no-op prefetch on trap entry")
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Reviewed-by: Lancelot Six <lancelot.six@amd.com>
Cc: Joseph Greathouse <joseph.greathouse@amd.com>
Cc: Vladimir Indic <vladimir.indic@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Use scoped_guard/scoped_cond_guard instead.
Saving and restoring the GFP flags is not necessary in those use case.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Natalie Vock <nat@pixelcluster.dev>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The logic for checking whether NPM is enabled/disabled stays within the
particular IP version.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Advertise each NPM board attribute from a per-field R/W bitmap instead of
probing a single sensor. SMU 13.0.6/13.0.12 reports the cap only when NPM
metrics and MaxNodePowerLimit are present.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Assisted-by: Cursor Grok 4.6
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Smatch reports that link->link_enc is unconditionally dereferenced at
the top of dce110_enable_tmds_link_output() while the later
setup_ri_pj_check_in_sw_or_hw_mode calls guard against it being NULL,
making those checks contradictory.
Add an early return when link_enc is NULL and drop the redundant NULL
checks from the two call sites that follow, since link_enc is guaranteed
non-NULL past the guard
Fixes: 992694ad28 ("drm/amd/display: Enable DCN6 sources compilation")
Reported-by: Dan Carpenter <error27@gmail.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Roman Li <Roman.Li@amd.com>
Cc: Ivan Lipski <ivan.lipski@amd.com>
Cc: Dan Wheeler <daniel.wheeler@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Reviewed-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This DC patchset brings improvements in multiple areas. In summary, we have:
- Increased KUnit coverage
- Reverts a patch causing regression on DCN42
- Fixes for cursor
- Imporvements for ABM
Reviewed-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
element_size_to_bytes_per_pixel() handled only element sizes 0 to 4 and
returned 0 for every other value, and an unexpected element size caused
a divide by zero.
[HOW]
Derive the size as 1 << element_size, which matches the existing
encoding, and fall back to 1 for values of 8 or more to keep the result
nonzero.
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This reverts commit 555641725f ("drm/amd/display: Request DMUB HW cursor offload").
[WHY]
This commit causes the following failures on DCN42:
igt@kms_plane_cursor@viewport
igt@kms_plane_cursor@overlay
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Qi <Haoming.Qi@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
The cursor programming path caches the last-written cursor state in SW
and, for the enable bit, skips the register write when the cache already
matches the request. Under cursor offload the SW cache is updated even
though the actual register write is deferred to firmware. When an
offloaded cursor update is aborted (e.g. an overlay geometry change
reprograms the cursor directly in the same frame), the queued firmware
write is dropped but the cache is left stale, so the following direct
programming pass skips the enable write and the cursor disappears over
the overlay plane.
Add a refresh_cursor_state() hubp/dpp hook that reads the cursor
position and attribute registers back from hardware into the SW cache,
and call it from dcn35_abort_cursor_offload_update() so the cache is
truthful after an abort. This keeps the enable-change optimization
intact for all ASICs and is race-robust regardless of whether firmware
applied the queued write before the abort. Only dcn60 (the sole offload
user) wires up the hook.
Assisted-by: Copilot:Claude-Opus-4.8
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why&How]
There can be more than 2 DCFCLK values for DCN6, so the assert is not
applicable.
Remove it.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit contains renames, adding const to pipe_ctx in
build_cursor_pos_update_params and also removing unnecessary checks
before dc_dmub_srv_is_cursor_offload_enabled().
[Why]
It improves code clarity.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
dcn401_build_cursor_position() clamped x_hotspot to 0xFF before
publishing *pos_out, but that field is also stored into hubp->curs_pos
and forwarded to dpp1_set_cursor_position(), which derives
src_x_offset from it. The ODM/MPC slice adjustments earlier in the same
function deliberately grow x_hotspot past 255 to keep the cursor
visible across a slice boundary, so the clamp corrupted DPP source
addressing in exactly the case it was meant to handle.
[How]
Clamp in hubp401_cursor_set_position() instead, where the 8-bit
CURSOR_HOT_SPOT_X field lives. A local is used for the register write
only; pos->x_hotspot passes through unmodified.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
UT mirror headers still declared the old prototypes and hwss_gtest still
called the callback directly. Separately, the divide by
param.pixel_clk_khz used to sit after hubp401_cursor_set_position()'s
"curs_attr.address == 0" early return; hoisting the math into the
builder moved it ahead of that guard, so it now traps on streams with
no timing programmed.
[How]
Guard the dst_x_offset block with "if (param.pixel_clk_khz)"
Route the test through hwss_program_cursor_position().
Update dc_hwss_ut.h / dc_hwseq_ut.h and the BLS docs to the new signatures.
Move the pos/param declarations to the top of the loop body.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Piotr Maziarz <piotr.maziarz@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flatten the executor params for the initial set of HWSS block sequence ops
for SET_CURSOR_POSITION to separate SW and HW logic
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
pipe_ctx is not allowed to reach a block sequence step. Several operations
still carried it into the executor, which then walked the logical state at
execute time (pipe_ctx->stream->timing, pipe_ctx->plane_state and similar)
instead of acting on data resolved during build.
[How]
Give each operation a flat parameter list holding only the hardware objects
and values the final hwss call needs, and change the matching hooks to take
it. The function pointer, the params struct, the executor, the builder
helpers and all call sites are updated together.
Operations covered:
- OPTC_PROGRAM_MANUAL_TRIGGER - takes tg
- HUBP_PROGRAM_TRIPLEBUFFER - program_triplebuffer takes (hubp, bool)
- DPP_SETUP_DPP, DPP_PROGRAM_BIAS_AND_SCALE - take (dpp, plane_state)
- DSC_ENABLE_WITH_OPP - takes (dsc, opp_inst)
- OPP_PROGRAM_BIT_DEPTH_REDUCTION - opp
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Rafal Ostrowski <rafal.ostrowski@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Clean up the AMDGPU DM KUnit tests after checkpatch reported an
invalid sizeof(void) allocation, typed kzalloc patterns, and a
repeated word in a kernel-doc summary. Clarify the test name that
covers an active CRTC state transition.
[HOW]
- Use sizeof(cpu_ptr) for the fake CPU pointer allocation.
- Replace typed kzalloc(sizeof(*object), ...) calls with
kzalloc_obj(*object, ...) in the connector, IRQ, plane, and
atomic-state tests.
- Rename the CRTC active-state test and update its kernel-doc and
suite registration.
Assisted-by: Copilot:GPT-5.6-Luna
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Folding the MCCS FreeSync checks into the do_mccs block dropped the
other half of the original condition: the check that clears
freesync_capable for HDMI or PCON-in-whitelist sinks that expose no
EDID FreeSync VCP code. That check does not depend on the MCCS caps
and must run regardless of do_mccs.
As a result, when do_mccs is false such a sink without a FreeSync VCP
code is still reported as FreeSync-capable.
[HOW]
Restore the VCP code check outside the do_mccs block so it is
evaluated whether or not MCCS caps were read.
Fixes: 115bf5ca31 ("drm/amd/display: Consult MCCS FreeSync cap only if requested & supported")
Reviewed-by: Roman Li <roman.li@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Writeback mode tests call drm_mode_probed_add without holding
mode_config.mutex, producing a warning for every generated mode.
[HOW]
Hold the mutex around writeback mode enumeration and release it before
checking the returned count or inspecting the generated modes.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Vblank and interrupt-management tests need discoverable CRTCs with
complete vblank callbacks and balanced teardown.
[HOW]
Add the callbacks, link the fake CRTCs, and register cleanup actions
to disable vblank before unlinking. Pass the CRTC directly so cleanup
does not reinterpret two different fixture types through one layout.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The MST add-connector fixture registers an unmanaged master connector
but does not clean it up before its KUnit-owned storage is released.
[HOW]
Register a KUnit action after successful connector initialization to
run drm_connector_cleanup before freeing the master connector.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
IRQ tests leave vblank active when removing their fake CRTCs, causing
warnings during DRM device teardown.
[HOW]
Turn off initialized vblank before unlinking each test CRTC in the
existing cleanup action.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The real connector fixture lacks atomic state callbacks required by
DRM connector initialization.
[HOW]
Install the DRM atomic connector duplicate and destroy state helpers
alongside the existing reset callback.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The VRR transition test needs a discoverable CRTC and balanced vblank
teardown. Assertion failures must not leave freed CRTCs linked.
[HOW]
Supply a vblank counter callback and link the test CRTC. Register a
KUnit cleanup action to disable vblank and unlink it on every exit.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
The cursor offset test binds a CRTC without a framebuffer, triggering
a plane-state consistency warning before the intended offset check.
[HOW]
Provide a test framebuffer in the new plane state while retaining the
invalid offset and its expected rejection.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Incomplete CRTC callbacks and vblank teardown cause DRM warnings in
CRTC tests.
[HOW]
Provide the required CRTC callbacks, link fake CRTCs for vblank lookup,
and register cleanup actions to disable vblank before unlinking them.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHY]
Connector mode population without mode_config.mutex produces warning
stack traces. Legacy property reads also warn on atomic DRM devices.
[HOW]
Lock mode-population calls and release the mutex before assertions.
Read stored property values with the atomic-compatible default getter.
Assisted-by: Copilot:GPT-6-Astra
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Like DCN42, the alpha field is 12 bits compared to the 16 bit value in
plane_state; must convert it.
Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Inbox1 was previously being used for cursor and DIG locking with
DMUB doing the relevant programming on behalf of driver.
With the Inbox0 lock the driver is expected to do the programming
itself and the Inbox0 lock acts as nothing more than a SW mutex.
There are still a few gaps in how Inbox1 was being leveraged in the
cursor path that need to be addressed for Inbox0.
[How]
Add a `should_use_dmub_inbox0_lock_for_link` helper to help
check if we support the Inbox0 locking infrastructure and we should
be locking it if the specific link in question requires it.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zhikai Zhai <zhikai.zhai@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an inst member to struct clock_source and struct dio. The DCE110
and DCE112 clock sources derive it from their clock_source_id; the
DCN10 DIO is a singleton and uses 0.
Also move the (void)encoding cast in dcn401_program_pix_clk() below the
local declarations, where it belongs.
No functional change; the inst field has no readers yet.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add an inst member to struct link_encoder, struct stream_encoder and
struct hpo_frl_stream_encoder, and populate it in the DCN10 through
DCN60 construct paths.
No functional change; the field has no readers yet.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
Thirteen tests in the amdgpu_dm_irq suite only re-ran a path that
another test already covered, and five more repeated setup that the
fixtures added by the preceding patches now provide.
[HOW]
Delete the tests whose executed path is a strict subset of
another's, and fold the remaining duplicated setup onto the shared
fixtures.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A global perfmon counts concurrent activity from every job, so no
dependency is added while one is set. Skip the accumulator for the jobs
carrying no perfmon while a global perfmon is enabled, which is every job
in the common case.
Jobs carrying their own perfmon stay tracked. The global perfmon may be
cleared before such a job runs, and the next job carrying a perfmon has
to wait for it, otherwise both are in flight at once and only one gets
programmed in the HW.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Link: https://patch.msgid.link/20260922-v3d-quick-exit-perfmon-serialize-v2-2-2a8021dc32f2@igalia.com
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Every job merges its finished fence into the per-queue accumulator so
that a job carrying a perfmon can later depend on everything still in
flight. This is a (relatively high) cost that every job pays before
it is submitted.
Perfmons only exist while userspace runs a performance query, so the
common case is a client paying that on every job for a dependency that is
never actually added, increasing the submission latency.
Address this situation by counting the number of perfmons alive on the
device and returning early while that count is zero. This means that if
no perfmon exists, v3d_serialize_for_perfmon() will bail out immediately.
Jobs submitted while no perfmon is alive stay unaccounted and may overlap
the first measured job. The count returns to zero whenever the last
perfmon is destroyed, so that window reopens on every measurement cycle.
Closing it would mean merging a fence on every submission for the
lifetime of the device, so it is a reasonable compromise for the average
use case.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Link: https://patch.msgid.link/20260922-v3d-quick-exit-perfmon-serialize-v2-1-2a8021dc32f2@igalia.com
Signed-off-by: Maíra Canal <mcanal@igalia.com>
[WHAT]
handle_hpd_rx_irq() left its whole post-detect block untested
apart from a failing re-detect, and never dispatched a CP_IRQ.
[HOW]
Add four tests covering a failing connection-type probe, a
connector forced on that is emulated instead of detected, a successful
re-detect that notifies userspace, and a CP_IRQ that must be handed to
the HDCP work queue for the connector that raised it.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
handle_hpd_irq_helper() never ran its HDCP reset, its forced
connector branch or its successful re-detect branch.
[HOW]
Add a minimal HDCP work queue fixture and three tests: an HPD on
a driver that carries an HDCP work queue, which must reset the display
and flag the connector state; a connector forced on that reports no
connection and is emulated instead of detected; and a successful
re-detect that notifies userspace.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
amdgpu_dm_hdmi_hpd_debounce_work() only ran with detection
failing, so neither outcome of the sink comparison that decides whether
an HPD toggle was spurious was covered.
[HOW]
Add a fixture for the debounce work item and two tests: a
re-detect finding the same sink, which re-enables internally without
notifying userspace, and one finding a different sink, which sends the
hotplug event.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
dm_handle_hpd_rx_offload_work() was covered only for its
automated-test and link-loss branches. The connection-type failure, the
GPU-reset drop, the MST message-ready drain and the forced reconnect
were never entered.
[HOW]
Add a fixture that builds a queued offload work item on a
DisplayPort link and four tests: a failing connection-type probe, a
device already in reset, a deferred UP_REQ_MSG_RDY drained through an
AUX that fails every transfer, and an automated test whose timing
changed, which forces the connector off and back on. The last one
registers the DRM device so the hotplug uevent helpers find a sysfs
minor on the primary node.
Assisted-by: Copilot:Claude-Opus-5
Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
