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1,412,004 commits

Author SHA1 Message Date
Krzysztof Kozlowski
054c7f7ad3 crypto: cesa - Simplify with of_device_get_match_data()
Driver's probe function matches against driver's of_device_id table,
where each entry has non-NULL match data, so of_match_node() can be
simplified with of_device_get_match_data().

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:49 +08:00
Krzysztof Kozlowski
4ae946a45d crypto: ccp - Simplify with of_device_get_match_data()
Driver's probe function matches against driver's of_device_id table,
where each entry has non-NULL match data, so of_match_node() can be
simplified with of_device_get_match_data().

Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:49 +08:00
Krzysztof Kozlowski
ec2054c124 crypto: ccp - Constify 'dev_vdata' member
sp_device->dev_vdata points to only const data (see 'static const struct
sp_dev_vdata dev_vdata'), so can be made pointer to const for code
safety.

Update also sp_get_acpi_version() function which returns this pointer to
'pointer to const' for code readability, even though it is not needed.

On the other hand, do not touch similar function sp_get_of_version()
because it will be immediately removed in next patches.

Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Krzysztof Kozlowski
c6c247ae33 crypto: artpec6 - Simplify with of_device_get_match_data()
Driver's probe function matches against driver's of_device_id table, so
of_match_node() can be simplified with of_device_get_match_data().

This requires changing the enum used in the driver match data entries to
non-zero, to be able to recognize error case of
of_device_get_match_data().

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Krzysztof Kozlowski
6b94eb68ad hwrng: bcm2835 - Simplify with of_device_get_match_data()
Driver's probe function matches against driver's of_device_id table,
where each entry has non-NULL match data, so of_match_node() can be
simplified with of_device_get_match_data().

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Krzysztof Kozlowski
cdd7bbce7b hwrng: bcm2835 - Move MODULE_DEVICE_TABLE() to table definition
Convention is to place MODULE_DEVICE_TABLE() immediately after
definition of the affected table, so one can easily spot missing such.
There is on the other hand no benefits of putting MODULE_DEVICE_TABLE()
far away.

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Marco Crivellari
7e8f232ae8 crypto: cavium/nitrox - add WQ_PERCPU to alloc_workqueue users
Currently if a user enqueues a work item using schedule_delayed_work() the
used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
schedule_work() that is using system_wq and queue_work(), that makes use
again of WORK_CPU_UNBOUND.
This lack of consistency cannot be addressed without refactoring the API.

alloc_workqueue() treats all queues as per-CPU by default, while unbound
workqueues must opt-in via WQ_UNBOUND.

This default is suboptimal: most workloads benefit from unbound queues,
allowing the scheduler to place worker threads where they’re needed and
reducing noise when CPUs are isolated.

This continues the effort to refactor workqueue APIs, which began with
the introduction of new workqueues and a new alloc_workqueue flag in:

commit 128ea9f6cc ("workqueue: Add system_percpu_wq and system_dfl_wq")
commit 930c2ea566 ("workqueue: Add new WQ_PERCPU flag")

This change adds a new WQ_PERCPU flag to explicitly request alloc_workqueue()
to be per-cpu when WQ_UNBOUND has not been specified.

With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND),
any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND
must now use WQ_PERCPU.

Once migration is complete, WQ_UNBOUND can be removed and unbound will
become the implicit default.

Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Marco Crivellari
5f8c6c9318 crypto: atmel-i2c - add WQ_PERCPU to alloc_workqueue users
Currently if a user enqueues a work item using schedule_delayed_work() the
used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use
WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to
schedule_work() that is using system_wq and queue_work(), that makes use
again of WORK_CPU_UNBOUND.
This lack of consistency cannot be addressed without refactoring the API.

alloc_workqueue() treats all queues as per-CPU by default, while unbound
workqueues must opt-in via WQ_UNBOUND.

This default is suboptimal: most workloads benefit from unbound queues,
allowing the scheduler to place worker threads where they’re needed and
reducing noise when CPUs are isolated.

This continues the effort to refactor workqueue APIs, which began with
the introduction of new workqueues and a new alloc_workqueue flag in:

commit 128ea9f6cc ("workqueue: Add system_percpu_wq and system_dfl_wq")
commit 930c2ea566 ("workqueue: Add new WQ_PERCPU flag")

This change adds a new WQ_PERCPU flag to explicitly request
alloc_workqueue() to be per-cpu when WQ_UNBOUND has not been specified.

With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND),
any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND
must now use WQ_PERCPU.

Once migration is complete, WQ_UNBOUND can be removed and unbound will
become the implicit default.

Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Karina Yankevich
d52e9b8843 crypto: rockchip - drop redundant crypto_skcipher_ivsize() calls
The function already initialized the ivsize variable
at the point of declaration, let's use it instead of
calling crypto_skcipher_ivsize() extra couple times.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: 57d67c6e82 ("crypto: rockchip - rework by using crypto_engine")
Signed-off-by: Karina Yankevich <k.yankevich@omp.ru>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-14 18:15:48 +08:00
Zilin Guan
a55ef3bff8 xfrm: fix memory leak in xfrm_add_acquire()
The xfrm_add_acquire() function constructs an xfrm policy by calling
xfrm_policy_construct(). This allocates the policy structure and
potentially associates a security context and a device policy with it.

However, at the end of the function, the policy object is freed using
only kfree() . This skips the necessary cleanup for the security context
and device policy, leading to a memory leak.

To fix this, invoke the proper cleanup functions xfrm_dev_policy_delete(),
xfrm_dev_policy_free(), and security_xfrm_policy_free() before freeing the
policy object. This approach mirrors the error handling path in
xfrm_add_policy(), ensuring that all associated resources are correctly
released.

Fixes: 980ebd2579 ("[IPSEC]: Sync series - acquire insert")
Signed-off-by: Zilin Guan <zilin@seu.edu.cn>
Reviewed-by: Sabrina Dubroca <sd@queasysnail.net>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
2025-11-14 10:12:36 +01:00
Thierry Reding
a97fbc3ee3 syscore: Pass context data to callbacks
Several drivers can benefit from registering per-instance data along
with the syscore operations. To achieve this, move the modifiable fields
out of the syscore_ops structure and into a separate struct syscore that
can be registered with the framework. Add a void * driver data field for
drivers to store contextual data that will be passed to the syscore ops.

Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-11-14 10:01:52 +01:00
Gatien Chevallier
3bae4748c1 bus: rifsc: add debugfs entry to dump the firewall configuration
RIFSC configuration can be difficult to debug. Add a debugfs entry
that dumps the configuration of the RISUPs, the RISALs and the RIMUs.
This will allow to display the whole RIFSC firewall configuration at
runtime.

While there, fix a bug on the computation of firewall entries in the
probe function.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251106-rifsc_debugfs-v2-3-f90e94ae756d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:49:09 +01:00
Gatien Chevallier
a6961e2ced arm64: dts: st: set RIFSC as an access controller on stm32mp21x platforms
Similarly to stm32mp23x/25x platforms, the RIFSC is a firewall
controller. Declare it as an access controller, keep the "simple-bus"
compatible in case CONFIG_STM32_FIREWALL is not set and update the
child nodes.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251106-rifsc_debugfs-v2-2-f90e94ae756d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:48:40 +01:00
Takashi Iwai
fa3c727e05 ASoC: Fixes for v6.18
A small collection of fixes, all driver specific and none especially
 remarkable unless you have the hardware (many not even then).
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Merge tag 'asoc-fix-v6.18-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.18

A small collection of fixes, all driver specific and none especially
remarkable unless you have the hardware (many not even then).
2025-11-14 09:47:28 +01:00
Gatien Chevallier
d50807fee6 dt-bindings: bus: add stm32mp21 RIFSC compatible
The STM32MP21x platforms have a slightly different RIFSC. While its
core functionalities are similar, the wiring is not the same. Hence,
declare a new compatible.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20251106-rifsc_debugfs-v2-1-f90e94ae756d@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:46:12 +01:00
Gatien Chevallier
af9c7a6c5d ARM: dts: stm32: add the IWDG2 interrupt line in stm32mp131.dtsi
Add the interrupt line that can be used for the early interrupt of
the IWDG2 to the IWDG2 node

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251031-iwdg1-v2-4-2dc6e0116725@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:39:50 +01:00
Gatien Chevallier
5da23908a3 ARM: dts: stm32: enable the ARM SMC watchdog node in stm32mp135f-dk
On the stm32mp135f-dk board, the IWDG1 is secured and used to monitor
the cortex-A7. Use the ARM SMC watchdog to communicate with it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251031-iwdg1-v2-3-2dc6e0116725@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:39:50 +01:00
Gatien Chevallier
5512618b58 ARM: dts: stm32: add the ARM SMC watchdog in stm32mp131.dtsi
Add the arm_wdt node in the stm32mp131.dtsi SoC device tree file. When
the platform watchdog is managed by the secure world, SMC calls are used
to interact with it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251031-iwdg1-v2-2-2dc6e0116725@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:39:50 +01:00
Gatien Chevallier
0b1aa90e2d ARM: dts: stm32: add iwdg1 node in stm32mp131.dtsi
Add the IWDG1 node in the stm32mp131.dtsi SoC device tree file. It can
be used by Linux as the Cortex-A7 watchdog when it's configured as
non-secure.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20251031-iwdg1-v2-1-2dc6e0116725@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:39:50 +01:00
Antonio Borneo
e613ef5c15 arm64: dts: st: Add I/O sync to eth pinctrl in stm32mp25-pinctrl.dtsi
On board stm32mp257f-ev1, the propagation delay between eth1/eth2
and the external PHY requires a compensation to guarantee that no
packet get lost in all the working conditions.

Add I/O synchronization properties in pinctrl on all the RGMII
data pins, activating re-sampling on both edges of the clock.

Co-developed-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20251023132700.1199871-13-antonio.borneo@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:33:12 +01:00
Patrice Chotard
22f0ae971c arm64: dts: st: Add memory-region-names property for stm32mp257f-ev1
In order to set the AMCR register, which configures the
memory-region split between ospi1 and ospi2, we need to
identify the ospi instance.

By using memory-region-names, it allows to identify the
ospi instance this memory-region belongs to.

Fixes: cad2492de9 ("arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20251031-upstream_fix_dts_omm-v4-1-e4a059a50074@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-11-14 09:25:56 +01:00
Dave Airlie
362a7d4fd5 Driver Changes:
- New HW workarounds affecting PTL and WCL platforms
    (Nitin Gote, Tangudu Tilak Tirumalesh)
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Merge tag 'drm-xe-fixes-2025-11-13' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes

Driver Changes:
 - New HW workarounds affecting PTL and WCL platforms
   (Nitin Gote, Tangudu Tilak Tirumalesh)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patch.msgid.link/ay2qztgonodwson6tuzcv5napjmqbgwzv27so4ybfola34guux@xgufrrmbzyws
2025-11-14 17:51:17 +10:00
Dave Airlie
538e0110fe - Fix PSR's pipe to vblank conversion (Jani)
- Disable Panel Replay on MST links (Imre)
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Merge tag 'drm-intel-fixes-2025-11-13' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-fixes

- Fix PSR's pipe to vblank conversion (Jani)
- Disable Panel Replay on MST links (Imre)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/aRXdQnitzyFcokhF@intel.com
2025-11-14 17:50:52 +10:00
Ally Heev
ac5ae0a5ce tee: qcomtee: fix uninitialized pointers with free attribute
Uninitialized pointers with `__free` attribute can cause undefined
behavior as the memory assigned randomly to the pointer is freed
automatically when the pointer goes out of scope.

qcomtee doesn't have any bugs related to this as of now, but
it is better to initialize and assign pointers with `__free`
attribute in one statement to ensure proper scope-based cleanup

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/all/aPiG_F5EBQUjZqsl@stanley.mountain/
Signed-off-by: Ally Heev <allyheev@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2025-11-14 08:42:07 +01:00
Dave Airlie
15ebea1bdf Short summary of fixes pull:
client:
 - Fix description of module parameter
 
 panthor:
 - Flush writes before mapping buffers
 
 vmwgfx:
 - Improve command validation
 - Improve ref counting
 - Fix cursor-plane support
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Merge tag 'drm-misc-fixes-2025-11-13' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes

Short summary of fixes pull:

client:
- Fix description of module parameter

panthor:
- Flush writes before mapping buffers

vmwgfx:
- Improve command validation
- Improve ref counting
- Fix cursor-plane support

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patch.msgid.link/20251113132317.GA451885@linux.fritz.box
2025-11-14 17:24:57 +10:00
Dave Airlie
63444b4ca4 amd-drm-fixes-6.18-2025-11-12:
amdgpu:
 - Disallow P2P DMA for GC 12 DCC surfaces
 - ctx error handling fix
 - UserQ fixes
 - VRR fix
 - ISP fix
 - JPEG 5.0.1 fix
 
 amdkfd:
 - Save area check fix
 - Fix GPU mappings for APU after prefetch
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Merge tag 'amd-drm-fixes-6.18-2025-11-12' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes

amd-drm-fixes-6.18-2025-11-12:

amdgpu:
- Disallow P2P DMA for GC 12 DCC surfaces
- ctx error handling fix
- UserQ fixes
- VRR fix
- ISP fix
- JPEG 5.0.1 fix

amdkfd:
- Save area check fix
- Fix GPU mappings for APU after prefetch

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patch.msgid.link/20251112200930.8788-1-alexander.deucher@amd.com
2025-11-14 17:24:27 +10:00
Ian Rogers
c1932fb85a perf vendor metrics s390: Avoid has_event(INSTRUCTIONS)
The instructions event is now provided in json meaning the has_event
test always succeeds. Switch to using non-legacy event names in the
affected metrics.

Reported-by: Thomas Richter <tmricht@linux.ibm.com>
Closes: https://lore.kernel.org/linux-perf-users/3e80f453-f015-4f4f-93d3-8df6bb6b3c95@linux.ibm.com/
Fixes: 0012e0fa22 ("perf jevents: Add legacy-hardware and legacy-cache json")
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Thomas Richter <tmricht@linux.ibm.com>
Tested-by: Thomas Richter <tmricht@linux.ibm.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:22:34 -08:00
Ian Rogers
ca016b6527 perf auxtrace: Remove errno.h from auxtrace.h and fix transitive dependencies
errno.h isn't used in auxtrace.h so remove it and fix build failures
caused by transitive dependencies through auxtrace.h on errno.h.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:03:11 -08:00
Ian Rogers
754187ad73 perf build: Remove NO_AUXTRACE build option
The NO_AUXTRACE build option was used when the __get_cpuid feature
test failed or if it was provided on the command line. The option no
longer avoids a dependency on a library and so having the option is
just adding complexity to the code base. Remove the option
CONFIG_AUXTRACE from Build files and HAVE_AUXTRACE_SUPPORT by assuming
it is always defined.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:03:11 -08:00
Ian Rogers
c819bfdc4a tool build: Remove __get_cpuid feature test
This feature test is no longer used so remove.

The function tested by the feature test is used in:
tools/power/x86/x86_energy_perf_policy/x86_energy_perf_policy.c
however, the Makefile just assumes the presence of the function and
doesn't perform a build feature test for it.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:03:11 -08:00
Ian Rogers
2566bbfc0a perf build: Don't add NO_AUXTRACE if missing feature-get_cpuid
The intel-pt code dependent on __get_cpuid is no longer present so
remove the feature test in the Makefile.config.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:03:11 -08:00
Ian Rogers
8933c624d9 perf intel-pt: Use the perf provided "cpuid.h"
Rather than having a feature test and include of <cpuid.h> for the
__get_cpuid function, use the cpuid function provided by
tools/perf/arch/x86/util/cpuid.h.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-11-13 23:03:11 -08:00
Srikar Dronamraju
fb2ff9fa72 powerpc/smp: Expose die_id and die_cpumask
>From Power10 processors onwards, each chip has 2 hemispheres. For LPARs
running on PowerVM Hypervisor, hypervisor determines the allocation of
CPU groups to each LPAR, resulting in two LPARs with the same number of
CPUs potentially having different numbers of CPUs from each hemisphere.
Additionally, it is not feasible to ascertain the hemisphere based
solely on the CPU number.

Users wishing to assign their workload to all CPUs, or a subset of CPUs
within a specific hemisphere, encounter difficulties in identifying the
cpumask. To address this, it is proposed to expose hemisphere
information as a die in sysfs. This aligns with other architectures
and facilitates the identification of CPUs within the same hemisphere.
Tools such as lstopo can also access this information.

Please note: The hypervisor reveals the locality of the CPUs to
hemispheres only in dedicated mode. Consequently, in systems where
hemisphere information is unavailable, such as shared LPARs, the
die_cpus information in sysfs will mirror package_cpus, with
die_id set to -1.

Without this change.
$ grep . /sys/devices/system/cpu/cpu16/topology/{die*,package*} 2>/dev/null
/sys/devices/system/cpu/cpu16/topology/package_cpus:000000,000000ff,ffff0000
/sys/devices/system/cpu/cpu16/topology/package_cpus_list:16-39

With this change.
$ grep . /sys/devices/system/cpu/cpu16/topology/{die*,package*} 2>/dev/null
/sys/devices/system/cpu/cpu16/topology/die_cpus:000000,00000000,00ff0000
/sys/devices/system/cpu/cpu16/topology/die_cpus_list:16-23
/sys/devices/system/cpu/cpu16/topology/die_id:2
/sys/devices/system/cpu/cpu16/topology/package_cpus:000000,000000ff,ffff0000
/sys/devices/system/cpu/cpu16/topology/package_cpus_list:16-39

snipped lstopo-no-graphics o/p
  Group0 L#0 (total=8747584KB)
    Package L#0 (total=3564096KB CPUModel="POWER10 (architected), altivec supported" CPURevision="2.0 (pvr 0080 0200)")
      NUMANode L#0 (P#0 local=3564096KB total=3564096KB)
      Die L#0 (P#0)
        Core L#0 (P#0)
<snipped>
    Package L#1 (total=5183488KB CPUModel="POWER10 (architected), altivec supported" CPURevision="2.0 (pvr 0080 0200)")
      NUMANode L#1 (P#1 local=5183488KB total=5183488KB)
      Die L#2 (P#2)
        Core L#2 (P#16)
          L3Cache L#4 (size=4096KB linesize=128 ways=16)
            L2Cache L#4 (size=1024KB linesize=128 ways=8)
              L1dCache L#4 (size=32KB linesize=128 ways=8)
                L1iCache L#4 (size=48KB linesize=128 ways=6)
                  PU L#16 (P#16)
                  PU L#17 (P#18)
                  PU L#18 (P#20)
                  PU L#19 (P#22)
          L3Cache L#5 (size=4096KB linesize=128 ways=16)
            L2Cache L#5 (size=1024KB linesize=128 ways=8)
              L1dCache L#5 (size=32KB linesize=128 ways=8)
                L1iCache L#5 (size=48KB linesize=128 ways=6)
                  PU L#20 (P#17)
                  PU L#21 (P#19)
                  PU L#22 (P#21)
                  PU L#23 (P#23)
      Die L#3 (P#3)
        Core L#3 (P#24)
          L3Cache L#6 (size=4096KB linesize=128 ways=16)
            L2Cache L#6 (size=1024KB linesize=128 ways=8)
              L1dCache L#6 (size=32KB linesize=128 ways=8)
                L1iCache L#6 (size=48KB linesize=128 ways=6)
                  PU L#24 (P#24)
                  PU L#25 (P#26)
                  PU L#26 (P#28)
                  PU L#27 (P#30)
          L3Cache L#7 (size=4096KB linesize=128 ways=16)
            L2Cache L#7 (size=1024KB linesize=128 ways=8)
              L1dCache L#7 (size=32KB linesize=128 ways=8)
                L1iCache L#7 (size=48KB linesize=128 ways=6)
                  PU L#28 (P#25)
                  PU L#29 (P#27)
                  PU L#30 (P#29)
                  PU L#31 (P#31)
        Core L#4 (P#32)
          L3Cache L#8 (size=4096KB linesize=128 ways=16)
            L2Cache L#8 (size=1024KB linesize=128 ways=8)
              L1dCache L#8 (size=32KB linesize=128 ways=8)
                L1iCache L#8 (size=48KB linesize=128 ways=6)
                  PU L#32 (P#32)
                  PU L#33 (P#34)
                  PU L#34 (P#36)
                  PU L#35 (P#38)
          L3Cache L#9 (size=4096KB linesize=128 ways=16)
            L2Cache L#9 (size=1024KB linesize=128 ways=8)
              L1dCache L#9 (size=32KB linesize=128 ways=8)
                L1iCache L#9 (size=48KB linesize=128 ways=6)
                  PU L#36 (P#33)
                  PU L#37 (P#35)
                  PU L#38 (P#37)
                  PU L#39 (P#39)
  Group0 L#1 (total=7736896KB)
    Package L#2 (total=5170880KB CPUModel="POWER10 (architected), altivec supported" CPURevision="2.0 (pvr 0080 0200)")
      NUMANode L#2 (P#2 local=5170880KB total=5170880KB)
      Die L#4 (P#4)
<snipped>

Reviewed-by: Shrikanth Hegde <sshegde@linux.ibm.com>
Signed-off-by: Srikar Dronamraju <srikar@linux.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20251112074859.814087-1-srikar@linux.ibm.com
2025-11-14 11:12:56 +05:30
Mikhail Kshevetskiy
1c0608d860
clk: en7523: Add reset-controller support for EN7523 SoC
Introduce reset API support to EN7523 clock driver. EN7523 uses the
same reset logic as EN7581, so just reuse existing code.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 20:05:13 -08:00
Mikhail Kshevetskiy
9476435092
dt-bindings: clock: airoha: Add reset support to EN7523 clock binding
Introduce reset capability to EN7523 device-tree clock binding
documentation.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 20:05:12 -08:00
Jun Nie
5978864e34 drm/msm/dpu: support plane splitting in quad-pipe case
The content of every half of screen is sent out via one interface in
dual-DSI case. The content for every interface is blended by a LM
pair in quad-pipe case, thus a LM pair should not blend any content
that cross the half of screen in this case. Clip plane into pipes per
left and right half screen ROI if topology is quad pipe case.

The clipped rectangle on every half of screen is futher handled by two
pipes if its width exceeds a limit for a single pipe.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/675416/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-9-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:58:31 +02:00
Jun Nie
cf63d61337 drm/msm/dpu: support SSPP assignment for quad-pipe case
Currently, SSPPs are assigned to a maximum of two pipes. However,
quad-pipe usage scenarios require four pipes and involve configuring
two stages. In quad-pipe case, the first two pipes share a set of
mixer configurations and enable multi-rect mode when certain
conditions are met. The same applies to the subsequent two pipes.

Assign SSPPs to the pipes in each stage using a unified method and
to loop the stages accordingly.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/675414/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-8-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:58:31 +02:00
Jun Nie
c11684cce9 drm/msm/dpu: blend pipes per mixer pairs config
Currently, only 2 pipes are used at most for a plane. A stage structure
describes the configuration for a mixer pair. So only one stage is needed
for current usage cases. The quad-pipe case will be added in future and 2
stages are used in the case. So extend the stage to an array with array
size STAGES_PER_PLANE and blend pipes per mixer pair with configuration in
the stage structure.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675412/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-7-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
aed7564142 drm/msm/dpu: Use dedicated WB number definition
Currently MAX_CHANNELS_PER_ENC is defined as 2, because 2 channels are
supported at most in one encoder. The case of 4 channels per encoder is
to be added. To avoid breaking current WB usage case, use dedicated WB
definition before 4 WB usage case is supported in future.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675410/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-6-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
5d45171e26 drm/msm/dpu: split PIPES_PER_STAGE definition per plane and mixer
The stage contains configuration for a mixer pair. Currently the plane
supports just one stage and 2 pipes. Quad-pipe support will require
handling 2 stages and 4 pipes at the same time. In preparation for that
add a separate define, PIPES_PER_PLANE, to denote number of pipes that
can be used by the plane.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675408/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-5-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
fb4c972b63 drm/msm/dpu: handle pipes as array
There are 2 pipes in a drm plane at most currently, while 4 pipes are
required for quad-pipe case. Generalize the handling to pipe pair and
ease handling to another pipe pair later. Store pipes in array with
removing dedicated r_pipe.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675406/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-4-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
2c94547e0c drm/msm/dpu: Add pipe as trace argument
Add pipe as trace argument in trace_dpu_crtc_setup_mixer() to ease
converting pipe into pipe array later.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675404/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-3-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
e4f87fdd91 drm/msm/dpu: bind correct pingpong for quad pipe
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675402/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-2-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Jun Nie
74c4efe691 drm/msm/dpu: fix mixer number counter on allocation
Current code only supports usage cases with one pair of mixers at
most. To support quad-pipe usage case, two pairs of mixers need to
be reserved. The lm_count for all pairs is cleared if a peer
allocation fails in current implementation. Reset the current lm_count
to an even number instead of completely clearing it. This prevents all
pairs from being cleared in cases where multiple LM pairs are needed.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/675400/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-1-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:56:59 +02:00
Christophe JAILLET
762dd3eb0c drm/msm/dpu: Remove dead-code in dpu_encoder_helper_reset_mixers()
'mixer' is only zeroed and is not use. Remove it.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Acked-By: Mahesh Bharadwaj Kannan <mahesh.kannan@oss.qualcomm.com>
Fixes: ae4d721ce1 ("drm/msm/dpu: add an API to reset the encoder related hw blocks")
Patchwork: https://patchwork.freedesktop.org/patch/679854/
Link: https://lore.kernel.org/r/8e3b2fbbf5440aa219feb667f5423c7479eb2656.1760040536.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-11-14 05:51:39 +02:00
Stephen Boyd
7ee9719771 Samsung SoC clock drivers changes for 6.19
1. ExynosAutov920: add support for additional clock controllers (M2M and
    MFC).
 
 2. Few more cleanups and new bindings.
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Merge tag 'samsung-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung

Pull more Samsung clk driver updates from Krzysztof Kozlowski:

 - ExynosAutov920: add support for additional clock controllers (M2M and
   MFC)

* tag 'samsung-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  clk: samsung: clk-pll: simplify samsung_pll_lock_wait()
  clk: samsung: exynosautov920: add block mfc clock support
  clk: samsung: exynosautov920: add clock support
  dt-bindings: clock: exynosautov920: add mfc clock definitions
  dt-bindings: clock: exynosautov920: add m2m clock definitions
  dt-bindings: clock: google,gs101-clock: add power-domains
2025-11-13 19:49:32 -08:00
Stephen Boyd
44244194e1 Samsung SoC firmware/clock drivers for v6.19
Extend Samsung ACPM (Alive Clock and Power Manager) firmware drivers:
 1. Add support for passing DVFS (Dynamic Voltage and Frequency) messages
    to configure the clocks in ACPM device.
 
 2. Add Exynos ACPM clock driver, which exposes to Linux several clocks
    handled by the ACPM (firmware).
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Merge tag 'samsung-drivers-firmware-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung

Pull Samsung clk driver updates from Krzysztof Kozlowski:

Extend Samsung ACPM (Alive Clock and Power Manager) firmware drivers:

 - Add support for passing DVFS (Dynamic Voltage and Frequency) messages
   to configure the clocks in ACPM device.
 - Add Exynos ACPM clock driver, which exposes to Linux several clocks
   handled by the ACPM (firmware)

* tag 'samsung-drivers-firmware-clk-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  firmware: exynos-acpm: add empty method to allow compile test
  MAINTAINERS: add ACPM clock bindings and driver
  clk: samsung: add Exynos ACPM clock driver
  firmware: exynos-acpm: register ACPM clocks pdev
  firmware: exynos-acpm: add DVFS protocol
  dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
2025-11-13 19:37:27 -08:00
Diogo Ivo
52075d2c75 platform/chrome: sensorhub: Support devices without FIFO_INT_ENABLE
Some devices (such as Smaug) report having MOTION_SENSE_FIFO but do not
support controlling the behaviour of the FIFO interrupt via the
FIFO_INT_ENABLE command and in these cases the interrupt is always
enabled. However, currently the code assumes that if MOTION_SENSE_FIFO
is supported then so is FIFO_INT_ENABLE, and when it tries to enable
the interrupt via this command and an unsupported device reports a
failure it then propagates this into failing the sensors probe.

Interpret the return value -EINVAL as a device where FIFO_INT_ENABLE is
not present and the interrupt is always enabled.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Link: https://lore.kernel.org/r/20251112-diogo-smaug_ec_sensorhub-v1-1-f71d4e9eb9d4@tecnico.ulisboa.pt
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2025-11-14 02:57:32 +00:00
Encrow Thorne
2e12d91cbf
clk: spacemit: fix comment typo
Fix incorrect comment to match the filename.

Reviewd-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Encrow Thorne <jyc0019@gmail.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 18:19:51 -08:00
Adrian Barnaś
fa3542e822
clk: keystone: Fix discarded const qualifiers
Add const qualifiers to the pointers returned from 'container_of' macro
to prevent breaking the const promise on const struct pointers from
parameters.

Once you have a mutable container structure pointer, you can change
structure fields through it, which violates the const guarantee.

Signed-off-by: Adrian Barnaś <abarnas@google.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-11-13 18:16:09 -08:00