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1,308,809 commits

Author SHA1 Message Date
Siddharth Vadapalli
f43ec89bbc arm64: dts: ti: k3-j7200-evm: Add overlay for PCIE1 Endpoint Mode
Add overlay to enable the PCIE1 instance of PCIe on J7200-EVM in
Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20241001093426.3401765-1-s-vadapalli@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 22:18:32 +05:30
Judith Mendez
14afef2333 arm64: dts: ti: k3-am62-main: Update otap/itap values
Update itap/itap values according to device datasheet [0].

Now that we have fixed timing issues for am62x [1], lets
change the otap/itap values back according to the device
datasheet.

[0] https://www.ti.com/lit/ds/symlink/am625.pdf
[1] https://lore.kernel.org/linux-mmc/20240913185403.1339115-1-jm@ti.com/

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bhavya Kapoor <b-kapoor@ti.com>
Link: https://lore.kernel.org/r/20240924195335.546900-1-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 22:15:02 +05:30
Ayush Singh
1e5e2ff462 arm64: dts: ti: k3-am625-beagleplay: Enable MikroBUS PWM
Add pinmux for PWM functionality of MikroBUS PWM pin and enable the pwm
controller.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
Link: https://lore.kernel.org/r/20241016-beagleplay-pwm-v1-1-245ae88859bc@beagleboard.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 22:14:43 +05:30
Francesco Dolcini
2213ca5199 arm64: dts: ti: k3-am62-verdin: Fix SD regulator startup delay
The power switch used to power the SD card interface might have
more than 2ms turn-on time, increase the startup delay to 20ms to
prevent failures.

Fixes: 316b80246b ("arm64: dts: ti: add verdin am62")
Cc: stable@vger.kernel.org
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20241024130628.49650-1-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 22:01:12 +05:30
João Paulo Gonçalves
ab53b8c0ac arm64: dts: ti: k3-am62-verdin: Fix SoM ADC compatible
Fix Verdin AM62 on-SOM ADC compatible. Currently the hardware is not
correctly described in the DT, use the correct TI TLA2024 compatible that
matches what is assembled on the board.

The "ti,tla2024" compatible was introduced in Linux v5.19 and Verdin AM62
support was introduced in Linux v6.5.

The new DTB will not work on kernel older than v5.19, but this seems
unlikely to happen. U-Boot does not use the ADC node and a known Android 14
out-of-tree port uses a Linux Kernel 6.1.

With that said, despite this being a breaking change, it seems fair to
to not expect any regression because of it.

Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
Link: https://lore.kernel.org/r/20241015113334.246110-1-jpaulo.silvagoncalves@gmail.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 21:59:58 +05:30
Francesco Dolcini
4a050c4ee1 arm64: dts: ti: k3-am625-verdin: add TPM device
Add on-SOM TPM device to the device tree file.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20241018170436.80010-1-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:54:52 +05:30
Anurag Dutta
891874f015 arm64: dts: ti: k3-j721s2: Fix clock IDs for MCSPI instances
The clock IDs for multiple MCSPI instances across wakeup domain
in J721s2 are incorrect when compared with documentation [1]. Fix the
clock IDs to their appropriate values.

[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html

Fixes: 04d7cb647b ("arm64: dts: ti: k3-j721s2: Add MCSPI nodes")

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://lore.kernel.org/r/20241023104532.3438851-4-a-dutta@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:50:40 +05:30
Anurag Dutta
ab09a68f3b arm64: dts: ti: k3-j721e: Fix clock IDs for MCSPI instances
The clock IDs for multiple MCSPI instances across wakeup domain
in J721e are incorrect when compared with documentation [1]. Fix
the clock ids to their appropriate values.

[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html

Fixes: 76aa309f9f ("arm64: dts: ti: k3-j721e: Add MCSPI nodes")

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://lore.kernel.org/r/20241023104532.3438851-3-a-dutta@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:50:40 +05:30
Anurag Dutta
3a47e38167 arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances
The clock IDs for multiple MCSPI instances across wakeup as
well as main domain in J7200 are incorrect when compared with
documentation [1]. This results in kernel crashes when the said
instances are enabled. Fix the clock ids to their appropriate
values.

[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html

Fixes: 8f6c475f4c ("arm64: dts: ti: k3-j7200: Add MCSPI nodes")

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Link: https://lore.kernel.org/r/20241023104532.3438851-2-a-dutta@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:50:40 +05:30
Jared McArthur
b7af8b4acb arm64: dts: ti: k3-j7200: Fix register map for main domain pmx
Commit 0d0a0b4413 ("arm64: dts: ti: k3-j7200: fix main pinmux
range") split the main_pmx0 into two nodes: main_pmx0 and main_pmx1
due to a non-addressable region, but incorrectly represented the
ranges. As a result, the memory map for the pinctrl is incorrect. Fix
this by introducing the correct ranges.

The ranges are taken from the J7200 TRM [1] (Table 5-695. CTRL_MMR0
Registers).

Padconfig starting addresses and ranges:
-  0 to 66: 0x11c000, 0x10c
-       68: 0x11c110, 0x004
- 71 to 73: 0x11c11c, 0x00c
- 89 to 90: 0x11c164, 0x008

The datasheet [2] doesn't contain PADCONFIG63 (Table 6-106. Pin
Multiplexing), but the pin is necessary for enabling the MMC1 CLKLP
pad loopback and should be included in the pinmux register map.

Due to the change in pinmux node addresses, change the pinmux node for
the USB0_DRVVBUS pin to main_pmx2. The offset has not changed since the
new main_pmx2 node has the same base address and range as the original
main_pmx1 node. All other pinmuxing done within J7200 dts or dtso files
only uses main_pmx0 which has not changed.

[1] https://www.ti.com/lit/pdf/spruiu1
[2] https://www.ti.com/lit/gpn/dra821u

Fixes: 0d0a0b4413 ("arm64: dts: ti: k3-j7200: fix main pinmux range")
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Jared McArthur <j-mcarthur@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20240926102533.398139-1-a-limaye@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:49:16 +05:30
Manorit Chawdhry
bdb543b166 arm64: dts: ti: k3-j7200-evm*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to:
- pmic regulator for enabling AVS Support
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, hbmc for enabling various bootmodes.

Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-12-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:24 +05:30
Manorit Chawdhry
e45355835c arm64: dts: ti: k3-j721e-sk*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to:
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc1, usb0, usb1, ospi0 for enabling various bootmodes.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-11-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:24 +05:30
Manorit Chawdhry
fbdb8aa4ea arm64: dts: ti: k3-j721e-evm*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to:
- main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, ospi1, hbmc for enabling various bootmodes.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-10-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:24 +05:30
Manorit Chawdhry
781cb8f1ad arm64: dts: ti: k3-am68-sk*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to:
- main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc1, ospi0 for enabling various bootmodes.
- eeprom for board detection

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-9-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
15a432a4a0 arm64: dts: ti: k3-j721s2-evm*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to:
- pmic regulator for enabling AVS Support
- main_uart8, mcu_uart0(DM), wkup_uart0(TIFS) for Traces
- mmc0, mmc1, usb0, ospi0, ospi1 for enabling various bootmodes.

Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-8-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
49b0b706af arm64: dts: ti: k3-j784s4-j742s2-evm-common: Remove parent nodes bootph-*
Adding bootph properties on leaf nodes imply that they are applicable to
the parent nodes as well. Bootloaders can derive the parent nodes when
bootph is available in the leaf nodes.

Remove the bootph-* properties from parent nodes as they are redundant.

Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-7-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
b903ab269e arm64: dts: ti: k3-j7200: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
  System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- hbmc_mux for enabling Hyperflash support
- ESM nodes for enabling ESM support.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support

Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-6-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
dd2c7aeca3 arm64: dts: ti: k3-j721e: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
  System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- hbmc_mux for enabling Hyperflash support
- ESM nodes for enabling ESM support.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-5-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
83ab86a441 arm64: dts: ti: k3-j721s2: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to
utilise them.

Following adds bootph-* to
- System controller nodes that allow controlling power domain, clocks, etc.
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
  System Controller
- mcu_ringacc/mcu_udmap for DMA to SMS
- chipid for detection soc information.
- mcu_timer0 for bootloader tick-timer.
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support

Reviewed-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-4-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
f54d577df4 arm64: dts: ti: k3-j784s4: Add bootph-* properties
The following nodes are being used in the bootloaders. Adds bootph-*
properties to the leaf nodes to enable bootloaders to utilise them.

Following adds bootph-* to
- secure_proxy_sa3/secure_proxy_main mboxes for communication with
  System Controller
- wkup_vtm for enabling Adaptive voltage scaling(AVS) support

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-3-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
c4fbee5eb6 arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Remove parent nodes bootph-*
Adding bootph properties on leaf nodes imply that they are applicable to
the parent nodes as well. Bootloaders can derive the parent nodes when
bootph is available in the leaf nodes.

Remove the bootph-* properties from parent nodes as they are redundant.

Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-2-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
Manorit Chawdhry
1d381865ad arm64: dts: ti: k3-j784s4-j742s2-mcu-wakeup: Move bootph from mcu_timer1 to mcu_timer0
Bootloader are using mcu_timer0 instead of mcu_timer1. Adds bootph to
mcu_timer0 instead of mcu_timer1.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-1-2af90e3a4fe7@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-28 20:47:23 +05:30
MD Danish Anwar
30a9a1a26b arm64: dts: ti: k3-am64: Add ti,pa-stats property
Add ti,pa-stats phandles to k3-am64x-evm.dts. This is a phandle to
PA_STATS syscon regmap and will be used to dump IET related statistics
for ICSSG Driver

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20241014074527.1121613-5-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:44:54 +05:30
MD Danish Anwar
007f3e72c9 arm64: dts: ti: k3-am64-main: Add ti,pruss-pa-st node
Add pa-stats nodes to k3-am64-main.dtsi for all ICSSG instances.
This is needed to dump IET related statistics for ICSSG Driver.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20241014074527.1121613-4-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:44:54 +05:30
MD Danish Anwar
6fb909467d arm64: dts: ti: k3-am654-icssg2: Add ti,pa-stats property
Add ti,pa-stats phandles to AM65x device trees. This is a phandle to
PA_STATS syscon regmap and will be used to dump IET related statistics
for ICSSG Driver

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Link: https://lore.kernel.org/r/20241014074527.1121613-3-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:44:54 +05:30
MD Danish Anwar
aef4959ee0 arm64: dts: ti: k3-am65-main: Add ti,pruss-pa-st node
Add pa-stats nodes to k3-am65-main.dtsi for all ICSSG instances.
This is needed to dump IET related statistics for ICSSG Driver.

Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20241014074527.1121613-2-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:44:54 +05:30
Nathan Morrisson
e6c01aeb22 arm64: dts: ti: k3-am62a7-phyboard-lyra-rdk: Update ethernet internal delay
Update the RGMII delay to 2.5ns to improve performance. We use an
additional mapper board for the am62a7 phyBOARD Lyra which makes this
delay necessary.

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241004221049.1155022-1-nmorrisson@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:43:44 +05:30
Nathan Morrisson
c33a0a02a2 arm64: dts: ti: k3-am62x-phyboard-lyra: Drop unnecessary McASP AFIFOs
Drop the McASP AFIFOs for better audio latency. This adds back a
change that was lost while refactoring the device tree.

Fixes: 554dd562a5 ("arm64: dts: ti: k3-am625-phyboard-lyra-rdk: Drop McASP AFIFOs")
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241002224754.2917895-1-nmorrisson@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:54 +05:30
Judith Mendez
25da98eb39 arm64: dts: ti: k3-am64x-sk: Enable eQEP
There are 3 instances of eQEP on AM64x. Only EQEP0 signals
can be routed to the user expansion so enable only EQEP0
in k3-am642-sk.dts.

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240924220700.886313-6-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:27 +05:30
Judith Mendez
78b918b58e arm64: dts: ti: k3-am64-main: Add eQEP nodes
Add eQEP device tree nodes 0-2 for AM642 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240924220700.886313-5-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:27 +05:30
Judith Mendez
0f4a318ee6 arm64: dts: ti: k3-am62p-main: Add eQEP nodes
Add eQEP device tree nodes 0-2 for AM62P5 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240924220700.886313-4-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:27 +05:30
Judith Mendez
36370ccf93 arm64: dts: ti: k3-am62a-main: Add eQEP nodes
Add eQEP device tree nodes 0-2 for AM62A7 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240924220700.886313-3-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:27 +05:30
Judith Mendez
79e668d0d9 arm64: dts: ti: k3-am62-main: Add eQEP nodes
Add eQEP device tree nodes 0-2 for AM625 SoC.

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240924220700.886313-2-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:27 +05:30
Hari Nagalla
8e77fc1fbb arm64: dts: ti: k3-am642-evm: Add M4F remoteproc node
The AM64x SoCs of the TI K3 family have a Cortex M4F core in the MCU
domain. This core can be used by non safety applications as a remote
processor. When used as a remote processor with virtio/rpmessage IPC,
two carveout reserved memory nodes are needed. The first region is used
as a DMA pool for the rproc device, and the second region will furnish
the static carveout regions for the firmware memory.

The current carveout addresses and sizes are defined statically for
each rproc device. The M4F processor does not have an MMU, and as such
requires the exact memory used by the firmware to be set-aside.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241003170118.24932-6-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:07 +05:30
Hari Nagalla
6e36e62003 arm64: dts: ti: k3-am642-sk: Add M4F remoteproc node
The AM64x SoCs of the TI K3 family have a Cortex M4F core in the MCU
domain. This core can be used by non safety applications as a remote
processor. When used as a remote processor with virtio/rpmessage IPC,
two carveout reserved memory nodes are needed. The first region is used
as a DMA pool for the rproc device, and the second region will furnish
the static carveout regions for the firmware memory.

The current carveout addresses and sizes are defined statically for
each rproc device. The M4F processor does not have an MMU, and as such
requires the exact memory used by the firmware to be set-aside.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241003170118.24932-5-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:07 +05:30
Hari Nagalla
ef1876ff76 arm64: dts: ti: k3-am64: Add M4F remoteproc node
The AM64x SoCs of the TI K3 family have a Cortex M4F core in the MCU
domain. This core can be used by non safety applications as a remote
processor. When used as a remote processor with virtio/rpmessage IPC,
two carveout reserved memory nodes are needed.

Disable by default as this node is not complete until mailbox data
is provided in the board level DT.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241003170118.24932-4-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:07 +05:30
Hari Nagalla
23a6aba92e arm64: dts: ti: k3-am625-sk: Add M4F remoteproc node
The AM62x SoCs of the TI K3 family have a Cortex M4F core in the MCU
domain. This core can be used by non safety applications as a remote
processor. When used as a remote processor with virtio/rpmessage IPC,
two carveout reserved memory nodes are needed. The first region is used
as a DMA pool for the rproc device, and the second region will furnish
the static carveout regions for the firmware memory.

The current carveout addresses and sizes are defined statically for
each rproc device. The M4F processor does not have an MMU, and as such
requires the exact memory used by the firmware to be set-aside.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241003170118.24932-3-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:07 +05:30
Hari Nagalla
be4bac3bcb arm64: dts: ti: k3-am62: Add M4F remoteproc node
The AM62x SoCs of the TI K3 family have a Cortex M4F core in the MCU
domain. This core can be used by non safety applications as a remote
processor. When used as a remote processor with virtio/rpmessage IPC,
two carveout reserved memory nodes are needed.

Disable by default as this node is not complete until mailbox data
is provided in the board level DT.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241003170118.24932-2-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 22:02:07 +05:30
Garrett Giordano
151ed40a4f Revert "arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz"
We now configure the a53_opp_table to include a 1.4 GHz node and set our
VDD_CORE to 0.85v in the k3-am62-phycore-som.dtsi. This change is to
match our PMIC which is now set to output 0.85v by default.

This reverts commit 7a5775a3da.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Link: https://lore.kernel.org/r/20241001071916.1362213-3-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 21:51:20 +05:30
Garrett Giordano
bc3552d675 arm64: dts: ti: am62-phycore-som: Increase cpu frequency to 1.4 GHz
The am625 is capable of running at 1.4 GHz when VDD_CORE is increased
from 0.75V to 0.85V. Here we add a 1.4 GHz node to the a53_opp_table and
increase the VDD_CORE voltage accordingly.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20241001071916.1362213-2-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-20 21:51:20 +05:30
Manorit Chawdhry
13dc96a527 arm64: dts: ti: Add support for J742S2 EVM board
J742S2 EVM board is designed for TI J742S2 SoC. It supports the following
interfaces:
* 16 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x1 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
  UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances

Link: https://www.ti.com/lit/ug/sprujd8/sprujd8.pdf (EVM user guide)
Link: https://www.ti.com/lit/zip/SPAC001 (Schematics)
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-5-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-13 03:33:25 +05:30
Manorit Chawdhry
38fd90a3e1 arm64: dts: ti: Introduce J742S2 SoC family
This device is a subset of J784S4 and shares the same memory map and
thus the nodes are being reused from J784S4 to avoid duplication.

Here are some of the salient features of the J742S2 automotive grade
application processor:

The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive, ADAS and industrial
applications requiring AI at the network edge. This SoC extends the K3
Jacinto 7 family of SoCs with focus on raising performance and
integration while providing interfaces, memory architecture and compute
performance for multi-sensor, high concurrency applications.

Some changes that this devices has from J784S4 are:
* 4x Cortex-A72 vs 8x Cortex-A72
* 3x C7x DSP vs 4x C7x DSP
* 4 port ethernet switch vs 8 port ethernet switch

( Refer Table 2-1 for Device comparison with J7AHP )

Link: https://www.ti.com/lit/pdf/spruje3 (TRM)
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-4-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-13 03:33:25 +05:30
Manorit Chawdhry
9c65033884 dt-bindings: arm: ti: Add bindings for J742S2 SoCs and Boards
Add devicetree bindings for J742S2 family of devices.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-3-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-13 03:33:24 +05:30
Manorit Chawdhry
39b623c05c arm64: dts: ti: Refactor J784s4-evm to a common file
Refactor J784s4-evm to a common file which uses the
superset device to allow reuse in j742s2-evm which uses the subset part.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-2-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-13 03:33:24 +05:30
Manorit Chawdhry
9cc161a450 arm64: dts: ti: Refactor J784s4 SoC files to a common file
Refactor J784s4 SoC files to a common file which uses the
superset device to allow reuse in j742s2-evm which uses the subset part.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240902-b4-upstream-j742s2-v6-1-6a7aa2736797@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-10-13 03:33:24 +05:30
Linus Torvalds
9852d85ec9 Linux 6.12-rc1 v6.12-rc1 2024-09-29 15:06:19 -07:00
Linus Torvalds
3f749befb0 x86: kvm: fix build error
The cpu_emergency_register_virt_callback() function is used
unconditionally by the x86 kvm code, but it is declared (and defined)
conditionally:

  #if IS_ENABLED(CONFIG_KVM_INTEL) || IS_ENABLED(CONFIG_KVM_AMD)
  void cpu_emergency_register_virt_callback(cpu_emergency_virt_cb *callback);
  ...

leading to a build error when neither KVM_INTEL nor KVM_AMD support is
enabled:

  arch/x86/kvm/x86.c: In function ‘kvm_arch_enable_virtualization’:
  arch/x86/kvm/x86.c:12517:9: error: implicit declaration of function ‘cpu_emergency_register_virt_callback’ [-Wimplicit-function-declaration]
  12517 |         cpu_emergency_register_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  arch/x86/kvm/x86.c: In function ‘kvm_arch_disable_virtualization’:
  arch/x86/kvm/x86.c:12522:9: error: implicit declaration of function ‘cpu_emergency_unregister_virt_callback’ [-Wimplicit-function-declaration]
  12522 |         cpu_emergency_unregister_virt_callback(kvm_x86_ops.emergency_disable_virtualization_cpu);
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fix the build by defining empty helper functions the same way the old
cpu_emergency_disable_virtualization() function was dealt with for the
same situation.

Maybe we could instead have made the call sites conditional, since the
callers (kvm_arch_{en,dis}able_virtualization()) have an empty weak
fallback.  I'll leave that to the kvm people to argue about, this at
least gets the build going for that particular config.

Fixes: 590b09b1d8 ("KVM: x86: Register "emergency disable" callbacks when virt is enabled")
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>
Cc: Kai Huang <kai.huang@intel.com>
Cc: Chao Gao <chao.gao@intel.com>
Cc: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-09-29 14:47:33 -07:00
Linus Torvalds
e7ed343658 mhu-v3, omap2+ : fix kconfig dependencies
imx: use devie name instead of genereic imx_mu_chan as interrupt name
 qcom: enable sa8255p and qcs8300 ipc controllers
 bcm2835: Fix timeout during suspend mode
 mailbox: convert to use use of_property_match_string
 mediatek: enable mt8188
 spreadtrum: use devm_clk_get_enabled helpers
 rockchip: fix device-id typo
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Merge tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox

Pull mailbox updates from Jassi Brar:

 - fix kconfig dependencies (mhu-v3, omap2+)

 - use devie name instead of genereic imx_mu_chan as interrupt name
   (imx)

 - enable sa8255p and qcs8300 ipc controllers (qcom)

 - Fix timeout during suspend mode (bcm2835)

 - convert to use use of_property_match_string (mailbox)

 - enable mt8188 (mediatek)

 - use devm_clk_get_enabled helpers (spreadtrum)

 - fix device-id typo (rockchip)

* tag 'mailbox-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox:
  mailbox, remoteproc: omap2+: fix compile testing
  dt-bindings: mailbox: qcom-ipcc: Document QCS8300 IPCC
  dt-bindings: mailbox: qcom-ipcc: document the support for SA8255p
  dt-bindings: mailbox: mtk,adsp-mbox: Add compatible for MT8188
  mailbox: Use of_property_match_string() instead of open-coding
  mailbox: bcm2835: Fix timeout during suspend mode
  mailbox: sprd: Use devm_clk_get_enabled() helpers
  mailbox: rockchip: fix a typo in module autoloading
  mailbox: imx: use device name in interrupt name
  mailbox: ARM_MHU_V3 should depend on ARM64
2024-09-29 09:53:04 -07:00
Linus Torvalds
907537f570 i2c-for-6.12-rc1-additional_fixes
I2C host fixes for v6.12-rc1 (from Andi)
 
 The DesignWare driver now has the correct ENABLE-ABORT sequence,
 ensuring ABORT can always be sent when needed.
 
 In the SynQuacer controller we now check for PCLK as an optional
 clock, allowing ACPI to directly provide the clock rate.
 
 The recent KEBA driver required a dependency fix in Kconfig.
 
 The XIIC driver now has a corrected power suspend sequence.
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Merge tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:

 - fix DesignWare driver ENABLE-ABORT sequence, ensuring ABORT can
   always be sent when needed

 - check for PCLK in the SynQuacer controller as an optional clock,
   allowing ACPI to directly provide the clock rate

 - KEBA driver Kconfig dependency fix

 - fix XIIC driver power suspend sequence

* tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: xiic: Fix pm_runtime_set_suspended() with runtime pm enabled
  i2c: keba: I2C_KEBA should depend on KEBA_CP500
  i2c: synquacer: Deal with optional PCLK correctly
  i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled
2024-09-29 09:47:33 -07:00
Linus Torvalds
b81b78dacc dma-mapping fixes for Linux 6.12
- handle chained SGLs in the new tracing code (Christoph Hellwig)
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Merge tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping

Pull dma-mapping fix from Christoph Hellwig:

 - handle chained SGLs in the new tracing code (Christoph Hellwig)

* tag 'dma-mapping-6.12-2024-09-29' of git://git.infradead.org/users/hch/dma-mapping:
  dma-mapping: fix DMA API tracing for chained scatterlists
2024-09-29 09:35:10 -07:00