Commit graph

1,309,163 commits

Author SHA1 Message Date
Alex Deucher
7c1a2d8aba drm/amdgpu/gfx9: put queue resets behind a debug option
Pending extended validation.

Reviewed-and-tested-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-08-29 13:38:48 -04:00
Alex Deucher
a9b67c036c drm/amdgpu: add experimental resets debug flag
Add this flag to enable experimental resets for testing before they
are fully validated.

Reviewed-and-tested-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-08-29 13:38:36 -04:00
Fabio Estevam
0296f20c72 ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
There is no DAC connected to the SPI bus of the Elgin RV1108 R1 board.

There is a JG10309-01 LCD controlled via SPI though.

Properly describe it by adding the "elgin,jg10309-01" compatible
string.

Reported-by: Conor Dooley <conor.dooley@microchip.com>
Closes: https://lore.kernel.org/linux-arm-kernel/20240717-parrot-malt-83cc04bf6b36@spud/
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829113158.3324928-3-festevam@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 19:37:00 +02:00
Fangzhi Zuo
7745a1dee0 drm/amdgpu/display: Fix a mistake in revert commit
[why]
It is to fix in try_disable_dsc() due to misrevert of
commit 338567d176 ("drm/amd/display: Fix MST BW calculation Regression")

[How]
Fix restoring minimum compression bw by 'max_kbps', instead of native bw 'stream_kbps'

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-08-29 13:35:52 -04:00
Daniele Ceraolo Spurio
5ee2d63ca1 drm/xe/gsc: Add debugfs to print GSC info
This is useful for debug, in case something goes wrong with the GSC. The
info includes the version information and the current value of the HECI1
status registers.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-5-daniele.ceraolospurio@intel.com
2024-08-29 10:32:20 -07:00
Daniele Ceraolo Spurio
f7c2ea682d drm/xe/gsc: Track the platform in the compatibility version
The GSC compatibility version number is reset for each new platform. To
indicate this, the version includes a number that identifies the
platform (102 = MTL, 104 = LNL); this matches what happens for the
release version, where the major number also identifies a platform.

To make it clearer in our logs that the compatibility version is
specific to the platform, it is useful to include this platform number.
However, given that our binary names already include the platform, it is
not necessary to add this extra number there.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-4-daniele.ceraolospurio@intel.com
2024-08-29 10:32:19 -07:00
Daniele Ceraolo Spurio
7293859c51 drm/xe/gsc: Fix FW status if the firmware is already loaded
We set the FW status to "TRANSFERRED" after the load completes and to
"RUNNING"once we're done with proxy init, so do the same if we're trying
to re-load the FW and it is already loaded.

Note that there is no difference in driver behavior between the 2
states, but it's useful to be accurate when we dump the status for
debug.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-3-daniele.ceraolospurio@intel.com
2024-08-29 10:32:18 -07:00
Daniele Ceraolo Spurio
2160f6f6e3 drm/xe/gsc: Do not attempt to load the GSC multiple times
The GSC HW is only reset by driver FLR or D3cold entry. We don't support
the former at runtime, while the latter is only supported on DGFX, for
which we don't support GSC. Therefore, if GSC failed to load previously
there is no need to try again because the HW is stuck in the error state.

An assert has been added so that if we ever add DGFX support we'll know
we need to handle the D3 case.

v2: use "< 0" instead of "!= 0" in the FW state error check (Julia).

Fixes: dd0e89e5ed ("drm/xe/gsc: GSC FW load")
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: <stable@vger.kernel.org> # v6.8+
Reviewed-by: Julia Filipchuk <julia.filipchuk@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240828215158.2743994-2-daniele.ceraolospurio@intel.com
2024-08-29 10:32:17 -07:00
Piotr Wojtaszczyk
5d318b5959 dmaengine: Add dma router for pl08x in LPC32XX SoC
LPC32XX connects few of its peripherals to pl08x DMA thru a multiplexer,
this driver allows to route a signal request line thru the multiplexer for
given peripheral.

Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Link: https://lore.kernel.org/r/20240628152022.274405-1-piotr.wojtaszczyk@timesys.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:54:11 +05:30
Joy Zou
9542961494 dmaengine: fsl-edma: add edma src ID check at request channel
Check src ID to detect misuse of same src ID for multiple DMA channels.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240701070232.2519179-3-joy.zou@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:50:48 +05:30
Joy Zou
90d21f6e57 dmaengine: fsl-edma: change to guard(mutex) within fsl_edma3_xlate()
Introduce a scope guard to automatically unlock the mutex within
fsl_edma3_xlate() to simplify the code.

Prepare to add source ID checks in the future.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240701070232.2519179-2-joy.zou@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:50:48 +05:30
Arnd Bergmann
ae04342b52 dmaengine: avoid non-constant format string
Using an arbitrary string as a printf-style format can be a security
problem if that string contains % characters, as the optionalal
-Wformat-security flag points out:

drivers/dma/dmaengine.c: In function '__dma_async_device_channel_register':
drivers/dma/dmaengine.c:1073:17: error: format not a string literal and no format arguments [-Werror=format-security]
 1073 |                 dev_set_name(&chan->dev->device, name);
      |                 ^~~~~~~~~~~~

Change this newly added instance to use "%s" as the format instead to
pass the actual name.

Fixes: 10b8e0fd3f ("dmaengine: add channel device name to channel registration")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240719102319.546622-1-arnd@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:49:53 +05:30
Fabio Estevam
39dc2a4929 dmaengine: imx-dma: Remove i.MX21 support
i.MX21 support has been removed since commit 4b563a0666 ("ARM: imx:
Remove imx21 support").

Remove the i.MX21 support inside the imx-dma driver.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20240806021744.2524233-1-festevam@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:49:07 +05:30
Fabio Estevam
2ccf482268 dt-bindings: dma: fsl,imx-dma: Document the DMA clocks
Document the IPG and AHB clocks that are needed by the DMA hardware
as required properties.

It is not possible to have DMA functional without the DMA clocks
being turned on.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240807170517.64290-1-festevam@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:48:47 +05:30
Keguang Zhang
e06c432312 dmaengine: Loongson1: Add Loongson-1 APB DMA driver
Add APB DMA driver for Loongson-1 SoCs.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Link: https://lore.kernel.org/r/20240809-loongson1-dma-v12-2-d9469a4a6b85@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:47:24 +05:30
Keguang Zhang
7ea270bb93 dt-bindings: dma: Add Loongson-1 APB DMA
Add devicetree binding document for Loongson-1 APB DMA.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Link: https://lore.kernel.org/r/20240809-loongson1-dma-v12-1-d9469a4a6b85@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:47:24 +05:30
Abin Joseph
13113f750a dmaengine: zynqmp_dma: Add support for AMD Versal Gen 2 DMA IP
ZynqMP DMA IP and AMD Versal Gen 2 DMA IP are similar but have different
interrupt register offset. Create a dedicated compatible string to
support Versal Gen 2 DMA IP with Irq register offset for interrupt
Enable/Disable/Status/Mask functionality.

Signed-off-by: Abin Joseph <abin.joseph@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/20240808100024.317497-3-abin.joseph@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:46:16 +05:30
Abin Joseph
36545c6a68 dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string
Add compatible string "amd,versal2-dma-1.0" to support AMD Versal Gen 2
platform.

AMD Versal Gen 2 has 8 LPD DMA IPs in PS that can be used as general
purpose DMAs which is designed to support memory to memory and memory to
IO buffer transfer. Versal Gen 2 DMA IP has different interrupt register
offset.

Signed-off-by: Abin Joseph <abin.joseph@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240808100024.317497-2-abin.joseph@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:46:16 +05:30
Saket Dumbre
9af32b4a25 ACPICA: Setup for ACPICA release 20240827
ACPICA commit 86c762afe5bf915e8101a0455513368e2a60dd80

Link: 86c762af
Signed-off-by: Saket Dumbre <saket.dumbre@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Saket Dumbre
dbd0ec3cf4 ACPICA: Allow for more flexibility in _DSM args
ACPICA commit fbb651249ced5e19cc9c4452fec1408f595aa702

To eliminate annoying driver-side warnings.

ASWG ECR to follow soon.

Link: fbb65124
Signed-off-by: Saket Dumbre <saket.dumbre@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Aleksandrs Vinarskis
a0a2459b79 ACPICA: iasl: handle empty connection_node
ACPICA commit 6c551e2c9487067d4b085333e7fe97e965a11625

Link: 6c551e2c
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Dave Jiang
6143f96166 ACPICA: HMAT: Add extended linear address mode to MSCIS
ACPICA commit aaa08569b81aa4d9ff59f91f00e589e98d499e6c

Redefine the 2 reserved bytes at offset 28 of Memory Side Cache Information
Structure as "Address Mode" and add defines of the new value.

    * 0 - Reserved (Unkown Address Mode)
    * 1 - Extended-linear (N direct-map aliases linearly mapped)
    * 2..65535 - Reserved (Unknown Address Mode)

Link: aaa08569
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Adam Lackorzynski
5506544dc2 ACPICA: Avoid warning for Dump Functions
ACPICA commit 6031b34b5dbabfaaebe80e57e8e415790b51d285

Only include the functions acpi_rs_dump_resource_list
and acpi_rs_dump_irq_list() if ACPI_DEBUGGER is defined, as
specified in the header.

This avoids the compiler warning by adding the ifdef for ACPI_DEBUGGER.

Link: 6031b34b
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Armin Wolf
dd067afe3f ACPICA: Add support for Windows 11 22H2 _OSI string
ACPICA commit f56218c4e4dc1d1f699662d0726ad9e7a0d58548

See: be9d1c211a

Link: f56218c4
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Armin Wolf
db0a507cb2 ACPICA: Update integer-to-hex-string conversions
ACPICA commit f2cb44f6deb6325a6b348b225fc82f565a870899

Add "0x" prefix for explicitly converted integers
and suppress leading zeros in such a case.
Provides compatibility with other ACPI implementations.

Link: f2cb44f6
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Armin Wolf
0e89a0fc55 ACPICA: Add support for supressing leading zeros in hex strings
ACPICA commit 86289439d9f8b9eda28c249da66ae230d6439491

Currently the leading_zeros argument has no effect when
converting hex integers. Fix that.

Link: 86289439
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Armin Wolf
76a09d941c ACPICA: Allow for supressing leading zeros when using acpi_ex_convert_to_ascii()
ACPICA commit 792a337104ce2c1729d33d76241b42b3214aa60f

Allow to specifiy wether leading zeros should be supressed
ot not when using acpi_ex_convert_to_ascii().

Link: 792a3371
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:04:22 +02:00
Fenghua Yu
4fecf944c0 dmaengine: idxd: Add new DSA and IAA device IDs for Diamond Rapids platform
A new DSA device ID, 0x1212, and a new IAA device ID, 0x1216, are
introduced for Diamond Rapids platform. Add the device IDs to the IDXD
driver.

The name "IAA" is used in new code instead of the old name "IAX".
However, the "IAX" naming (e.g., IDXD_TYPE_IAX) is retained for legacy
code compatibility.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240828233401.186007-3-fenghua.yu@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:34:06 +05:30
Fenghua Yu
f91f2a9879 dmaengine: idxd: Add a new DSA device ID for Granite Rapids-D platform
A new DSA device ID, 0x11fb, is introduced for the Granite Rapids-D
platform. Add the device ID to the IDXD driver.

Since a potential security issue has been fixed on the new device, it's
secure to assign the device to virtual machines, and therefore, the new
device ID will not be added to the VFIO denylist. Additionally, the new
device ID may be useful in identifying and addressing any other potential
issues with this specific device in the future. The same is also applied
to any other new DSA/IAA devices with new device IDs.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240828233401.186007-2-fenghua.yu@intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-08-29 22:34:05 +05:30
Armin Wolf
e6169a8ffe ACPICA: Fix memory leak if acpi_ps_get_next_field() fails
ACPICA commit 1280045754264841b119a5ede96cd005bc09b5a7

If acpi_ps_get_next_field() fails, the previously created field list
needs to be properly disposed before returning the status code.

Link: 12800457
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
[ rjw: Rename local variable to avoid compiler confusion ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:03:14 +02:00
Artur Paszkiewicz
6f039cc42f md/raid5: rename wait_for_overlap to wait_for_reshape
The only remaining uses of wait_for_overlap are related to reshape so
rename it accordingly.

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-4-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Artur Paszkiewicz
0e4aac7366 md/raid5: only add to wq if reshape is in progress
Now that actual overlaps are not handled on the wait_for_overlap wq
anymore, the remaining cases when we wait on this wq are limited to
reshape. If reshape is not in progress, don't add to the wq in
raid5_make_request() because add_wait_queue() / remove_wait_queue()
operations take a spinlock and cause noticeable contention when multiple
threads are submitting requests to the mddev.

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-3-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Artur Paszkiewicz
e6a03207b9 md/raid5: use wait_on_bit() for R5_Overlap
Convert uses of wait_for_overlap wait queue with R5_Overlap bit to
wait_on_bit() / wake_up_bit().

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-2-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Simon Trimmer
2186fe21e5 ALSA: hda/realtek: Autodetect Cirrus Logic companion amplifier bindings
We do not need model specific HDA quirks to construct the component
binding details of Cirrus Logic companion amplifiers as this information
is already present in the ACPI.

Quirks are then only required for special workarounds not described in
the ACPI such as internal configuration of the Realtek codecs.

The codec pointer is now initialized in hda_component_manager_init() so
that we can detect when companion amplifiers are found in the ACPI but
the SSID invokes a quirk that also attempts to create the component
binding.

Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com>
Link: https://patch.msgid.link/20240829161114.140938-1-simont@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-29 18:17:08 +02:00
Takashi Iwai
dfe5b1fe04 Merge branch 'for-linus' into for-next
Pull 6.11 devel branch for applying further updates for Cirrus codecs

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-29 18:16:24 +02:00
Krzysztof Kozlowski
6b99dc62d9
ASoC: codecs: wsa884x: Implement temperature reading and hwmon
Read temperature of the speaker and expose it via hwmon interface, which
will be later used during calibration of speaker protection algorithms.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20240809110122.137761-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-08-29 17:04:46 +01:00
Armin Wolf
5accb265f7 ACPICA: Fix memory leak if acpi_ps_get_next_namepath() fails
ACPICA commit 2802af722bbde7bf1a7ac68df68e179e2555d361

If acpi_ps_get_next_namepath() fails, the previously allocated
union acpi_parse_object needs to be freed before returning the
status code.

The issue was first being reported on the Linux ACPI mailing list:

Link: https://lore.kernel.org/linux-acpi/56f94776-484f-48c0-8855-dba8e6a7793b@yandex.ru/T/
Link: 2802af72
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:56:06 +02:00
Adam Young
cff8a9f66a ACPICA: Allow PCC Data Type in MCTP resource.
ACPICA commit f0776a465cc2c20393bec534c16bdee4a78f7bb7

explicitly allow QWord address space description type
to be 0xA to indicate it refers to a Platform
Communication channel
IAW  ACPI_ECR_PCC_DESCRIPTORS_CF_V2

https://bugzilla.tianocore.org/show_bug.cgi?id=4594

An entity in a DSDT or in SSDTs that requires
a platform communication channel table (PCCT) entry
to communicate with a remote service will have a single
value that is the index of the entry in the PCCT.
This data type with have a resource_type value of 0xA.

This value indicates that the type shares the same
footprint as a Dword_space section.

Link: f0776a46
Signed-off-by: Adam Young <ayoung@amperecomputing.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:55:16 +02:00
Vasily Khoruzhick
c82c507126 ACPICA: executer/exsystem: Don't nag user about every Stall() violating the spec
ACPICA commit 129b75516fc49fe1fd6b8c5798f86c13854630b3

Stop nagging user about every Stall() that violates the spec

On my Dell XPS 15 7590 I get hundreds of these warnings after few hours of
uptime:

$ dmesg | grep "fix the firmware" | wc -l
261

I cannot fix the firmware and I doubt that Dell cares about 4 year old
laptop either

Fixes: ace8f1c54a ("ACPICA: executer/exsystem: Inform users about ACPI spec violation")
Link: 129b7551
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:53:50 +02:00
Vasily Khoruzhick
632b746b10 ACPICA: Implement ACPI_WARNING_ONCE and ACPI_ERROR_ONCE
ACPICA commit 2ad4e6e7c4118f4cdfcad321c930b836cec77406

In some cases it is not practical nor useful to nag user about some
firmware errors that they cannot fix. Add a macro that will print a
warning or error only once to be used in these cases.

Link: 2ad4e6e7
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:51:24 +02:00
Punit Agrawal
cf94e10a03 ACPICA: MPAM: Correct the typo in struct acpi_mpam_msc_node member
ACPICA commit 3da3f7d776d17e9bfbb15de88317de8d7397ce38

A member of the struct acpi_mpam_msc_node that represents a Memory System
Controller node structure - num_resource_nodes has a typo. Fix the typo

No functional change.

Link: 3da3f7d7
Signed-off-by: Punit Agrawal <punit.agrawal@bytedance.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:48:53 +02:00
Andrii Nakryiko
c634d6f4e1 libbpf: Fix bpf_object__open_skeleton()'s mishandling of options
We do an ugly copying of options in bpf_object__open_skeleton() just to
be able to set object name from skeleton's recorded name (while still
allowing user to override it through opts->object_name).

This is not just ugly, but it also is broken due to memcpy() that
doesn't take into account potential skel_opts' and user-provided opts'
sizes differences due to backward and forward compatibility. This leads
to copying over extra bytes and then failing to validate options
properly. It could, technically, lead also to SIGSEGV, if we are unlucky.

So just get rid of that memory copy completely and instead pass
default object name into bpf_object_open() directly, simplifying all
this significantly. The rule now is that obj_name should be non-NULL for
bpf_object_open() when called with in-memory buffer, so validate that
explicitly as well.

We adopt bpf_object__open_mem() to this as well and generate default
name (based on buffer memory address and size) outside of bpf_object_open().

Fixes: d66562fba1 ("libbpf: Add BPF object skeleton support")
Reported-by: Daniel Müller <deso@posteo.net>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Reviewed-by: Daniel Müller <deso@posteo.net>
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/bpf/20240827203721.1145494-1-andrii@kernel.org
2024-08-29 17:47:27 +02:00
Jinjie Ruan
4d57a84056 soc/tegra: pmc: Simplify with scoped for each OF child loop
Use scoped for_each_child_of_node_scoped() when iterating over device
nodes to make code a bit simpler.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:43:43 +02:00
Jon Hunter
12803ded10 arm64: defconfig: Enable Tegra194 PCIe Endpoint
Build the Tegra194 PCIe Endpoint driver as a module by default for
ARM64.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:41:58 +02:00
Jose Marinho
703c730794 ACPICA: Implement the Dword_PCC Resource Descriptor Macro
ACPICA commit 1209ecf682e03d9ef0c22f4986a2e53b03bd2985

The Dword_pcc (alongside word_pcc and Qword_pcc) were accepted to ACPI
inclusion via a code-first process.

This patch implements support in iASL for Dword_pcc.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=4594
Link: 1209ecf6
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:41:49 +02:00
Dara Stotland
93ff968622 arm64: tegra: Add thermal nodes to AGX Orin SKU8
One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
1f190117a1 arm64: tegra: Move BPMP nodes to AGX Orin module
All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7662fe9639 arm64: tegra: Move padctl supply nodes to AGX Orin module
Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
d075995c11 arm64: tegra: Move AGX Orin nodes to correct location
Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.

Fixes: cd42b26a52 ("arm64: tegra: Add regulators required for PCIe")
Fixes: d71b893a11 ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
a034db9e4d arm64: tegra: Combine IGX Orin board files
Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00