The ralink_of_remap() function is repeated several times on SoC specific
source files. They have the same structure, but just differ in compatible
strings. In order to make commonly use of these codes, this patch
introduces a newly designed mtmips_of_remap_node() function to match and
remap all supported system controller and memory controller nodes.
Build and run tested on MT7620 and MT7628.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Usually, We only need to print the error log when there is a PCIe card but
initialization fails. Whether the driver finds the PCIe card or not is the
expected behavior. So it's better to log these information with dev_info().
Tested on MT7628AN router Motorola MWR03.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* irq/misc-6.5:
: .
: Misc cleanups:
:
: - Add a number of missing prototypes
: - Mark global symbol as static where needed
: - Drop some now useless non-DT code paths
: - Add a missing interrupt mapping to the STM32 irqchip
: - Silence another STM32 warning when building with W=1
: - Fix the jcore-aic driver that actually never worked...
: .
Revert "irqchip/mxs: Include linux/irqchip/mxs.h"
irqchip/jcore-aic: Fix missing allocation of IRQ descriptors
irqchip/stm32-exti: Fix warning on initialized field overwritten
irqchip/stm32-exti: Add STM32MP15xx IWDG2 EXTI to GIC map
irqchip/gicv3: Add a iort_pmsi_get_dev_id() prototype
irqchip/mxs: Include linux/irqchip/mxs.h
irqchip/clps711x: Remove unused clps711x_intc_init() function
irqchip/mmp: Remove non-DT codepath
irqchip/ftintc010: Mark all function static
irqdomain: Include internals.h for function prototypes
Signed-off-by: Marc Zyngier <maz@kernel.org>
These codes are used to read NFTS_TIMEOUT_DELAY register value and
write it into kernel log after writing the register. they are only
used for debugging during driver development, so there is no need
to keep them now.
Tested on MT7628AN router Motorola MWR03.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This reverts commit 5b7e567620.
Although including linux/irqchip/mxs.h is technically correct,
this clashes with the parallel removal of this include file
with 32bit ARM modernizing the low level irq handling as part of
5bb578a0c1 ("ARM: 9298/1: Drop custom mdesc->handle_irq()").
As such, this patch is not only unnecessary, it also breaks
compilation in -next. Revert it.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawnguo@kernel.org>
At very early stage on boot, there is a need to set 'mips_hpt_frequency'.
This timer frequency is a half of the CPU frequency. To get clocks properly
set we need to call to 'of_clk_init()' and properly get cpu clock frequency
afterwards. Depending on the SoC, CPU clock index and compatible differs, so
use them to get the proper clock frm the clock provider. Hence, adapt code
to be aligned with new clock driver.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A proper clock driver for ralink SoCs has been added. This driver is also
a reset provider for the SoC. Hence there is no need to have reset related
code in 'arch/mips/ralink' folder anymore. The only code that remains is
the one related with mips_reboot_setup where a PCI reset is performed.
We maintain this because I cannot test old ralink board with PCI to be
sure all works if we remove also this code.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A proper clock driver for ralink SoCs has been added. Hence there is no
need to have clock related code in 'arch/mips/ralink' folder anymore.
Since this is the last clock related code removal, remove also remaining
prototypes in 'common.h' header file.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A properly clock driver for ralink SoCs has been added. Hence there is no
need to have clock related code in 'arch/mips/ralink' folder anymore.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A properly clock driver for ralink SoCs has been added. Hence there is no
need to have clock related code in 'arch/mips/ralink' folder anymore.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A properly clock driver for ralink SoCs has been added. Hence there is no
need to have clock related code in 'arch/mips/ralink' folder anymore.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Until now, clock related code for old ralink SoCs was based in fixed clocks
using 'clk_register_fixed_rate' and 'clkdev_create' directly doing in code
and not using device tree at all for their definition. Including this driver
is an effort to be able to define proper clocks using device tree and also
cleaning all the clock and reset related code from 'arch/mips/ralink' dir.
This clock and reset driver covers all the ralink SoCs but MT7621 which is
the newest and provides gating and some differences that make it different
from its predecesors. It has its own driver since some time ago. The ralink
SoCs we are taking about are RT2880, RT3050, RT3052, RT3350, RT3352, RT3883,
RT5350, MT7620, MT7628 and MT7688. Mostly the code in this new driver has
been extracted from 'arch/mips/ralink' and cleanly put using kernel clock
driver APIs. The clock plans for this SoCs only talks about relation between
CPU frequency and BUS frequency. This relation is different depending on the
particular SoC. CPU clock is derived from XTAL frequencies.
Depending on the SoC we have the following frequencies:
* RT2880 SoC:
- XTAL: 40 MHz.
- CPU: 250, 266, 280 or 300 MHz.
- BUS: CPU / 2 MHz.
* RT3050, RT3052, RT3350:
- XTAL: 40 MHz.
- CPU: 320 or 384 MHz.
- BUS: CPU / 3 MHz.
* RT3352:
- XTAL: 40 MHz.
- CPU: 384 or 400 MHz.
- BUS: CPU / 3 MHz.
- PERIPH: 40 MHz.
* RT3383:
- XTAL: 40 MHz.
- CPU: 250, 384, 480 or 500 MHz.
- BUS: Depends on RAM Type and CPU:
+ RAM DDR2: 125. ELSE 83 MHz.
+ RAM DDR2: 128. ELSE 96 MHz.
+ RAM DDR2: 160. ELSE 120 MHz.
+ RAM DDR2: 166. ELSE 125 MHz.
* RT5350:
- XTAL: 40 MHz.
- CPU: 300, 320 or 360 MHz.
- BUS: CPU / 3, CPU / 4, CPU / 3 MHz.
- PERIPH: 40 MHz.
* MT7628 and MT7688:
- XTAL: 20 MHz or 40 MHz.
- CPU: 575 or 580 MHz.
- BUS: CPU / 3.
- PCMI2S: 480 MHz.
- PERIPH: 40 MHz.
* MT7620:
- XTAL: 20 MHz or 40 MHz.
- PLL: XTAL, 480, 600 MHz.
- CPU: depends on PLL and some mult and dividers.
- BUS: depends on PLL and some mult and dividers.
- PERIPH: 40 or XTAL MHz.
MT7620 is a bit more complex deriving CPU clock from a PLL and an bunch of
register reads and predividers. To derive CPU and BUS frequencies in the
MT7620 SoC 'mt7620_calc_rate()' helper is used.
In the case XTAL can have different frequencies and we need a different
clock frequency for peripherals 'periph' clock in introduced.
The rest of the peripherals present in the SoC just follow their parent
frequencies.
With this information the clk driver will provide all the clock and reset
functionality from a set of hardcoded clocks allowing to define a nice
device tree without fixed clocks.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Adds device tree binding documentation for system controller node present
in Mediatek MIPS and Ralink SOCs. This node is a clock and reset provider
for the rest of the world. This covers RT2880, RT3050, RT3052, RT3350,
RT3883, RT5350, MT7620, MT7628 and MT7688 SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Etnaviv doesn't use anything from of_platform.h, but depends on
of.h, of_device.h, and platform_device.h which are all implicitly
included, but that is going to be removed soon.
Signed-off-by: Rob Herring <robh@kernel.org>
Tested-by: Sui Jingfeng <suijingfeng@loongson.cn>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Currently, fsl-asoc-card supports passing the width of the TDM slot, but
not the number of slots in use, as it harcodes it as two slots.
Add support for passing the number of slots in use.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20230616203913.551183-1-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add binding for WSA8840/WSA8845/WSA8845H smart speaker amplifiers used
in Qualcomm QRD8550 board with SM8550 SoC.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230616115751.392886-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Reorder the entries in quirk table to group entries with same platform.
Signed-off-by: Terry Cheong <htcheong@chromium.org>
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Link: https://lore.kernel.org/r/20230616063617.25900-1-mac.chiang@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Modify the error handling flow by release lock.
The require mutex will keep holding if open fail.
Fixes: aa9ff6a495 ("ASoC: soc-compress: Reposition and add pcm_mutex")
Signed-off-by: yixuanjiang <yixuanjiang@google.com>
Link: https://lore.kernel.org/r/20230619033127.2522477-1-yixuanjiang@google.com
Signed-off-by: Mark Brown <broonie@kernel.org>
During hibernation or restoration, freeze_secondary_cpus
checks num_online_cpus via BUG_ON, and the subsequent
save_processor_state also does the checking with WARN_ON.
In the case of CONFIG_PM_SLEEP_SMP=n, freeze_secondary_cpus
is not defined, but the sole possible condition to disable
CONFIG_PM_SLEEP_SMP is !SMP where num_online_cpus is always 1.
We also don't have to check it in save_processor_state.
So remove the unnecessary checking in save_processor_state.
Signed-off-by: Song Shuai <songshuaishuai@tinylab.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20230609075049.2651723-3-songshuaishuai@tinylab.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The SM8550 PHY also uses a different offset for the CMN_STATUS reg,
use the right one for the v6 Display Port configuration.
Fixes: 49742e9eda ("phy: qcom-qmp-combo: Add support for SM8550")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-phy-init-fix-v1-1-4e9da9f97991@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Implement support for the SGMII/SerDes PHY present on various Qualcomm
platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230619091336.194914-4-brgl@bgdev.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
As part of the new security API in the FW, all security keys are to
be removed before station removal. Until now IGTK rekey
wasn't supported in the D3 resume flow, and thus the driver might
not know the right key to remove.
If an IGTK was rekeyed during D3 the old IGTK is removed and the
new key is updated. If not, the old key's IPN is updated.
As opposed to GTK, which both the FW and the driver hold it's two
most recent keys, only one IGTK is held.
Signed-off-by: Yedidya Benshimol <yedidya.ben.shimol@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621144844.b53c301c07e6.I375277a10a1f756b93d4a343f6664351a80189c5@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
When resuming from D3 the two most recent GTKs are passed from
the FW with wowlan_info_notif. Both keys should be updated as
they both might be needed upon FW restart and they both should
be removed upon station removal.
Signed-off-by: Yedidya Benshimol <yedidya.ben.shimol@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621144844.3ea3a9f52ec2.I7cedfa2bb0eafb83e7c77363673560acf05bff74@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
When the driver has some form of GTK rekeying offload, e.g. during
WoWLAN, mac80211 can assume that keys that the driver adds for
that are already present in the hardware acceleration. Mark them
accordingly.
Signed-off-by: Yedidya Benshimol <yedidya.ben.shimol@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621144414.bc78c7ff2a3d.I5e313d69e2b6a7a4766ef82d0faa122dd4c1c46d@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
We hit a false positive OC for 7439b2 in DRD/device mode for the
second port. So disable the OC check for this use case. Add capability
to suppress OC condition for specific ports.
Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/1686859578-45242-3-git-send-email-justin.chen@broadcom.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The COMMONONN bit turns off the PHY when the host controller puts it
into suspend state. This can happen during the following...
- Nothing is connected to the port
- The host controller goes into low power mode whatever due to auto
suspend or system suspend.
With COMMONONN we also must unset U2_FREECLK_EXISTS since the UTMI
clock is fed by the PHY.
With these changes we see a power savings of ~12mW when port is in
suspend.
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Link: https://lore.kernel.org/r/1686859578-45242-2-git-send-email-justin.chen@broadcom.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Intel Killer AX1675i/s with device id 51f1 would show
"No config found for PCI dev 51f1/1672" in dmesg and refuse to work.
Add the new device id 51F1 for 1675i/s to fix the issue.
Signed-off-by: Yi Kuo <yi@yikuo.dev>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130444.ee224675380b.I921c905e21e8d041ad808def8f454f27b5ebcd8b@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
We have the trailing dash here, but that complicates all
the code. Simplify this by removing the dashes, adding
them to the *_MODULE_FIRMWARE macros, and adjusting the
code using this accordingly.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.72240ca13b83.I1f4ed547f0964719ed98a3ef928080462d594491@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
All the configurations for the various Bz/Gl devices
are basically identical, except for Gl A-step and the
firmware filename prefixes.
Add some infrastructure to auto-generate the firmware
filename prefix based on the detected MAC step and
RF name/step, and remove all the unneeded configs.
This reduces the size of the iwlwifi module by ~9k:
517582 27111 560 545253 851e5 drivers/net/wireless/intel/iwlwifi/iwlwifi.ko
526885 27083 560 554528 87620 drivers/net/wireless/intel/iwlwifi/iwlwifi.ko
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.1dc121ba338f.I07d651516eb82cbaded4724ef30558a50f2fa866@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
We don't need this here anymore, ANY is just fine.
Still keep the rest of the infrastructure so we can
more easily add back support for testing.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.168c714cbb83.I0721ce86a042c4d8004914129bab46d7ccc8cb00@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
The earliest firmware released for these products is with
API version 50, so there's no point in trying to load any
versions before that.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.768186c0475d.I7de717072221712176a3085d71c8018ae0348db8@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
The earliest firmware released for these products is with
API version 59 (for 'ty' only), so no point trying to go
back in time even further than that.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.ebe02b5dbddb.I51484ebb6c89256b0e6e7f9bb24f597c4ebead67@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
They're not the same as Bz or any prior ones, and there's
already one place in the driver that would erroneously
assign a workaround to A-step Sc devices if they're just
treated as a version of Bz. Fix that.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.e98272ddb808.If18577b2393f631d1bfaa931287cae106fa32438@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Split the configuration list in 22000.c into four new files,
per new device family, so we don't have this huge unusable
file. Yes, this duplicates a few small things, but that's
still much better than what we have now.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.7543603b2ee7.Ia8dd54216d341ef1ddc0531f2c9aa30d30536a5d@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Add support for the new Integrated Connectivity (CNVi)
and Companion RF (CRF) versions and their combinations
to handle new devices.
Signed-off-by: Mukesh Sisodiya <mukesh.sisodiya@intel.com>
Signed-off-by: Gregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230621130443.716fd707e847.I34f6ffd61e3210c926868a3e961b16d1742bba29@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
