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Code Issues Releases Packages Activity
linux/drivers/clk/renesas
History
Geert Uytterhoeven f63aaf6e71 clk: renesas: mstp: Add genpd OF provider at postcore_initcall() 
Genpd OF providers must now be registered after genpd bus registration.
However, cpg_mstp_add_clk_domain() is only called from CLK_OF_DECLARE(),
which is too early.  Hence on R-Car M1A, R-Car H1, and RZ/A1, the
CPG/MSTP Clock Domain fails to register, and any devices residing in
that clock domain fail to probe.

Fix this by splitting initialization into two steps:
  - The first part keeps on registering the PM domain with genpd at
    CLK_OF_DECLARE(),
  - The second and new part moves the registration of the genpd OF
    provider to a postcore_initcall().

See also commit c5ae5a0c61 ("pmdomain: renesas: rcar-sysc: Add
genpd OF provider at postcore_initcall").

Fixes: 18a3a510ec ("pmdomain: core: Add the genpd->dev to the genpd provider bus")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/81ef5f8d5d31374b7852b05453c52d2f735062a2.1755073087.git.geert+renesas@glider.be
History 2025-08-18 09:36:55 +02:00
..
clk-div6.c clk: renesas: div6: Implement range checking 2021-05-11 09:58:13 +02:00
clk-div6.h We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-emev2.c clk: renesas: emev2: Remove obsolete clkdev registration 2023-07-27 14:32:41 +02:00
clk-mstp.c clk: renesas: mstp: Add genpd OF provider at postcore_initcall() 2025-08-18 09:36:55 +02:00
clk-r8a73a4.c clk: renesas: Remove duplicate and trailing empty lines 2024-10-01 09:13:38 +02:00
clk-r8a7740.c clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT 2024-04-25 10:38:19 +02:00
clk-r8a7778.c clk: renesas: Remove duplicate and trailing empty lines 2024-10-01 09:13:38 +02:00
clk-r8a7779.c clk: renesas: r8a7779: Remove struct r8a7779_cpg 2022-06-13 11:53:18 +02:00
clk-rz.c clk: renesas: rza1: Remove struct rz_cpg 2022-06-13 11:53:18 +02:00
clk-sh73a0.c clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT 2024-04-25 10:38:19 +02:00
clk-vbattb.c clk: renesas: vbattb: Add VBATTB clock driver 2024-11-06 08:52:45 +01:00
Kconfig clk: renesas: Add CPG/MSSR support to RZ/N2H SoC 2025-06-19 20:19:19 +02:00
Makefile clk: renesas: Add CPG/MSSR support to RZ/N2H SoC 2025-06-19 20:19:19 +02:00
r7s9210-cpg-mssr.c clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
r8a774a1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774b1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774c0-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a774e1-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a779a0-cpg-mssr.c clk: renesas: r8a779a0: Add ISP core clocks 2025-02-03 11:07:05 +01:00
r8a779f0-cpg-mssr.c clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs 2024-07-30 10:44:19 +02:00
r8a779g0-cpg-mssr.c clk: renesas: r8a779g0: Add ISP core clocks 2025-02-03 11:07:05 +01:00
r8a779h0-cpg-mssr.c clk: renesas: r8a779h0: Add VSPX clock 2025-02-03 11:07:06 +01:00
r8a7742-cpg-mssr.c clk: renesas: r8a7742: Add clk entry for VSPR 2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c clk: renesas: r8a7795: Constify r8a7795_*_clks 2023-09-26 09:38:00 +02:00
r8a7796-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77470-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77970-cpg-mssr.c clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
r8a77980-cpg-mssr.c clk: renesas: r8a77980: Add I2C5 clock 2023-03-30 16:44:04 +02:00
r8a77990-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r8a77995-cpg-mssr.c clk: renesas: rcar-gen3: Add ADG clocks 2023-08-15 11:34:43 +02:00
r9a06g032-clocks.c clk: renesas: r9a06g032: Use BIT macro consistently 2024-12-10 12:00:30 +01:00
r9a07g043-cpg.c clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API 2025-06-10 10:24:17 +02:00
r9a07g044-cpg.c clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API 2025-06-10 10:24:17 +02:00
r9a08g045-cpg.c clk: renesas: r9a08g045: Add MSTOP for coupled clocks as well 2025-07-08 11:36:16 +02:00
r9a09g011-cpg.c clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API 2025-06-10 10:24:17 +02:00
r9a09g047-cpg.c clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPs 2025-07-08 11:36:16 +02:00
r9a09g056-cpg.c clk: renesas: r9a09g056: Add XSPI clock/reset 2025-07-02 20:53:35 +02:00
r9a09g057-cpg.c clk: renesas: r9a09g057: Add XSPI clock/reset 2025-07-02 20:53:35 +02:00
r9a09g077-cpg.c clk: renesas: r9a09g077: Add RIIC module clocks 2025-07-02 20:51:46 +02:00
rcar-cpg-lib.c clk: renesas: Remove duplicate and trailing empty lines 2024-10-01 09:13:38 +02:00
rcar-cpg-lib.h clk: renesas: rcar-gen3: Switch to new SD clock handling 2021-11-19 11:32:39 +01:00
rcar-gen2-cpg.c clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-gen2-cpg.h clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-gen3-cpg.c clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-gen3-cpg.h clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-gen4-cpg.c clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-gen4-cpg.h clk: renesas: Pass sub struct of cpg_mssr_priv to cpg_clk_register 2025-06-10 10:20:45 +02:00
rcar-usb2-clock-sel.c clk: Switch back to struct platform_driver::remove() 2024-09-21 14:12:05 -07:00
renesas-cpg-mssr.c clk: renesas: Add CPG/MSSR support to RZ/N2H SoC 2025-06-19 20:19:19 +02:00
renesas-cpg-mssr.h clk: renesas: Add support for R9A09G077 SoC 2025-06-10 10:24:17 +02:00
rzg2l-cpg.c clk: renesas: rzg2l: Rename mstp_clock to mod_clock 2025-06-10 10:32:39 +02:00
rzg2l-cpg.h clk: renesas: rzg2l: Drop MSTOP based power domain support 2025-06-10 10:24:17 +02:00
rzv2h-cpg.c clk: renesas: rzv2h: Add fixed-factor module clocks with status reporting 2025-07-02 20:53:35 +02:00
rzv2h-cpg.h clk: renesas: r9a09g056: Add XSPI clock/reset 2025-07-02 20:53:35 +02:00