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1,216,791 commits

Author SHA1 Message Date
Krzysztof Kozlowski
5bea22fbe7 arm64: dts: qcom: msm8996-sagit: drop unsupported syna,codes
Synaptics RMI4 Touchscreen bindings never defined syna,codes property
for function 1a.  No usage in Linux drivers.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 22:11:48 -07:00
Krzysztof Kozlowski
21fc24ee9c arm64: dts: qcom: msm8996-gemini: fix touchscreen VIO supply
According to bindings and Linux driver, there is no VDDA but VIO supply.

Fixes: 4ac46b3682 ("arm64: dts: qcom: msm8996: xiaomi-gemini: Add support for Xiaomi Mi 5")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 22:11:48 -07:00
Krzysztof Kozlowski
b019cf7e5f arm64: dts: qcom: msm8953-vince: drop duplicated touschreen parent interrupt
Interrupts extended already define a parent interrupt controller:

  msm8953-xiaomi-vince.dtb: touchscreen@20: Unevaluated properties are not allowed ('interrupts-parent' was unexpected)

Fixes: aa17e707e0 ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 22:11:48 -07:00
Mrinmay Sarkar
bf3ee3db23 arm64: dts: qcom: sa8775p-ride: enable pcie nodes
Enable pcie0, pcie1 nodes and their respective phy's.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Link: https://lore.kernel.org/r/1689960276-29266-5-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:27:49 -07:00
Mrinmay Sarkar
489f14be0e arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes
Add pcie dtsi nodes for two controllers found on sa8775p platform.

Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Link: https://lore.kernel.org/r/1689960276-29266-4-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:27:49 -07:00
Bjorn Andersson
74cf6675c3 arm64: dts: qcom: sc8180x: Fix LLCC reg property
The LLCC binding and driver was recently corrected to handle the stride
varying between platforms. Switch to the new format to ensure accesses
are done in the right place.

Fixes: 8575f197b0 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612220632.1885175-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:26:05 -07:00
Bjorn Andersson
36bd9fad22 arm64: dts: qcom: sc8180x-flex5g: Wire up USB Type-C
Following the SC8180X Primus reference design, add pmic_glink and USB
Type-C wiring for battery manager, external display and orientation
switching.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612221456.1887533-4-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:25:32 -07:00
Bjorn Andersson
ab590fa619 arm64: dts: qcom: sc8180x-primus: Wire up USB Type-C
Wire up pmic_glink and the various components of USB Type-C to get
battery status, orientation switching of SuperSpeed USB, as well as
support for external display on the SC8180X Primus reference device.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612221456.1887533-3-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:25:32 -07:00
Bjorn Andersson
b0246331c5 arm64: dts: qcom: sc8180x: Add USB Type-C of_graph anchors
Define anchors for wiring up the USB Type-C graph in the board files.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230612221456.1887533-2-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:25:32 -07:00
Devi Priya
5229c1d6a0 arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks
Use assigned-clock-rates property for configuring the QUP I2C core clocks
to operate at nominal frequency.

Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:25:19 -07:00
Lin, Meng-Bo
507f9db1e9 arm64: dts: qcom: msm8939-samsung-a7: Add initial dts
This dts adds support for Samsung Galaxy A7 smartphone released in 2015.

Add a device tree for A7 with initial support for:

- GPIO keys
- Hall Sensor
- SDHCI (internal and external storage)
- USB Device Mode
- UART (on USB connector via the SM5502 MUIC)
- WCNSS (WiFi/BT)
- Regulators
- Touch key
- Accelerometer/Magnetometer
- Fuelgauge
- NFC
- Vibrator
- Touchscreen

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230623100237.5299-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:19:15 -07:00
Lin, Meng-Bo
0391cb1543 dt-bindings: qcom: Document msm8939,a7
Document samsung,a7 bindings used in its device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230623100220.5284-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:19:15 -07:00
Konrad Dybcio
e40266d905 dt-bindings: qcom: Allow SoC names ending in "pro"
There are a couple of SoCs whose names end in "pro", with the currently-
upstream examples being msm8974pro and msm8996pro. Allow such suffix in
SoC-specific compatibles.

Fixes: 5aa332c5e7 ("dt-bindings: qcom: document preferred compatible naming")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-1-254ae8642e69@linaro.org
[bjorn: Changed (pro|) to (pro)?, per Rob's request]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:15:53 -07:00
Lin, Meng-Bo
63c7fe5542 arm64: dts: qcom: msm8916-samsung-j5-common: Add touchscreen
J5 and J5X use an Imagis IST3038C touchscreen that is connected to
blsp_i2c5. Add it to the device tree.

MFD driver for SM5703 is unavailable at the moment, which is required
to power up the touchscreen on J5, so it's disabled on J5 for now.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230715214046.14902-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 21:00:04 -07:00
Lin, Meng-Bo
3e9b36783b arm64: dts: qcom: msm8916-samsung-e2015: Add accelerometer
E5, E7 and Grand Max have ST LIS2HH12 accelerometer.
Add support for it.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230716190807.7056-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:59:57 -07:00
Krzysztof Kozlowski
45a6bf1b27 arm64: dts: qcom: sm8350: add APR and LPASS TLMM
Add audio-related nodes: the APR in the ADSP (same as on SM8250) and
LPASS TLMM pin controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:20:00 -07:00
Krzysztof Kozlowski
423f3a7ec7 arm64: dts: qcom: sm8350-hdk: add uSD card
Add uSD card to HDK8350.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:19:22 -07:00
Krzysztof Kozlowski
dd29cb5edd arm64: dts: qcom: sm8350-hdk: include PMK8350
HDK8350 comes with PMK8350 PMIC, so include relevant DTSI.  This also
allows to use reboot reason.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:19:22 -07:00
Manivannan Sadhasivam
aeea56072c arm64: dts: qcom: sm8250: Add interconnect paths to UFSHC
UFS host controller requires interconnect path configuration for proper
working. So let's specify them for SM8250 SoC.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-14-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:17:58 -07:00
Manivannan Sadhasivam
84e2e371f4 arm64: dts: qcom: sdm845: Add interconnect paths to UFSHC
UFS host controller requires interconnect path configuration for proper
working. So let's specify them for SDM845 SoC.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-13-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:17:42 -07:00
Manivannan Sadhasivam
bbbef6e24b arm64: dts: qcom: sdm845: Fix the min frequency of "ice_core_clk"
Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the
downstream vendor devicetree. So fix it!

https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi

Fixes: 433f9a5729 ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:16:48 -07:00
Manivannan Sadhasivam
4b6ea15c0a arm64: dts: qcom: sdm845: Add missing RPMh power domain to GCC
GCC and it's GDSCs are under the RPMh CX power domain. So let's add the
missing RPMh power domain to the GCC node.

Fixes: 6d4cf750d0 ("arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:16:48 -07:00
Yuanjun Gong
489d7a8cc2 soc: qcom: use devm_clk_get_enabled() in gsbi_probe()
in gsbi_probe(), the return value of function clk_prepare_enable()
should be checked, since it may fail. using devm_clk_get_enabled()
instead of devm_clk_get() and clk_prepare_enable() can avoid this
problem.

Signed-off-by: Yuanjun Gong <ruc_gongyuanjun@163.com>
Link: https://lore.kernel.org/r/20230720140834.33557-1-ruc_gongyuanjun@163.com
[bjorn: Dropped unnecessary "ret" variable]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:06:34 -07:00
Rohit Agarwal
1d14bcffb4 arm64: dts: qcom: sm8550: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined
in rpmhpd.h for SM8550 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:00:47 -07:00
Rohit Agarwal
8ed9de7968 arm64: dts: qcom: sm8450: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined
in rpmhpd.h for SM8450 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 20:00:47 -07:00
Rohit Agarwal
fc4cbfbb7f arm64: dts: qcom: sm8350: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined in
rpmhpd.h for SM8350 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:59:44 -07:00
Rohit Agarwal
34e2fd6a68 arm64: dts: qcom: sm8250: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined in
rpmhpd.h for SM8250 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:59:44 -07:00
Rohit Agarwal
de3acb7af9 soc: qcom: rpmhpd: Use the newly created generic RPMHPD bindings
Update the SoC SM8[2345]50 entries to use the new
generic RPMHPD bindings.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1689744162-9421-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:58:48 -07:00
Bjorn Andersson
39bb3abcd3 Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into drivers-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them
being used in DeviceTree source, and the driver.
2023-07-21 19:55:40 -07:00
Bjorn Andersson
ca32bd384e Merge branch '1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into arm64-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them
being used in DeviceTree source, and the driver.
2023-07-21 19:54:52 -07:00
Rohit Agarwal
7f31667d29 dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexes
Add Generic RPMh Power Domain indexes that can be used
for all the Qualcomm SoC henceforth.
The power domain indexes of these bindings are based on compatibility
with current targets like SM8[2345]50 targets.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:54:36 -07:00
Komal Bajaj
3d5a9f6d53 arm64: dts: qcom: qru1000-idp: Update reserved memory region
Add missing reserved regions as described in QRU1000 memory map.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Link: https://lore.kernel.org/r/20230706125129.20969-3-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:51:49 -07:00
Komal Bajaj
d52775a696 arm64: dts: qcom: qdu1000-idp: Update reserved memory region
Add missing reserved regions as described in QDU1000 memory map.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Link: https://lore.kernel.org/r/20230706125129.20969-2-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-21 19:51:18 -07:00
Martin Kaiser
dd105461ad hwrng: arm-smccc-trng - don't set drvdata
Don't set drvdata, there's nobody who reads it.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:39 +12:00
Eric Biggers
28b7760983 crypto: x86/aesni - remove unused parameter to aes_set_key_common()
The 'tfm' parameter to aes_set_key_common() is never used, so remove it.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:39 +12:00
Weili Qian
391dde6e48 crypto: hisilicon/hpre - enable sva error interrupt event
Enable sva error interrupt event. When an error occurs on
the sva module, the device reports an abnormal interrupt to
the driver.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:39 +12:00
Weili Qian
b925a0cc87 crypto: hisilicon/qm - increase device doorbell timeout
When both the accelerator device and SMMU are busy,
the processing time of the doorbell may be prolonged.
As a result, the doorbell may timeout, especially in the sva
scenario. Therefore, the doorbell timeout is increased.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:39 +12:00
Weili Qian
4b3ee3ff2d crypto: hisilicon/qm - stop function and write data to memory
When the system is shut down, the process is killed, but the
accelerator device does not stop executing the tasks. If the
accelerator device still accesses the memory and writes back data
to the memory after the memory is reclaimed by the system,
an NFE error may occur. Therefore, before the system is shut
down, the driver needs to stop the device and write data back
to the memory.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:39 +12:00
Weili Qian
5cd4ed98cf crypto: hisilicon/qm - flush all work before driver removed
Before removing the driver, flush inter-function communication
work, and subsequent communication work is not processed.
This prevents communication threads from accessing released memory.

Fixes: ("crypto: hisilicon/qm - enable PF and VFs communication")
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
1e3b2e8055 crypto: stm32 - remove flag HASH_FLAGS_DMA_READY
Remove flag HASH_FLAGS_DMA_READY as it can put the driver in a deadlock
state.
If the DMA automatically set the DCAL bit, the interrupt indicating the
end of a computation can be raised before the DMA complete sequence.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
a4adfbc254 crypto: stm32 - fix MDMAT condition
If IP has MDMAT support, set or reset the bit MDMAT in Control Register.

Fixes: b56403a25a ("crypto: stm32/hash - Support Ux500 hash")
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
a10618f397 crypto: stm32 - check request size and scatterlist size when using DMA.
When we are sending the data to HASH with the DMA, we send all the data
provided in the scatterlists of the request.
But in some cases (ex : tcrypt performances tests), we should only send
req->nbytes
When iterating through the scatterlist we verify if it is the last
scatterlist or if the number of bytes sent plus the data of the current
scatterlist is superior of the total number of bytes to hash.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
d9c83f71ee crypto: stm32 - fix loop iterating through scatterlist for DMA
We were reading the length of the scatterlist sg after copying value of
tsg inside.
So we are using the size of the previous scatterlist and for the first
one we are using an unitialised value.
Fix this by copying tsg in sg[0] before reading the size.

Fixes : 8a1012d3f2 ("crypto: stm32 - Support for STM32 HASH module")
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
0e99d38ff6 crypto: stm32 - remove bufcnt in stm32_hash_write_ctrl.
Commit "crypto: stm32 - Fix empty message processing" remove the use of
the argument bufcnt in stm32_hash_write_ctrl.
Hence, we can remove it from the function prototype and simplify the
function declaration.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Thomas Bourgoin
b6248fb8b8 crypto: stm32 - add new algorithms support
Add the all SHA-2 (up to 512) and SHA-3 algorithm support.
Update compatible table to add stm32mp13.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:38 +12:00
Lionel Debieve
0d51794386 dt-bindings: crypto: add new compatible for stm32-hash
Add a new compatible for stm32mp13 support.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:37 +12:00
Martin Kaiser
1422e36351 hwrng: ba431 - use dev_err_probe after failed registration
Use dev_err_probe to print the error message after a failed hwrng
registration.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:37 +12:00
Martin Kaiser
97b7aa77d1 hwrng: ba431 - don't init of_device_id's data
We have no device-specific data for silex-insight,ba431-rng. There's no
need to set .data = NULL, this is the default.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:37 +12:00
Martin Kaiser
e8c1fdcc62 hwrng: ba431 - do not set drvdata
Do not set drvdata in the ba431 driver. Nobody is using it.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:37 +12:00
Martin Kaiser
a40be5e89f hwrng: ingenic - switch to device managed registration
Call devm_hwrng_register for device managed registration of the
ingenic-trng driver. ingenic_trng_remove can then be deleted.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2023-07-22 13:59:37 +12:00