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1,089,026 commits

Author SHA1 Message Date
Heiko Carstens
dddbf91387 s390/ctcm: add __printf format attribute to ctcm_dbf_longtext
Allow the compiler to recognize and check format strings and parameters.

As reported with allmodconfig and W=1:

drivers/s390/net/ctcm_dbug.c: In function ‘ctcm_dbf_longtext’:
drivers/s390/net/ctcm_dbug.c:73:9: error: function ‘ctcm_dbf_longtext’ might be a candidate for ‘gnu_printf’ format attribute [-Werror=suggest-attribute=format]
   73 |         vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
      |         ^~~~~~~~~

Acked-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:12:30 +00:00
Heiko Carstens
9961d6d50b s390/ctcm: fix format string
The second parameter as specified by the format string is actually a
string not an integer.

Acked-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:12:30 +00:00
Heiko Carstens
7c8e1a9155 net/af_iucv: fix kernel doc comments
Fix kernel doc comments where appropriate, or remove incorrect kernel
doc indicators.

Acked-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:12:30 +00:00
Heiko Carstens
682026a5e9 net/iucv: fix kernel doc comments
Fix kernel doc comments where appropriate or remove incorrect kernel
doc indicators.
Also move kernel doc comments directly before functions.

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:12:29 +00:00
Julian Wiedmann
832585d217 s390/qeth: allocate RX queue at probe time
We always need an RX queue, and there's no reconfig situation either
where we would need to free & rebuild the queue.

So allocate the RX queue right from the start, and avoid freeing it
during unrelated qeth_free_qdio_queues() calls.

Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: Karsten Graul <kgraul@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:12:29 +00:00
David S. Miller
2edc4bf666 Merge branch 'hw_addr_set-arch'
Jakub Kicinski says:

====================
net: use eth_hw_addr_set() in arch-specific drivers

Fixups for more arch-specific drivers.

With these (and another patch which didn't fit) the build is more or
less clean with all cross-compilers available on kernel.org. I say
more or less because around half of the arches fail to build for
unrelated reasons right now.

Most of the changes here are for m68k, 32bit x86 and alpha.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:22 +00:00
Jakub Kicinski
bb52aff3e3 natsemi: macsonic: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
9a962aedd3 cirrus: mac89x0: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
e217fc4aff apple: macmace: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
5b6d5affd2 lasi_82594: use eth_hw_addr_set()
dev_addr is set from IO reads, passed to an arch-specific helper.
Note that the helper never reads it so uninitialized temp is fine.

Fixes build on parisc.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
80db345e7d smc9194: use eth_hw_addr_set()
dev_addr is set from IO reads, and broken from a u16 value.

Fixes build on Alpha.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
f95f8e890a 8390: wd: use eth_hw_addr_set()
IO reads, so save to an array then eth_hw_addr_set().

Fixes build on x86 (32bit).

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
973a34c087 8390: mac8390: use eth_hw_addr_set()
Use temp to pass to the reading function, the function is generic
so can't fix there.

Fixes m68k build.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
d7d28e90e2 8390: hydra: use eth_hw_addr_set()
Loop with offsetting to every second byte, so use a temp buffer.

Fixes m68k build.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:21 +00:00
Jakub Kicinski
5114ddf8dd 8390: smc-ultra: use eth_hw_addr_set()
IO reads, so save to an array then eth_hw_addr_set().

Fixes build on Alpha.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
cc71b8b937 amd: mvme147: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
c3dc2f7196 amd: atarilance: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
21942eef06 amd: hplance: use eth_hw_addr_set()
Byte by byte assignments.

Fixes build on m68k.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
285e4c664d amd: a2065/ariadne: use eth_hw_addr_set()
dev_addr is initialized byte by byte from series.

Fixes build on x86 (32bit).

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
69ede3097b amd: ni65: use eth_hw_addr_set()
IO reads, so save to an array then eth_hw_addr_set().

Fixes build on x86 (32bit).

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Jakub Kicinski
0222ee53c4 amd: lance: use eth_hw_addr_set()
IO reads, so save to an array then eth_hw_addr_set().

Fixes build on x86 (32bit).

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:05:20 +00:00
Joel Stanley
b4a6aaeaf4
drm/aspeed: Fix vga_pw sysfs output
Before the drm driver had support for this file there was a driver that
exposed the contents of the vga password register to userspace. It would
present the entire register instead of interpreting it.

The drm implementation chose to mask of the lower bit, without explaining
why. This breaks the existing userspace, which is looking for 0xa8 in
the lower byte.

Change our implementation to expose the entire register.

Fixes: 696029eb36 ("drm/aspeed: Add sysfs for output settings")
Reported-by: Oskar Senft <osk@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Tested-by: Oskar Senft <osk@google.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20211117010145.297253-1-joel@jms.id.au
2021-11-19 12:00:14 +01:00
David S. Miller
d6821c5bc6 Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf
Pablo Neira Ayuso says:

====================
Netfilter fixes for net

The following patchset contains Netfilter/IPVS fixes for net:

1) Add selftest for vrf+conntrack, from Florian Westphal.

2) Extend nfqueue selftest to cover nfqueue, also from Florian.

3) Remove duplicated include in nft_payload, from Wan Jiabing.

4) Several improvements to the nat port shadowing selftest,
   from Phil Sutter.

5) Fix filtering of reply tuple in ctnetlink, from Florent Fourcot.

6) Do not override error with -EINVAL in filter setup path, also
   from Florent.

7) Honor sysctl_expire_nodest_conn regardless conn_reuse_mode for
   reused connections, from yangxingwu.

8) Replace snprintf() by sysfs_emit() in xt_IDLETIMER as reported
   by Coccinelle, from Jing Yao.

9) Incorrect IPv6 tunnel match in flowtable offload, from Will
   Mortensen.

10) Switch port shadow selftest to use socat, from Florian Westphal.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 11:00:01 +00:00
Dan Carpenter
96c5f82ef0
drm/vc4: fix error code in vc4_create_object()
The ->gem_create_object() functions are supposed to return NULL if there
is an error.  None of the callers expect error pointers so returing one
will lead to an Oops.  See drm_gem_vram_create(), for example.

Fixes: c826a6e106 ("drm/vc4: Add a BO cache.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20211118111416.GC1147@kili
2021-11-19 11:59:15 +01:00
David S. Miller
82f60a011c Merge branch 'dev_addr-const-x86'
Jakub Kicinski says:

====================
net: constify netdev->dev_addr - x86 changes

Resending these so they can get merged while I battle random cross builds.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 10:46:04 +00:00
Jakub Kicinski
a608e6794b ipw2200: constify address in ipw_send_adapter_address
Add const to the address param of ipw_send_adapter_address()
all the functions down the chain have already been changed.

Not sure how I lost this in the rebase.

Acked-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Acked-by: Stanislav Yakovlev <stas.yakovlev@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 10:46:04 +00:00
Jakub Kicinski
b09d58025e wilc1000: copy address before calling wilc_set_mac_address
wilc_set_mac_address() calls IO routines which don't guarantee
the pointer won't be written to. Make a copy.

Acked-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 10:46:04 +00:00
Jakub Kicinski
54612b4a8b mlxsw: constify address in mlxsw_sp_port_dev_addr_set
Argument comes from netdev->dev_addr directly, it needs a const.

Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 10:46:04 +00:00
Jakub Kicinski
e291422c8f net: ax88796c: don't write to netdev->dev_addr directly
The future is here, convert the new driver as we are about
to make netdev->dev_addr const.

Acked-by: Lukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-19 10:46:04 +00:00
Yoshihiro Shimoda
827fbac821 dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
Add binding documentation for the R-Car S4-8 (R8A779F0) Clock Pulse
Generator.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211116074130.107554-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:40:52 +01:00
Lad Prabhakar
97c8d514af clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
of_genpd_add_provider_simple() might fail, this patch makes sure we check
the return value of of_genpd_add_provider_simple() by propagating the
return value to the caller of cpg_mssr_add_clk_domain().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:40:02 +01:00
Lad Prabhakar
fa58e46554 clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the probe
callback fails further down in the code flow.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:40:02 +01:00
Lad Prabhakar
33748744f1 clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
of_genpd_add_provider_simple() might fail, this patch makes sure we check
the return value of of_genpd_add_provider_simple() by propagating the
return value to the caller of rzg2l_cpg_add_clk_domain().

Fixes: ef3c613ccd ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:37:03 +01:00
Lad Prabhakar
27527a3d3b clk: renesas: rzg2l: Check return value of pm_genpd_init()
Make sure we check the return value of pm_genpd_init() which might fail.
Also add a devres action to remove the power-domain in-case the probe
callback fails further down in the code flow.

Fixes: ef3c613ccd ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117115101.28281-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:37:03 +01:00
Ville Syrjälä
51707f2274 drm/i915: Clean up CRC register defines
Use REG_BIT() & co. for the CRC registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-8-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-11-19 12:36:34 +02:00
Lad Prabhakar
e7d960cd6a clk: renesas: r9a07g044: Add RSPI clock and reset entries
Add RSPI{0,1,2} clock and reset entries to CPG driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211117002601.17971-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:36:27 +01:00
Ville Syrjälä
7d938bc011 drm/i915: Clean up DPINVGTT/VLV_DPFLIPSTAT bits
Use REG_BIT() & co. for DPINVTT/VLV_DPFLIPSTAT bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-9-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-11-19 12:36:19 +02:00
Seiya Wang
7781083fd6 arm64: dts: mt8183: support coresight-cpu-debug for mt8183
Add coresight-cpu-debug nodes to mt8183 for dumping
EDPRSR, EDPCSR, EDCIDSR, EDVIDSR
while kernel panic happens

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Link: https://lore.kernel.org/r/20211102090230.25013-1-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-11-19 11:35:52 +01:00
Biju Das
d6dabaf678 clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
Core clock "I" is sourced from CPG_PL1_DDIV divider as per HW manual
Rev.1.00.

This patch adds clock divider table "dtable_1_8" and switches to
DEF_DIV for "I" clock.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211112081003.15453-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:34:56 +01:00
Biju Das
86e122c075 clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
Core clock "I" is sourced from  CPG_PL1_DDIV which controls CPU
frequency. Define CPG_PL1_DDIV, so that we can register it as a
clock divider in later patch.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211112081003.15453-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:34:56 +01:00
AngeloGioacchino Del Regno
54337a96f3 arm64: dts: mediatek: mt8173-elm: Add backlight enable pin config
Add the proper pinctrl for GPIO95 backlight enable pin and assign it
to the pwm-backlight node.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20211102144224.457446-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-11-19 11:34:22 +01:00
AngeloGioacchino Del Regno
08c40de81b arm64: dts: mediatek: mt8173-elm: Move pwm pinctrl to pwm0 node
The PWM pinctrl belongs to the PWM0 node, as it's strictly pwm related.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20211102144224.457446-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-11-19 11:34:22 +01:00
Ville Syrjälä
6bb0a0e0fd drm/i915: Clean up FPGA_DBG/CLAIM_ER bits
Use REG_BIT() & co. for FPGA_DBG/CLAIM_ER bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-10-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-11-19 12:33:06 +02:00
Wolfram Sang
e5f7e81ee4 mmc: renesas_sdhi: Parse DT for SDnH
If there is a SDnH clock provided in DT, let's use it instead of relying
on the fallback.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211110191610.5664-21-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:32:39 +01:00
Wolfram Sang
079e83b958 mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
This is to improve deferred probe in this driver and to keep consistent
with an up-to-date handling of a soon to be added second clock.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211110191610.5664-20-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:32:39 +01:00
Wolfram Sang
d3a52bc41d clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRST
We handle it differently meanwhile.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-7-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:32:39 +01:00
Wolfram Sang
bb6d3fa98a clk: renesas: rcar-gen3: Switch to new SD clock handling
The old SD handling code was huge and could not handle all the details
which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to
another design. Have SDnH a separate clock, use the existing divider
clocks and move the errata handling from the clock driver to the SDHI
driver where it belongs.

This patch removes the old SD handling code and switch to the new one.
This updates the SDHI driver at the same time. Because the SDHI driver
can only communicate with the clock driver via clk_set_rate(), I don't
see an alternative to this flag-day-approach, so we cross subsystems
here.

The patch sadly looks messy for the CPG lib, but it is basically a huge
chunk of code removed and smaller chunks added. It looks much better
when you just view the resulting source file.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Link: https://lore.kernel.org/r/20211110191610.5664-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:32:39 +01:00
Wolfram Sang
627151b496 mmc: renesas_sdhi: Flag non-standard SDnH handling for V3M
V3M handles SDnH differently than other Gen3 SoCs, so let's add a
separate entry for that. This will allow better SDnH handling in the
future.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211110191610.5664-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:32:17 +01:00
Wolfram Sang
63494b6f98 clk: renesas: r8a779a0: Add SDnH clock to V3U
Currently a pass-through clock but we will make it a real divider clock
in the next patches.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:27:58 +01:00
Wolfram Sang
1abd044808 clk: renesas: rcar-gen3: Add SDnH clock
Currently a pass-through clock but we will make it a real divider clock
in the next patches.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 11:27:58 +01:00