copy_page_from_iter_atomic() will be removed at some point.
Also fixup a comment for folios.
Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on QDU1000/QRU1000 SoCs. Also add required pins for USB,
so that the interface can work reliably.
Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Link: https://lore.kernel.org/r/20240502090326.21489-2-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The USB PHYs don't use extcon connectors, drop the extcon property from
the hsusb_phy1 node.
Fixes: 46680fe9ba ("arm64: dts: qcom: msm8996: Add support for the Xiaomi MSM8996 platform")
Cc: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-13-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On the IFC6560 one of the USB PHY supplies is the L10A power supply.
However this regulator also supplies VDDA_APC1_CS, VDD_PLL2 and VDD_P11
consumers. Touching the supply causes the board to be reset. Document
the supply as a fixed always-on regulator.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-12-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: 07fa917a33 ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-11-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: 59c7cf8147 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-10-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: b7e2fba066 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-9-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: 5a814af5fc ("arm64: dts: qcom: sm6350: Add UFS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-8-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: 97e563bf5b ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-7-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: cc16687fbd ("arm64: dts: qcom: sdm845: add UFS controller")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-6-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add
corresponding power-domain the the PHY node.
Fixes: 8575f197b0 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-5-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The DT schema doesn't have a fallback compatible for
qcom,sc7180-qmp-ufs-phy. Drop it from the dtsi too.
Fixes: 858536d9dc ("arm64: dts: qcom: sc7180: Add UFS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-4-f1fd15c33fb3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add ep pcie dtsi node for pcie1 controller found on sa8775p platform.
It supports gen4 and x4 link width. Limiting the speed to Gen3 due to
stability issue with Gen4.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Link: https://lore.kernel.org/r/1714494089-7917-3-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Add ep pcie dtsi node for pcie0 controller found on sa8775p platform.
It supports gen4 and x2 link width. Limiting the speed to Gen3 due to
stability issues.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1714492540-15419-4-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
IBM Power processors have a SPI controller that can be accessed
over FSI from a service processor. Document it.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240514192630.152747-1-eajames@linux.ibm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The refactoring makes code less verbose and easier to read.
Besides that the binary size is also reduced, which sounds
like a win-win case:
add/remove: 0/1 grow/shrink: 2/2 up/down: 210/-226 (-16)
Function old new delta
spi_destroy_queue 42 156 +114
spi_controller_suspend 101 197 +96
spi_unregister_controller 346 319 -27
spi_register_controller 1834 1794 -40
spi_stop_queue 159 - -159
Total: Before=49230, After=49214, chg -0.03%
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://msgid.link/r/20240510204945.2581944-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert the Broadcom BCM2835 SPI0 controller to newer DT
schema. Created DT schema based on the .txt file which had
`comaptible`, `reg`, `interrupts`, `clocks` as required
properties.
Added GPL-2.0 OR BSD-2-Clause License
Signed-off-by: Kanak Shilledar <kanakshilledar111@protonmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514070051.2959-1-kanakshilledar111@protonmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add check for the return value of clk_prepare() and return the error if
it fails in order to catch the error.
Fixes: 4a2f83b7f7 ("spi: atmel-quadspi: add runtime pm support")
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Link: https://msgid.link/r/20240515084028.3210406-1-nichen@iscas.ac.cn
Signed-off-by: Mark Brown <broonie@kernel.org>
Remove the empty spi_imx_cleanup function.
It's ok if a driver does not set the controller->cleanup pointer, the
caller does a NULL check.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Link: https://msgid.link/r/20240520165906.164906-1-martin@kaiser.cx
Signed-off-by: Mark Brown <broonie@kernel.org>
The Marvell PXA SSP block is the same or similiar to the MMP2 variant.
The only difference in the binding is the PXA version supports DMA (and
that's probably a binding difference rather than an actual h/w
difference).
The old binding didn't belong under 'serial' as it is not a UART. The
SSP block also supports audio devices, so 'spi' is not a perfect fit
either. As the existing schema for MMP2 is there, just leave things
as-is.
The examples in the old text binding were pretty out of sync with
reality. 'clock-names' and 'ssp-id' aren't documented nor used.
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://msgid.link/r/20240522132859.3146335-1-robh@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert the module to be property provider agnostic and allow
it to be used on non-OF platforms.
Include mod_devicetable.h explicitly to replace the dropped of.h
which included mod_devicetable.h indirectly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://msgid.link/r/20240517194246.747427-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Instead of using hard coded number of modes, replace it with
SPI_MODE_X_MASK + 1 to show relation to the SPI modes.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://msgid.link/r/20240517194104.747328-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
With a typedef for the txrx_*() callbacks the code looks neater.
Note that typedef for a function is okay to have.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://msgid.link/r/20240517194104.747328-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The SPI "hard" controller within the PolarFire SoC is capable of
handling eight CS lines, but only one CS line is wired. Therefore, use
GPIO descriptors to configure additional CS lines.
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-4-prajna.rajendrakumar@microchip.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.
Fixes: 9ac8d17694 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The PolarFire SoC SPI "hard" controller supports eight CS lines, out of
which only one CS line is physically wired. The default value of
'num-cs' was never set and it did not didn't impose a maximum value.
To reflect this hardware limitation in the device tree, the binding
enforces that the 'num-cs' property cannot exceed 1 unless additional
CS lines are explicitly defined using GPIO descriptors.
Fixes: 2da187304e ("spi: add bindings for microchip mpfs spi")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-2-prajna.rajendrakumar@microchip.com
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
When the requested dirmap accesses are outside of the window, it is
probably more sensible to return -EINVAL rather than an "unsupported"
error code. If however the operation in itself is not supported, then
-EOPNOTSUP is likely going to be preferred as it is a standard error
code.
>From a caller (and reviewer) point of view, distinguising between the
two may be helpful because somehow one can be "fixed" while the other
will always be refused no matter how hard we try.
As part of a wider work to bring spi-nand continuous reads, it was
useful to easily catch the upper limit direct mapping boundaries for
each controller, with the idea of enlarging this area from a page to an
eraseblock, without risking too many regressions.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://msgid.link/r/20240522145255.995778-5-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
If the request is out of range, returning -EINVAL seems a better pick
than -ENOTSUPP.
>From a caller (and reviewer) point of view, distinguising between the
two may be helpful because somehow one can be "fixed" while the other
will always be refused no matter how hard we try.
As part of a wider work to bring spi-nand continuous reads, it was
useful to easily catch the upper limit direct mapping boundaries for
each controller, with the idea of enlarging this area from a page to an
eraseblock, without risking too many regressions.
In all other cases, as part of a wider work towards using -EOPNOTSUP
rather than -ENOTSUPP (which is not a SUSV4 code), let's change the
error code to be uniform across spi-mem controller drivers.
Finally, reword a little bit the conditions to clarify what is intended
(ie. checking for the presence of a direct mapping, and also ensuring we
create a dirmap only on DATA_IN flows).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://msgid.link/r/20240522145255.995778-4-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
If the request is out of range, returning -EINVAL seems
sensible. However if there is no direct mapping available (which is a
possible case), no direct mapping will ever be allowed, hence -EOPNOTSUP
is probably more relevant in this case.
>From a caller (and reviewer) point of view, distinguising between the
two may be helpful because somehow one can be "fixed" while the other
will always be refused no matter how hard we try.
As part of a wider work to bring spi-nand continuous reads, it was
useful to easily catch the upper limit direct mapping boundaries for
each controller, with the idea of enlarging this area from a page to an
eraseblock, without risking too many regressions.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://msgid.link/r/20240522145255.995778-3-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The driver does not support dirmap write operations, return -EOPTNOTSUPP
in this case.
Most controllers have a maximum linear mapping area. Requests beyond
this limit can be considered invalid, rather than unsupported.
>From a caller (and reviewer) point of view, distinguising between the
two may be helpful because somehow one can be "fixed" while the other
will always be refused no matter how hard we try.
As part of a wider work to bring spi-nand continuous reads, it was
useful to easily catch the upper limit direct mapping boundaries for
each controller, with the idea of enlarging this area from a page to an
eraseblock, without risking too many regressions.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://msgid.link/r/20240522145255.995778-2-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Document the optional reset control to SPI.
Co-developed-by: Eng Lee Teh <englee.teh@starfivetech.com>
Signed-off-by: Eng Lee Teh <englee.teh@starfivetech.com>
Co-developed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240508054728.1751162-3-jisheng.teoh@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add optional reset control support for spi-cadence to properly bring
the SPI device into an operating condition.
Co-developed-by: Eng Lee Teh <englee.teh@starfivetech.com>
Signed-off-by: Eng Lee Teh <englee.teh@starfivetech.com>
Co-developed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
Link: https://msgid.link/r/20240508054728.1751162-2-jisheng.teoh@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Based on pahole, 2 holes can be combined in 'struct regulator_bulk_data'.
On x86_64 and allmodconfig, this shrinks the size of the structure from 32
to 24 bytes.
This is usually a win, because this structure is often used for static
global variables.
As an example:
Before:
text data bss dec hex filename
3557 162 0 3719 e87 drivers/gpu/drm/msm/dsi/dsi_cfg.o
After:
text data bss dec hex filename
3477 162 0 3639 e37 drivers/gpu/drm/msm/dsi/dsi_cfg.o
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://msgid.link/r/35c4edf2dbc6d4f24fb771341ded2989ae32f779.1715512259.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
These drivers don't use the driver_data member of struct i2c_device_id,
so don't explicitly initialize this member.
This prepares putting driver_data in an anonymous union which requires
either no initialization or named designators. But it's also a nice
cleanup on its own.
While add it, also remove commas after the sentinel entries.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://msgid.link/r/20240513080525.2353168-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
